From nobody Mon Feb 9 00:19:43 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+48058+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+48058+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1569456608; cv=none; d=zoho.com; s=zohoarc; b=EAYZhY4lOcfJUzeCuA4vsFwCa2n6EjNQx+S4kh/OKVD5op/328mRa4Ncn++Slzd33d8WS0t4NUEVBKzAaXR/MI1bbl4N/mUzi4qctDNn4HP+gS9AsOuzKJB4z9DSiZJ2GjUTFofESVK/hMzIp0WMHNJrwnF2X+GJ86dSOq9U69s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1569456608; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=8TyPr5jy9rHgD/7hIy7jqwCc+TnFv65Ag1cJNaWpb5k=; b=G0qrExEky6hB0MYSowRXgSIkzJMpv1Y30KOxxsUYQs6+YvKu0WVPzJmPuuCH7Ks4GinQJBsZh0UI0VYRZRvLUaS+acoCyj/XmAARs3L/wGpsxwLCSMRVGLHBHCwZGUJGzS8FMHzf1Rt4obNPvRm8h+pUZhOAPOEwRoewpyh1v7E= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+48058+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1569456608427943.7457384383682; Wed, 25 Sep 2019 17:10:08 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id Ez3SYY1788612xBKfi2UFx8I; Wed, 25 Sep 2019 17:10:08 -0700 X-Received: from mga07.intel.com (mga07.intel.com []) by groups.io with SMTP; Wed, 25 Sep 2019 17:10:07 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Sep 2019 17:10:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,549,1559545200"; d="scan'208";a="364500419" X-Received: from ray-dev.ccr.corp.intel.com ([10.239.9.9]) by orsmga005.jf.intel.com with ESMTP; 25 Sep 2019 17:10:05 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong , Laszlo Ersek Subject: [edk2-devel] [PATCH 1/2] UefiCpuPkg/PiSmmCpu: Remove hard code when getting physical line size Date: Thu, 26 Sep 2019 08:09:03 +0800 Message-Id: <20190926000904.187532-2-ray.ni@intel.com> In-Reply-To: <20190926000904.187532-1-ray.ni@intel.com> References: <20190926000904.187532-1-ray.ni@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com X-Gm-Message-State: 8LXpeJycZjfvs69PEWFi0Lctx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1569456608; bh=IDWUodXodtTVeaO5Sm6/06AwoM9LBJlGbq82Bu/QTGw=; h=Cc:Date:From:Reply-To:Subject:To; b=qZzlYkwDs5u6DIfm+kyH/G9M4uO947eeMdUhTRVSoJod2hlkz1qq+riauGu/t7AMgDi VOh+wuDJ0Lhd8HBK+O9zwd7IfEDdNIa1pluMKPSvbBGzwbTspmrSTyOn/WWIe09FC/k6X 8A4NjaoS+Fg21yhj2eIiP2jvn3NunFsXyAU= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The code replaces the hard code with macros defined in MdePkg\Include\Register\Intel\CpuId.h. No functionality impact. Signed-off-by: Ray Ni Cc: Eric Dong Cc: Laszlo Ersek --- UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 24 +++++++++++------------- 1 file changed, 11 insertions(+), 13 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuD= xeSmm/X64/PageTbl.c index e5c4788c13..b8e95bf6ed 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c @@ -151,30 +151,28 @@ GetSubEntriesNum ( @return the maximum support address. **/ UINT8 -CalculateMaximumSupportAddress ( +GetPhysicalAddressBits ( VOID ) { - UINT32 RegEax; - UINT8 PhysicalAddressBits; - VOID *Hob; + CPUID_VIR_PHY_ADDRESS_SIZE_EAX VirPhyAddressSize; + UINT32 MaxExtendedFunctionId; + VOID *Hob; =20 // // Get physical address bits supported. // Hob =3D GetFirstHob (EFI_HOB_TYPE_CPU); if (Hob !=3D NULL) { - PhysicalAddressBits =3D ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace; + return ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace; } else { - AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL); - if (RegEax >=3D 0x80000008) { - AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL); - PhysicalAddressBits =3D (UINT8) RegEax; - } else { - PhysicalAddressBits =3D 36; + AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunctionId, NULL, NULL,= NULL); + if (MaxExtendedFunctionId < CPUID_VIR_PHY_ADDRESS_SIZE) { + return 36; } + AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &VirPhyAddressSize.Uint32, NULL,= NULL, NULL); + return (UINT8) VirPhyAddressSize.Bits.PhysicalAddressBits; } - return PhysicalAddressBits; } =20 /** @@ -354,7 +352,7 @@ SmmInitPageTable ( mCpuSmmRestrictedMemoryAccess =3D PcdGetBool (PcdCpuSmmRestrictedMemoryA= ccess); m1GPageTableSupport =3D Is1GPageSupport (); m5LevelPagingNeeded =3D Is5LevelPagingNeeded (); - mPhysicalAddressBits =3D CalculateMaximumSupportAddress (); + mPhysicalAddressBits =3D GetPhysicalAddressBits (); PatchInstructionX86 (gPatch5LevelPagingNeeded, m5LevelPagingNeeded, 1); DEBUG ((DEBUG_INFO, "5LevelPaging Needed - %d\n", m5LevelPag= ingNeeded)); DEBUG ((DEBUG_INFO, "1GPageTable Support - %d\n", m1GPageTab= leSupport)); --=20 2.21.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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