From nobody Sun Feb 8 16:30:49 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+47534+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+47534+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=hpe.com ARC-Seal: i=1; a=rsa-sha256; t=1568865098; cv=none; d=zoho.com; s=zohoarc; b=DCFnItnBC29lQWitawSOrMdEC3fCYR9MoDbuHH9R72CaIAefEmfrptEWYpy71bIu47l63cIKu/gLEDdiRmik6PfoDFagWPE1XG+jOndDH62B0/M+BsiTpmClwEnQ6miVDLW0himwyfoQ8j3G+3bkALQqP/bl9pzHDVmR6t6/qzM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1568865098; h=Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=9O55kC76sJI+F/Wo96zQkzL+0Ap4BTrdUyOctvpL7hY=; b=dWFBXDdYsAVmWYSwqggGZgKihFdJyxn4SNNy+KIvuId9FQ/yMdlnv1c/tkyOMqbtK+fHOLn+4lOMagV+B38K8c+cRVx6h9PyOXbZvCWP86b0Cf9qkNX221tQF3uZFJb5LNwofo7BQOFndObIB2e0Z8mR1mPYXk7YUxz9dwJJmlo= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+47534+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1568865098285782.9570484993232; Wed, 18 Sep 2019 20:51:38 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id AWLWYY1788612xGI8jpDWEp7; Wed, 18 Sep 2019 20:51:37 -0700 X-Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by groups.io with SMTP; Wed, 18 Sep 2019 20:51:37 -0700 X-Received: from pps.filterd (m0134421.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x8J3pLO8017060 for ; Thu, 19 Sep 2019 03:51:36 GMT X-Received: from g4t3425.houston.hpe.com (g4t3425.houston.hpe.com [15.241.140.78]) by mx0b-002e3701.pphosted.com with ESMTP id 2v3vatnf2g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 19 Sep 2019 03:51:36 +0000 X-Received: from g4t3433.houston.hpecorp.net (g4t3433.houston.hpecorp.net [16.208.49.245]) by g4t3425.houston.hpe.com (Postfix) with ESMTP id 250848D for ; Thu, 19 Sep 2019 03:51:35 +0000 (UTC) X-Received: from ARBDN0VRAE.asiapacific.hpqcorp.net (arbdn0vrae.asiapacific.hpqcorp.net [10.43.41.0]) by g4t3433.houston.hpecorp.net (Postfix) with ESMTP id 56FED45 for ; Thu, 19 Sep 2019 03:51:34 +0000 (UTC) From: "Gilbert Chen" To: devel@edk2.groups.io Subject: [edk2-devel] [plaforms/devel-riscv-v2 PATCHv2 01/14] Silicon/SiFive: Initial version of SiFive silicon package Date: Thu, 19 Sep 2019 11:51:18 +0800 Message-Id: <20190919035131.4700-2-gilbert.chen@hpe.com> In-Reply-To: <20190919035131.4700-1-gilbert.chen@hpe.com> References: <20190919035131.4700-1-gilbert.chen@hpe.com> X-HPE-SCL: -1 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,gilbert.chen@hpe.com X-Gm-Message-State: Q4pC0yHOvyf0I9oS6uOyaP6Ox1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1568865097; bh=hRrXbX2cD9SEXpR9jXXmJIyetSZmJIFYYQGgkQRPorE=; h=Date:From:Reply-To:Subject:To; b=For8YCnU3YgU1m2AfB3vgrVeD3seR9g8gnTtbMpFNPgtFziY3GCbQlvXtUrDrwtxeIy D4sB1p3yvYQbL1Q1zdNeMJ2OQTlRnex+E2pLnDPBxNZY88WO1+o9/nfaBLsZFRvfM1f+C BUlNJZCSL2fIVW9cNrLwGDPYQBJIbey5jbI= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add SiFive silicon EDK2 metafile and header files of SiFive RISC-V cores. Signed-off-by: Gilbert Chen --- Silicon/SiFive/Include/Library/SiFiveE51.h | 60 ++++++++++++++++++= ++++ Silicon/SiFive/Include/Library/SiFiveU54.h | 60 ++++++++++++++++++= ++++ .../SiFive/Include/Library/SiFiveU54MCCoreplex.h | 55 ++++++++++++++++++= ++ Silicon/SiFive/SiFive.dec | 39 ++++++++++++++ 4 files changed, 214 insertions(+) create mode 100644 Silicon/SiFive/Include/Library/SiFiveE51.h create mode 100644 Silicon/SiFive/Include/Library/SiFiveU54.h create mode 100644 Silicon/SiFive/Include/Library/SiFiveU54MCCoreplex.h create mode 100644 Silicon/SiFive/SiFive.dec diff --git a/Silicon/SiFive/Include/Library/SiFiveE51.h b/Silicon/SiFive/In= clude/Library/SiFiveE51.h new file mode 100644 index 00000000..5faea5c7 --- /dev/null +++ b/Silicon/SiFive/Include/Library/SiFiveE51.h @@ -0,0 +1,60 @@ +/** @file + SiFive E51 Core library definitions. + + Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All right= s reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ +#ifndef _SIFIVE_E51_CORE_H_ +#define _SIFIVE_E51_CORE_H_ + +#include + +#include +#include + +/** + Function to build core specific information HOB. + + @param ParentProcessorGuid Parent processor od this core. ParentProc= essorGuid + could be the same as CoreGuid if one proc= essor has + only one core. + @param ParentProcessorUid Unique ID of pysical processor which owns= this core. + @param HartId Hart ID of this core. + @param IsBootHart TRUE means this is the boot HART. + @param GuidHobData Pointer to receive RISC_V_PROCESSOR_SPECI= FIC_DATA_HOB. + + @return EFI_SUCCESS The PEIM initialized successfully. + +**/ +EFI_STATUS +EFIAPI +CreateE51CoreProcessorSpecificDataHob ( + IN EFI_GUID *ParentProcessorGuid, + IN UINTN ParentProcessorUid, + IN UINTN HartId, + IN BOOLEAN IsBootHart, + OUT RISC_V_PROCESSOR_SPECIFIC_DATA_HOB **GuidHobData + ); + +/** + Function to build processor related SMBIOS information. RISC-V SMBIOS DX= E driver collect + this information and build SMBIOS Type4 and Type7 record. + + @param ProcessorUid Unique ID of pysical processor which owns this c= ore. + @param SmbiosHobPtr Pointer to receive RISC_V_PROCESSOR_SMBIOS_DATA_= HOB. The pointers + maintained in this structure is only valid befor= e memory is discovered. + Access to those pointers after memory is install= ed will cause unexpected issues. + + @return EFI_SUCCESS The PEIM initialized successfully. + +**/ +EFI_STATUS +EFIAPI +CreateE51ProcessorSmbiosDataHob ( + IN UINTN ProcessorUid, + OUT RISC_V_PROCESSOR_SMBIOS_DATA_HOB **SmbiosHobPtr + ); + +#endif diff --git a/Silicon/SiFive/Include/Library/SiFiveU54.h b/Silicon/SiFive/In= clude/Library/SiFiveU54.h new file mode 100644 index 00000000..2e3a1c75 --- /dev/null +++ b/Silicon/SiFive/Include/Library/SiFiveU54.h @@ -0,0 +1,60 @@ +/** @file + SiFive U54 Core library definitions. + + Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All right= s reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ +#ifndef _SIFIVE_U54_CORE_H_ +#define _SIFIVE_U54_CORE_H_ + +#include + +#include +#include + +/** + Function to build core specific information HOB. + + @param ParentProcessorGuid Parent processor od this core. ParentProc= essorGuid + could be the same as CoreGuid if one proc= essor has + only one core. + @param ParentProcessorUid Unique ID of pysical processor which owns= this core. + @param HartId Hart ID of this core. + @param IsBootHart TRUE means this is the boot HART. + @param GuidHobdata Pointer to RISC_V_PROCESSOR_SPECIFIC_DATA= _HOB. + + @return EFI_SUCCESS The PEIM initialized successfully. + +**/ +EFI_STATUS +EFIAPI +CreateU54CoreProcessorSpecificDataHob ( + IN EFI_GUID *ParentProcessorGuid, + IN UINTN ParentProcessorUid, + IN UINTN HartId, + IN BOOLEAN IsBootHart, + OUT RISC_V_PROCESSOR_SPECIFIC_DATA_HOB **GuidHobdata + ); + +/** + Function to build processor related SMBIOS information. RISC-V SMBIOS DX= E driver collect + this information and build SMBIOS Type4 and Type7 record. + + @param ProcessorUid Unique ID of pysical processor which owns this c= ore. + @param SmbiosHobPtr Pointer to receive RISC_V_PROCESSOR_SMBIOS_DATA_= HOB. The pointers + maintained in this structure is only valid befor= e memory is discovered. + Access to those pointers after memory is install= ed will cause unexpected issues. + + @return EFI_SUCCESS The PEIM initialized successfully. + +**/ +EFI_STATUS +EFIAPI +CreateU54ProcessorSmbiosDataHob ( + IN UINTN ProcessorUid, + IN RISC_V_PROCESSOR_SMBIOS_DATA_HOB **SmbiosHobPtr + ); + +#endif diff --git a/Silicon/SiFive/Include/Library/SiFiveU54MCCoreplex.h b/Silicon= /SiFive/Include/Library/SiFiveU54MCCoreplex.h new file mode 100644 index 00000000..3d23b34c --- /dev/null +++ b/Silicon/SiFive/Include/Library/SiFiveU54MCCoreplex.h @@ -0,0 +1,55 @@ +/** @file + SiFive U54 Coreplex library definitions. + + Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All right= s reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ +#ifndef _SIFIVE_U54MC_COREPLEX_CORE_H_ +#define _SIFIVE_U54MC_COREPLEX_CORE_H_ + +#include + +#include +#include + +#define SIFIVE_U54MC_COREPLEX_E51_HART_ID 0 +#define SIFIVE_U54MC_COREPLEX_U54_0_HART_ID 1 +#define SIFIVE_U54MC_COREPLEX_U54_1_HART_ID 2 +#define SIFIVE_U54MC_COREPLEX_U54_2_HART_ID 3 +#define SIFIVE_U54MC_COREPLEX_U54_3_HART_ID 4 + +/** + Build up U54MC coreplex processor core-specific information. + + @param UniqueId U54MC unique ID. + + @return EFI_STATUS + +**/ +EFI_STATUS +EFIAPI +CreateU54MCCoreplexProcessorSpecificDataHob ( + IN UINTN UniqueId + ); + +/** + Function to build processor related SMBIOS information. RISC-V SMBIOS DX= E driver collect + this information and build SMBIOS Type4 and Type7 record. + + @param ProcessorUid Unique ID of pysical processor which owns this c= ore. + @param SmbiosHobPtr Pointer to receive RISC_V_PROCESSOR_SMBIOS_DATA_= HOB. The pointers + maintained in this structure is only valid befor= e memory is discovered. + Access to those pointers after memory is install= ed will cause unexpected issues. + + @return EFI_SUCCESS The PEIM initialized successfully. + +**/ +EFI_STATUS +EFIAPI +CreateU54MCProcessorSmbiosDataHob ( + IN UINTN ProcessorUid, + IN RISC_V_PROCESSOR_SMBIOS_DATA_HOB **SmbiosHobPtr + ); +#endif diff --git a/Silicon/SiFive/SiFive.dec b/Silicon/SiFive/SiFive.dec new file mode 100644 index 00000000..7aca3e75 --- /dev/null +++ b/Silicon/SiFive/SiFive.dec @@ -0,0 +1,39 @@ +## @file +# SiFive silicon package definitions +# +# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + DEC_SPECIFICATION =3D 0x00010005 + PACKAGE_NAME =3D SiFiveSiliconPkg + PACKAGE_GUID =3D 576912B2-7077-4B78-A934-4C133FEB20BB + PACKAGE_VERSION =3D 1.0 + +[Includes] + Include # Root include for the package + +[LibraryClasses] + +[Guids] + gEfiSiFiveSiliconSpaceGuid =3D {0x5F3E9E15, 0x8FFC, 0x4F53, { 0x8E, 0x6= 4, 0x92, 0x0B, 0xA5, 0x39, 0x81, 0xB0 }} + +[Protocols] + +[PcdsFixedAtBuild] + # E51 Core GUID + gEfiSiFiveSiliconSpaceGuid.PcdSiFiveE51CoreGuid |{0xD4, 0x69, 0x54, 0x87= , 0x96, 0x96, 0x48, 0x7F, 0x9F, 0x57, 0xB6, 0xF1, 0xDE, 0x7D, 0x97, 0x42}|V= OID*|0x00001000 + # U54 Core GUID + gEfiSiFiveSiliconSpaceGuid.PcdSiFiveU54CoreGuid |{0x64, 0x70, 0xF6, 0x90= , 0x11, 0x59, 0x47, 0xF1, 0xB8, 0xD5, 0xCF, 0x89, 0x10, 0xC5, 0x30, 0x20}|V= OID*|0x00001001 + # U54 MC Coreplex GUID + gEfiSiFiveSiliconSpaceGuid.PcdSiFiveU54MCCoreplexGuid |{0x67, 0xBF, 0x15= , 0xD9, 0x7E, 0x4F, 0x48, 0x27, 0x87, 0x19, 0x79, 0x0B, 0xA6, 0x22, 0x7C, 0= xBE}|VOID*|0x00001002 + # U5 MC Coreplex GUID + gEfiSiFiveSiliconSpaceGuid.PcdSiFiveU5MCCoreplexGuid |{0x06, 0x38, 0x9F,= 0x33, 0xF9, 0xDB, 0x43, 0x13, 0x9A, 0x9B, 0x1C, 0x68, 0xD6, 0x04, 0xEA, 0x= FF}|VOID*|0x00001003 + +[PcdsDynamic, PcdsDynamicEx] + +[PcdsFeatureFlag] + --=20 2.12.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#47534): https://edk2.groups.io/g/devel/message/47534 Mute This Topic: https://groups.io/mt/34196347/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-