From nobody Fri Mar 29 05:03:10 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+46878+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+46878+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1567668305; cv=none; d=zoho.com; s=zohoarc; b=LJzKBVEBsOcPrEq4AKosguxcwed0J+7r9/QKGsL9A4cGgq458SCqUHH56xWoWL2ShRSMB1UCX8bSt1xjffUN45rWChF40v8UYzi0iiA9kcmGXJ1c8F/FD8JXLTP3cJh+19rjYMh8m/WEnWoGljm6BccM6YuZgdIv1dv35kYm/yA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1567668305; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=rMJg/sspkOwicyRmO1PQZZDTSUhRGVJy8PTDMTRQOqU=; b=F6oSy2nZlKRLt1uMWAeZ4IrujGm5zIUIjLUVIGNDkvBFgdbjWrPSDxYHn2rY0Fo7gv3JMsODUgN5LXYeer29Z4eNfbAzaEtqBmimc0i+UQ8FEYvSY0fr3Y74gGTxpazazXwfvU24yStSVpR91FADOSA3H4fJuKnEn7GAsHSrXrA= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+46878+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1567668305576854.114925407034; Thu, 5 Sep 2019 00:25:05 -0700 (PDT) Return-Path: X-Received: from mga11.intel.com (mga11.intel.com []) by groups.io with SMTP; Thu, 05 Sep 2019 00:25:04 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Sep 2019 00:25:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,469,1559545200"; d="scan'208";a="187890313" X-Received: from ppglcf0018.png.intel.com ([10.226.229.38]) by orsmga006.jf.intel.com with ESMTP; 05 Sep 2019 00:25:01 -0700 From: "Loh, Tien Hock" To: devel@edk2.groups.io, thloh85@gmail.com Cc: "Tien Hock, Loh" , Ard Biesheuvel , Leif Lindholm , Michael D Kinney Subject: [edk2-devel] [PATCH 1/4] Platform: Intel: Update maintainers list for Stratix 10 device Date: Thu, 5 Sep 2019 15:24:20 +0800 Message-Id: <20190905072423.150004-2-tien.hock.loh@intel.com> In-Reply-To: <20190905072423.150004-1-tien.hock.loh@intel.com> References: <20190905072423.150004-1-tien.hock.loh@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,tien.hock.loh@intel.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1567668305; bh=F59zKo8LGSdwBWWHPsQqFOjtWdDgTqTNTaal6k5qL44=; h=Cc:Date:From:Reply-To:Subject:To; b=Q2CXHQk17OQMCgwLBzFNT4LjDb/Hx8vjk0jkCD6leToU2va0Al2hJNziMPGch/Ymsic ESJNEkhCJ50GtSx75N0YgNY2ohwbtAC0p45LSV3PndZOZvgxLVHo54euu785XuZXaK0vR hgSoP5KjfmES20XF6CSx/unZLDzDEocSvMY= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: "Tien Hock, Loh" Update maintainers list for Stratix 10 devices Signed-off-by: "Tien Hock, Loh" Contributed-under: TianoCore Contribution Agreement 1.1 Cc: Ard Biesheuvel Cc: Leif Lindholm Cc: Michael D Kinney --- Maintainers.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Maintainers.txt b/Maintainers.txt index 876ae5612ad8..47d58ffa0b2c 100644 --- a/Maintainers.txt +++ b/Maintainers.txt @@ -98,6 +98,11 @@ M: Shifei A Lu M: Xiaohu Zhou M: Isaac W Oram =20 +Platform/Intel/Stratix10SocPkg +M: Leif Lindholm +M: Michael D Kinney +R: Tien Hock Loh + Platform/Intel/Tools M: Bob Feng M: Liming Gao --=20 2.19.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#46878): https://edk2.groups.io/g/devel/message/46878 Mute This Topic: https://groups.io/mt/33151030/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Mar 29 05:03:10 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+46879+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+46879+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1567668308; cv=none; d=zoho.com; s=zohoarc; b=M6Uy4jFfxeRYji4EasLQDOCqmWgiVwGLvZNbs9zS7xRm6fzPMpHeVpvUuytzOApxVQcDmoxR9b41wq0XAGInOvX492KW3Mdyte9m6qIHxV0Lg1ZpGV8A50noCP8EU1MwuU05wyAJVdKYdm9UvKA4n7IZTjer2vgazaY0wZPmoQY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1567668308; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=UBwGiAe8Yopz9eTyvPj1gwq6z3jLUTF9F2QRBizLh/o=; b=oHckA2Y1zcoVQu31h3H48QnOCzjWcUXvRH2B+oc2cMnf8odYYMkb0blEJjr+i61oQJOZeTenivaWM2dIGggJckvGyRV9Jaru+vzIBTtZp+N6on0QGMgVJgmm7HSHHh9lTANqQF9lgcHneVwGV8ZmW/TL5Bb2eyU/bTY2SAA6Z0Y= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+46879+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1567668308050328.6317828382737; Thu, 5 Sep 2019 00:25:08 -0700 (PDT) Return-Path: X-Received: from mga11.intel.com (mga11.intel.com []) by groups.io with SMTP; Thu, 05 Sep 2019 00:25:06 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Sep 2019 00:25:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,469,1559545200"; d="scan'208";a="187890353" X-Received: from ppglcf0018.png.intel.com ([10.226.229.38]) by orsmga006.jf.intel.com with ESMTP; 05 Sep 2019 00:25:04 -0700 From: "Loh, Tien Hock" To: devel@edk2.groups.io, thloh85@gmail.com Cc: "Tien Hock, Loh" , Ard Biesheuvel , Leif Lindholm , Michael D Kinney Subject: [edk2-devel] [PATCH 2/4] Platform: Intel: Update license to SPDX Date: Thu, 5 Sep 2019 15:24:21 +0800 Message-Id: <20190905072423.150004-3-tien.hock.loh@intel.com> In-Reply-To: <20190905072423.150004-1-tien.hock.loh@intel.com> References: <20190905072423.150004-1-tien.hock.loh@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,tien.hock.loh@intel.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1567668307; bh=OUMgpoHn04XlsKjBCnpra2Y1P/a7wQ5206Uu7tPg+5A=; h=Cc:Date:From:Reply-To:Subject:To; b=wYaMWaPNNysmmx7Gzci8rmBTRpCTHtmF0X/On3nRXRC2kMDcfcHgpd9dNpRmPf+0v73 oyEwo0xgfx8W/K4TgSX7aMDVWENBZUgaBkALejw8C4JRdMSse3vd0g67vrsIWCh0ZjOwy mcHiMCSSe8CcAxnMrKelCik89+6cDZ238x4= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: "Tien Hock, Loh" Update licenses to SPDX Signed-off-by: "Tien Hock, Loh" Contributed-under: TianoCore Contribution Agreement 1.1 Cc: Ard Biesheuvel Cc: Leif Lindholm Cc: Michael D Kinney --- Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf = | 22 +++++++------------- Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf = | 22 +++++++------------- Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c = | 22 ++++++++------------ Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c = | 20 +++++++----------- Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c = | 19 ++++++----------- Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelpe= r.S | 8 +------ 6 files changed, 38 insertions(+), 75 deletions(-) diff --git a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatfor= mDxe.inf b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformD= xe.inf index 64b398969f1e..b16d93f22058 100644 --- a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf +++ b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf @@ -1,18 +1,12 @@ -#/** @file -# -# Copyright (c) 2019, Intel All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the B= SD License -# which accompanies this distribution. The full text of the license may = be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. -# -# -#**/ =20 +### @file +# +# Intel Stratix 10 Platform +# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +### + [Defines] INF_VERSION =3D 0x0001001B BASE_NAME =3D IntelPlatformDxe diff --git a/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatfor= mLib.inf b/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformL= ib.inf index ef5c06aede7f..b6b6c743b800 100644 --- a/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf +++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf @@ -1,18 +1,10 @@ -/** @file -* -* Stratix 10 Platform Library -* -* Copyright (c) 2019, Intel Corporations All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the B= SD License -* which accompanies this distribution. The full text of the license may = be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. -* -**/ +### @file +# +# Stratix 10 Platform Library +# Copyright (c) 2019, Intel Corporation All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +### =20 [Defines] INF_VERSION =3D 0x0001001B diff --git a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatfor= mDxe.c b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe= .c index 144b4c54ef55..b762fdc69ca4 100644 --- a/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c +++ b/Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c @@ -1,16 +1,12 @@ -/** @file -* -* Copyright (c) 2019, Intel All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the B= SD License -* which accompanies this distribution. The full text of the license may = be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. -* -**/ +/** @file + + Stratix 10 Platform Entry code + + Copyright (c) 2019, Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ =20 =20 #include diff --git a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu= .c b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c index 892387bf5d07..73ea1b423567 100644 --- a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c +++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c @@ -1,17 +1,11 @@ /** @file -* -* Stratix 10 Mmu configuration -* -* Copyright (c) 2019, Intel Corporations All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the B= SD License -* which accompanies this distribution. The full text of the license may = be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. -* + + Stratix 10 Mmu configuration + + Copyright (c) 2019, Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + **/ =20 #include diff --git a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Pla= tformLib.c b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Pla= tformLib.c index 8ac30559362d..dc10716361b1 100644 --- a/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLi= b.c +++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLi= b.c @@ -1,17 +1,10 @@ /** @file -* -* Stratix 10 Platform Library -* -* Copyright (c) 2019, Intel Corporations All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the B= SD License -* which accompanies this distribution. The full text of the license may = be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. -* + Stratix 10 Platform Library + + Copyright (c) 2019, Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + **/ =20 #include diff --git a/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmP= latformHelper.S b/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64= /ArmPlatformHelper.S index 2f4cf95cbf13..b7c6dbdc2e61 100644 --- a/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatform= Helper.S +++ b/Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatform= Helper.S @@ -1,13 +1,7 @@ // // Copyright (c) 2012-2013, ARM Limited. All rights reserved. // -// This program and the accompanying materials -// are licensed and made available under the terms and conditions of the = BSD License -// which accompanies this distribution. The full text of the license may= be found at -// http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR I= MPLIED. +// SPDX-License-Identifier: BSD-2-Clause-Patent // // =20 --=20 2.19.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#46879): https://edk2.groups.io/g/devel/message/46879 Mute This Topic: https://groups.io/mt/33151031/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Mar 29 05:03:10 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+46880+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+46880+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1567668309; cv=none; d=zoho.com; s=zohoarc; b=T4d4uOtSgDIdefUPM+dtmfCxdSBREvoQmdUFoum0HkB5eo+X0em2U5qa0OpBylo3QP9qewu68q+qDHsxFjdn5KAxTM5ud5P6H0CrHpWUh/aT/VhWob5m6pZUhnWCVtO+ioCoyb779DP7a6y7HWIk1jOqLUDAuxstI5+AQB0Fdpk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1567668309; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=XS5V/Pn2Lz2LMQySrJm58g4d+Ze3mvMlakW41SMBwNg=; b=emIQXxI6pfzctz+tu1+s/u2CZEC2dz7VERMmAlCJo0MgDgxHscz/pkzWOdN+j8wdvASKSrAy3eqDiOS18MmU8dd8wsdWxfDAzaOv6YYarXNLPbBvzas3zvDCeT4q6mJtk7QmBt9DV9qRwfiMfDruWZJOYTga8cWsVK+awsNBUTU= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+46880+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1567668309930291.775071208119; Thu, 5 Sep 2019 00:25:09 -0700 (PDT) Return-Path: X-Received: from mga11.intel.com (mga11.intel.com []) by groups.io with SMTP; Thu, 05 Sep 2019 00:25:09 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Sep 2019 00:25:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,469,1559545200"; d="scan'208";a="187890366" X-Received: from ppglcf0018.png.intel.com ([10.226.229.38]) by orsmga006.jf.intel.com with ESMTP; 05 Sep 2019 00:25:06 -0700 From: "Loh, Tien Hock" To: devel@edk2.groups.io, thloh85@gmail.com Cc: "Tien Hock, Loh" , Ard Biesheuvel , Leif Lindholm , Michael D Kinney Subject: [edk2-devel] [PATCH 3/4] Platform: Intel: Remove unused packages and clean up Date: Thu, 5 Sep 2019 15:24:22 +0800 Message-Id: <20190905072423.150004-4-tien.hock.loh@intel.com> In-Reply-To: <20190905072423.150004-1-tien.hock.loh@intel.com> References: <20190905072423.150004-1-tien.hock.loh@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,tien.hock.loh@intel.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1567668309; bh=377Ueuz4kAfT6xjFNRnET5yPb1DEvH8Yhz3rYZAsVdQ=; h=Cc:Date:From:Reply-To:Subject:To; b=qBUV1/YEBnRHdpwZgQdS37j7mBZEYbhm9As5FGLH24EbM43eJwb4Sq7jQvMAPIG1QWc KHor12/WIQtYV/Q5C7q4LNoF+lWaw41tP6YPQUeqtq4reKFBjVj6ylFINa9IiwP6PUPNs Pf2U1UelKlUtqUtXXdGBaespKVgmoOnse0g= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: "Tien Hock, Loh" Remove some unused packages in Stratix 10 packages, clean up some commented out codes Signed-off-by: "Tien Hock, Loh" Contributed-under: TianoCore Contribution Agreement 1.1 Cc: Ard Biesheuvel Cc: Leif Lindholm Cc: Michael D Kinney --- Platform/Intel/Stratix10/Stratix10SoCPkg.dsc | 4 ---- Platform/Intel/Stratix10/Stratix10SoCPkg.fdf | 1 - 2 files changed, 5 deletions(-) diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc b/Platform/Intel/= Stratix10/Stratix10SoCPkg.dsc index 17d0c5baadc6..643ce625c563 100755 --- a/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc @@ -103,7 +103,6 @@ [PcdsFixedAtBuild.common] # DEBUG_GCD 0x00100000 // Global Coherency Database changes # DEBUG_CACHE 0x00200000 // Memory range cachability changes # DEBUG_ERROR 0x80000000 // Error -# gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x803010CF gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F =20 gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x00 @@ -251,7 +250,6 @@ [LibraryClasses.common] PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf =20 CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf -# GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsL= ib.inf CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/Customize= dDisplayLib.inf =20 # @@ -414,7 +412,6 @@ [Components.common] # MdeModulePkg/Core/Dxe/DxeMain.inf { - #PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32Gu= idedSectionExtractLib.inf } =20 @@ -475,7 +472,6 @@ [Components.common] NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1Co= mmandsLib.inf NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Comm= andsLib.inf NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1= CommandsLib.inf -# NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork= 1CommandsLib.inf HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandlePar= singLib.inf PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcf= gCommandLib.inf diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf b/Platform/Intel/= Stratix10/Stratix10SoCPkg.fdf index 2c4e5ee887ca..1ac2da28addf 100755 --- a/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.fdf @@ -140,7 +140,6 @@ [FV.FV_DXE] INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf INF MdeModulePkg/Application/UiApp/UiApp.inf - INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf =20 # FV Filesystem --=20 2.19.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#46880): https://edk2.groups.io/g/devel/message/46880 Mute This Topic: https://groups.io/mt/33151032/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Mar 29 05:03:10 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+46881+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+46881+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1567668312; cv=none; d=zoho.com; s=zohoarc; b=asrDNrSm6omVTSHKkZ+Fk46n5r7YL5Bi4JWEdqgFkQieoiUA4j91zpzatkAr1SZfj/FVNVrmbXszUMjmvxBcADDnYd6OFfasgpDuulJbXsAZxyUg50yxlKoMJB7Z1zZja68vsfTUnDTvoUAg/u0c+JQa7TghXKSLYOtpSJ+nXTI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1567668312; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=CEZiLDA3199SyzWp+4SzMt6fnPpPaf2Gi7IR3azBsTs=; b=Pd4uuljtXg4Rz79Kug5uD1lD2iV3iOKXM+qrJoR1qUoy6IWdBYyZrDrv0ipdFSAg1bKaBW2kZahCEZeW/qRd4J+peuhZZ/9sIOZfP4Jx7W4C7H8HhG/wSZjfVd1TnXWlw2hzTSomDG2/7p8J99TNdeZZsCsVyzdEfNEdAKUImXU= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+46881+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1567668312527114.08155098636757; Thu, 5 Sep 2019 00:25:12 -0700 (PDT) Return-Path: X-Received: from mga11.intel.com (mga11.intel.com []) by groups.io with SMTP; Thu, 05 Sep 2019 00:25:11 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Sep 2019 00:25:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,469,1559545200"; d="scan'208";a="187890393" X-Received: from ppglcf0018.png.intel.com ([10.226.229.38]) by orsmga006.jf.intel.com with ESMTP; 05 Sep 2019 00:25:09 -0700 From: "Loh, Tien Hock" To: devel@edk2.groups.io, thloh85@gmail.com Cc: "Tien Hock, Loh" , Ard Biesheuvel , Leif Lindholm , Michael D Kinney Subject: [edk2-devel] [PATCH 4/4] Platform: Intel: Remove hardcoded Stratix 10 UART clock Date: Thu, 5 Sep 2019 15:24:23 +0800 Message-Id: <20190905072423.150004-5-tien.hock.loh@intel.com> In-Reply-To: <20190905072423.150004-1-tien.hock.loh@intel.com> References: <20190905072423.150004-1-tien.hock.loh@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,tien.hock.loh@intel.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1567668312; bh=XY2hjXbHrI0M1KfULc9oFV1SS1coCvsHr1e8GwH6fO4=; h=Cc:Date:From:Reply-To:Subject:To; b=QihUDzf0hmDxc324AocflozcE9SW7YXFGv4wmvBy3aOAY0fKNy8Oh+6KWWyp1enyAmS 86i+OqwfOK9Ee+HDLOH4hcemoXoSp3vcX1jP6CbD2Gu9Vwjmten8dRtbfyyF8O/vMWnhF sXtbC2a7C5uux93gXVx5B67f2P7nneQB8Qs= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: "Tien Hock, Loh" Added clock manager so that Stratix 10 UART clock doesn't need to be hardcoded Signed-off-by: "Tien Hock, Loh" Contributed-under: TianoCore Contribution Agreement 1.1 Cc: Ard Biesheuvel Cc: Leif Lindholm Cc: Michael D Kinney --- Platform/Intel/Stratix10/Stratix10SoCPkg.dec = | 3 +- Platform/Intel/Stratix10/Stratix10SoCPkg.dsc = | 11 +- Platform/Intel/Stratix10/Library/PlatformHookLib/PlatformHookLib.inf = | 41 ++++++ Platform/Intel/Stratix10/Library/S10ClockManager/S10ClockManager.inf = | 34 +++++ Platform/Intel/Stratix10/Include/Library/S10ClockManager/S10ClockManager.h= | 48 +++++++ Platform/Intel/Stratix10/Library/PlatformHookLib/PlatformHookLib.c = | 43 +++++++ Platform/Intel/Stratix10/Library/S10ClockManager/S10ClockManager.c = | 133 ++++++++++++++++++++ 7 files changed, 310 insertions(+), 3 deletions(-) diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dec b/Platform/Intel/= Stratix10/Stratix10SoCPkg.dec index 7c44670d591d..346f7f9a042b 100755 --- a/Platform/Intel/Stratix10/Stratix10SoCPkg.dec +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec @@ -10,7 +10,8 @@ [Defines] PACKAGE_GUID =3D 45533DD0-C41F-4ab6-A5DF-65B52684AC60 PACKAGE_VERSION =3D 0.1 =20 -[Includes.common] +[Includes] + Include =20 [Guids.common] gStratix10SocFpgaTokenSpaceGuid =3D { 0x0fe272eb, 0xb2cf, 0x4390, { 0xa5= , 0xc4, 0x60, 0x13, 0x2c, 0x6b, 0xd0, 0x34 } } diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc b/Platform/Intel/= Stratix10/Stratix10SoCPkg.dsc index 643ce625c563..d3ad0eba7e75 100755 --- a/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc @@ -27,6 +27,8 @@ [Defines] # Pcd Section - list of all EDK II PCD Entries defined by this Platform # ##########################################################################= ###### +[PcdsPatchableInModule.common] + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|184320 =20 [PcdsFixedAtBuild.common] gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE @@ -226,7 +228,8 @@ [LibraryClasses.common] SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf =20 SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPort= Lib16550.inf - PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatfor= mHookLibNull.inf + PlatformHookLib|Platform/Intel/Stratix10/Library/PlatformHookLib/Platfor= mHookLib.inf + S10ClockManager|Platform/Intel/Stratix10/Library/S10ClockManager/S10Cloc= kManager.inf =20 SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchroniza= tionLib.inf UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManag= erLib.inf @@ -483,9 +486,13 @@ [Components.common] } =20 # - # Platform Specific Init for DXE phase + # Platform Specific Init # Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf + Platform/Intel/Stratix10/Library/PlatformHookLib/PlatformHookLib.inf { + + S10ClockManager|Platform/Intel/Stratix10/Library/S10ClockManager/S10Cl= ockManager.inf + } =20 [BuildOptions] #------------------------------- diff --git a/Platform/Intel/Stratix10/Library/PlatformHookLib/PlatformHookL= ib.inf b/Platform/Intel/Stratix10/Library/PlatformHookLib/PlatformHookLib.i= nf new file mode 100644 index 000000000000..dc18db7c5444 --- /dev/null +++ b/Platform/Intel/Stratix10/Library/PlatformHookLib/PlatformHookLib.inf @@ -0,0 +1,41 @@ +## @file +# Platform Hook Library instance for UART device. +# +# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x0001001B + BASE_NAME =3D PlatformHookLib + FILE_GUID =3D 90A73C58-A6E3-4EED-A1A3-6F9C7C3D998F + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D PlatformHookLib + CONSTRUCTOR =3D PlatformHookSerialPortInitialize + +[Sources] + PlatformHookLib.c + +[LibraryClasses] + PcdLib + PciLib + S10ClockManager + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Platform/Intel/Stratix10/Stratix10SoCPkg.dec + UefiPayloadPkg/UefiPayloadPkg.dec + +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## PRODUCES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase ## PRODUCES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate ## PRODUCES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride ## PRODUCES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate ## PRODUCES + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate ## PRODUCES + gEfiMdeModulePkgTokenSpaceGuid.PcdPciSerialParameters ## PRODUCES + diff --git a/Platform/Intel/Stratix10/Library/S10ClockManager/S10ClockManag= er.inf b/Platform/Intel/Stratix10/Library/S10ClockManager/S10ClockManager.i= nf new file mode 100644 index 000000000000..c0eccd304810 --- /dev/null +++ b/Platform/Intel/Stratix10/Library/S10ClockManager/S10ClockManager.inf @@ -0,0 +1,34 @@ +## @file +# Clock Manager Library instance +# +# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x0001001B + BASE_NAME =3D S10ClockManagerLib + FILE_GUID =3D 90A73C58-A6E3-4EED-A1A3-6F9C7C3E998F + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D S10ClockManagerLib + +[Packages] + ArmPlatformPkg/ArmPlatformPkg.dec + ArmPkg/ArmPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Platform/Intel/Stratix10/Stratix10SoCPkg.dec + +[LibraryClasses] + ArmLib + ArmMmuLib + DebugLib + IoLib + PcdLib + +[Sources] + S10ClockManager.c + diff --git a/Platform/Intel/Stratix10/Include/Library/S10ClockManager/S10Cl= ockManager.h b/Platform/Intel/Stratix10/Include/Library/S10ClockManager/S10= ClockManager.h new file mode 100644 index 000000000000..f081a70a7a11 --- /dev/null +++ b/Platform/Intel/Stratix10/Include/Library/S10ClockManager/S10ClockMana= ger.h @@ -0,0 +1,48 @@ +/** @file +Stratix 10 Clock Manager header + +Copyright (c) 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef _S10_CLOCK_MANAGER_ +#define _S10_CLOCK_MANAGER_ +#define CLOCK_MANAGER_MAINPLL 0xffd10030 +#define CLOCK_MANAGER_MAINPLL_NOCCLK 0x4c + +#define CLOCK_MANAGER_PERPLL 0xffd100a4 +#define CLOCK_MANAGER_MAINPLL_PLLGLOB 0x44 +#define CLOCK_MANAGER_PERPLL_PLLGLOB 0x40 +#define CLOCK_MANAGER_MAINPLL_PLLGLOB_PSRC(x) (((x) >> 16) & 3) +#define CLOCK_MANAGER_CNTR6CLK 0x4c +#define CLOCK_MANAGER_PLLGLOB_PSRC_EOSC1 0 +#define CLOCK_MANAGER_PLLGLOB_PSRC_INTOSC 1 +#define CLOCK_MANAGER_PLLGLOB_PSRC_F2S 2 +#define CLOCK_MANAGER_SRC 16 +#define CLOCK_MANAGER_SRC_MSK 0x7 +#define CLOCK_MANAGER_SRC_MAIN (0) +#define CLOCK_MANAGER_SRC_PERI (1) +#define CLOCK_MANAGER_SRC_OSC1 (2) +#define CLOCK_MANAGER_SRC_INTOSC (3) +#define CLOCK_MANAGER_SRC_FPGA (4) +#define CLOCK_MANAGER_FDBCK 0x44 +#define CLOCK_MANAGER_FDBCK_MDIV(x) ((x) >> 24 & 0xff) +#define CLOCK_MANAGER_PERPLL_FDBCK 0x48 +#define CLOCK_MANAGER_CNT_MSK 0x3ff +#define CLOCK_MANAGER_PERPLL_CNTR6CLK 0x28 +#define CLOCK_MANAGER_PLLGLOB_REFCLKDIV(x) (((x) >> 8) & 0x3f) +#define CLOCK_MANAGER_PLLC1_DIV(x) ((x) & 0x7f) +#define CLOCK_MANAGER_PLLC1 0x54 +#define CLOCK_MANAGER_NOCDIV_L4SPCLK(x) ((x) >> 16 & 0x3) +#define CLOCK_MANAGER_MAINPLL_NOCDIV 0x40 + +#define S10_SYSTEM_MANAGER 0xffd12000 +#define S10_SYSTEM_MANAGER_BOOTSCRATCH_COLD1 0x204 +#define S10_SYSTEM_MANAGER_BOOTSCRATCH_COLD2 0x208 +#define S10_CLOCK_INTOSC 460000000 + +UINT32 S10ClockManagerGetMmcClock(); +UINT32 S10ClockManagerGetUartClock(); + +#endif diff --git a/Platform/Intel/Stratix10/Library/PlatformHookLib/PlatformHookL= ib.c b/Platform/Intel/Stratix10/Library/PlatformHookLib/PlatformHookLib.c new file mode 100644 index 000000000000..a204718909df --- /dev/null +++ b/Platform/Intel/Stratix10/Library/PlatformHookLib/PlatformHookLib.c @@ -0,0 +1,43 @@ +/** @file + Platform Hook Library + +Copyright (c) 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include +#include + +/** + Performs platform specific initialization required for the CPU to access + the hardware associated with a SerialPortLib instance. This function do= es + not initialize the serial port hardware itself. Instead, it initializes + hardware devices that are required for the CPU to access the serial port + hardware. This function may be called more than once. + + @retval RETURN_SUCCESS The platform specific initialization succee= ded. + @retval RETURN_DEVICE_ERROR The platform specific initialization could = not be completed. + +**/ +RETURN_STATUS +EFIAPI +PlatformHookSerialPortInitialize ( + VOID + ) +{ + RETURN_STATUS Status; + + Status =3D PcdSet32S (PcdSerialClockRate, S10ClockManagerGetUartClock()); + + if (RETURN_ERROR (Status)) { + return Status; + } + + return RETURN_SUCCESS; +} diff --git a/Platform/Intel/Stratix10/Library/S10ClockManager/S10ClockManag= er.c b/Platform/Intel/Stratix10/Library/S10ClockManager/S10ClockManager.c new file mode 100644 index 000000000000..5e6fe283646d --- /dev/null +++ b/Platform/Intel/Stratix10/Library/S10ClockManager/S10ClockManager.c @@ -0,0 +1,133 @@ +/** @file +Stratix 10 Clock Manager + +Copyright (c) 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include + +UINT32 +S10ClockManagerGetPerClock() { + UINT32 PllGlob, MDiv, RefClkDiv, RefClk; + + PllGlob =3D MmioRead32(CLOCK_MANAGER_PERPLL + CLOCK_MANAGER_PERPLL_PLLGL= OB); + + switch (CLOCK_MANAGER_MAINPLL_PLLGLOB_PSRC(PllGlob)) { + case CLOCK_MANAGER_PLLGLOB_PSRC_EOSC1: + RefClk =3D MmioRead32(S10_SYSTEM_MANAGER + S10_SYSTEM_MANAGER_BOOTSCRA= TCH_COLD1); + RefClk =3D 2500000; + break; + case CLOCK_MANAGER_PLLGLOB_PSRC_INTOSC: + RefClk =3D S10_CLOCK_INTOSC; + break; + case CLOCK_MANAGER_PLLGLOB_PSRC_F2S: + RefClk =3D MmioRead32(S10_SYSTEM_MANAGER + S10_SYSTEM_MANAGER_BOOTSCRA= TCH_COLD2); + RefClk =3D 5000000; + break; + } + + RefClkDiv =3D CLOCK_MANAGER_PLLGLOB_REFCLKDIV(PllGlob); + + MDiv =3D MmioRead32(CLOCK_MANAGER_MAINPLL + CLOCK_MANAGER_FDBCK); + + return (RefClk / RefClkDiv) * (6 + MDiv); +} + +UINT32 +S10ClockManagerGetMainClock() { + UINT32 PllGlob, MDiv, RefClkDiv, RefClk; + + PllGlob =3D MmioRead32(CLOCK_MANAGER_MAINPLL + CLOCK_MANAGER_MAINPLL_PLL= GLOB); + + switch (CLOCK_MANAGER_MAINPLL_PLLGLOB_PSRC(PllGlob)) { + case CLOCK_MANAGER_PLLGLOB_PSRC_EOSC1: + RefClk =3D MmioRead32(S10_SYSTEM_MANAGER + S10_SYSTEM_MANAGER_BOOTSCRA= TCH_COLD1); + RefClk =3D 2500000; + break; + case CLOCK_MANAGER_PLLGLOB_PSRC_INTOSC: + RefClk =3D S10_CLOCK_INTOSC; + break; + case CLOCK_MANAGER_PLLGLOB_PSRC_F2S: + RefClk =3D MmioRead32(S10_SYSTEM_MANAGER + S10_SYSTEM_MANAGER_BOOTSCRA= TCH_COLD2); + RefClk =3D 5000000; + break; + } + + RefClkDiv =3D CLOCK_MANAGER_PLLGLOB_REFCLKDIV(PllGlob); + MDiv =3D CLOCK_MANAGER_FDBCK_MDIV(MmioRead32(CLOCK_MANAGER_MAINPLL + CLO= CK_MANAGER_PERPLL_FDBCK)); + + return (RefClk / RefClkDiv) * (6 + MDiv); +} + +INTN +S10ClockManagerGetL3MainClock() { + UINT32 Clock; + UINT32 ClockSrc =3D MmioRead32(CLOCK_MANAGER_MAINPLL + CLOCK_MANAGER_MAI= NPLL_NOCCLK); + + ClockSrc =3D (ClockSrc >> CLOCK_MANAGER_SRC) & CLOCK_MANAGER_SRC_MSK; + + switch (ClockSrc) { + case CLOCK_MANAGER_SRC_MAIN: + Clock =3D S10ClockManagerGetMainClock() / + CLOCK_MANAGER_PLLC1_DIV(MmioRead32(CLOCK_MANAGER_MAINPLL + CLOCK_MAN= AGER_PLLC1)); + break; + case CLOCK_MANAGER_SRC_PERI: + Clock =3D S10ClockManagerGetPerClock() / + CLOCK_MANAGER_PLLC1_DIV(MmioRead32(CLOCK_MANAGER_PERPLL + CLOCK_MANA= GER_PLLC1)); + break; + case CLOCK_MANAGER_SRC_OSC1: + Clock =3D MmioRead32(S10_SYSTEM_MANAGER + S10_SYSTEM_MANAGER_BOOTSCRAT= CH_COLD1); + break; + case CLOCK_MANAGER_SRC_INTOSC: + Clock =3D S10_CLOCK_INTOSC; + break; + case CLOCK_MANAGER_SRC_FPGA: + Clock =3D MmioRead32(S10_SYSTEM_MANAGER + S10_SYSTEM_MANAGER_BOOTSCRAT= CH_COLD2); + break; + } + + Clock /=3D 1 + (MmioRead32(CLOCK_MANAGER_MAINPLL + CLOCK_MANAGER_MAINPLL= _NOCCLK) & CLOCK_MANAGER_CNT_MSK); + + return Clock; +} + +UINT32 +S10ClockManagerGetUartClock() { + return S10ClockManagerGetL3MainClock() / + (1 << (CLOCK_MANAGER_NOCDIV_L4SPCLK(MmioRead32(CLOCK_MANAGER_= MAINPLL_NOCDIV)))); +} + +UINT32 +S10ClockManagerGetMmcClock() { + UINT32 Clock =3D MmioRead32(CLOCK_MANAGER_PERPLL + CLOCK_MANAGER_PERPLL_= CNTR6CLK); + + Clock =3D (Clock >> CLOCK_MANAGER_SRC) & CLOCK_MANAGER_SRC_MSK; + + switch (Clock) { + case CLOCK_MANAGER_SRC_MAIN: + Clock =3D S10ClockManagerGetL3MainClock(); + Clock /=3D 1 + (MmioRead32(CLOCK_MANAGER_PERPLL + CLOCK_MANAGER_PERPL= L_CNTR6CLK) & + CLOCK_MANAGER_CNT_MSK); + break; + case CLOCK_MANAGER_SRC_PERI: + Clock =3D S10ClockManagerGetPerClock(); + Clock /=3D 1 + (MmioRead32(CLOCK_MANAGER_PERPLL + CLOCK_MANAGER_PERPL= L_CNTR6CLK) & + CLOCK_MANAGER_CNT_MSK); + break; + case CLOCK_MANAGER_SRC_OSC1: + Clock =3D MmioRead32(S10_SYSTEM_MANAGER + S10_SYSTEM_MANAGER_BOOTSCRAT= CH_COLD1); + break; + case CLOCK_MANAGER_SRC_INTOSC: + Clock =3D S10_CLOCK_INTOSC; + break; + case CLOCK_MANAGER_SRC_FPGA: + Clock =3D MmioRead32(S10_SYSTEM_MANAGER + S10_SYSTEM_MANAGER_BOOTSCRAT= CH_COLD2); + break; + } + + return Clock / 4; +} + --=20 2.19.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#46881): https://edk2.groups.io/g/devel/message/46881 Mute This Topic: https://groups.io/mt/33151033/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-