From nobody Mon Apr 29 07:18:47 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+46427+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+46427+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1566896170; cv=none; d=zoho.com; s=zohoarc; b=ctHNb2smOjdhybFnygYXOJ/JYoWNXM8VVoBAsVXvyITgfRC/ODbtRga9wsVlmwiD64H8hVhfVpmH1RE1OgV7BVSlYbBkSv0k2Rh7uENwPvOa6DJuN2niCMNJnnzCtr97Q2MgaY16A9X4dFR79MzdePuaO2oLRWD4hrl6bEtLtyM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1566896170; h=Cc:Date:From:List-Id:List-Unsubscribe:Message-ID:Reply-To:Sender:Subject:To:ARC-Authentication-Results; bh=J4/tRK34CXLULj3EU49MDtHUo4XSKMZF0HAyJc2Y6l8=; b=N1bJygbJpJxNqwGPyBjzthmhbcVJuE1s6k+/YUVbVswi/jjG9S5EHpiUuHGAe0iYvipJHCeG5LUUlm/fNJwOZzN1y25KlKDVT4XKCAB3xb8DYuM02CllUAezA7RjYKjbBEBJ5fp8EQgGEbbhJtoCq4+9Svh4vgq6MGS++0OIqQE= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+46427+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1566896170319362.7568301395221; Tue, 27 Aug 2019 01:56:10 -0700 (PDT) Return-Path: X-Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by groups.io with SMTP; Tue, 27 Aug 2019 01:56:09 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Aug 2019 01:56:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,436,1559545200"; d="scan'208";a="192126706" X-Received: from chenmarc-mobl.gar.corp.intel.com ([10.5.245.13]) by orsmga002.jf.intel.com with ESMTP; 27 Aug 2019 01:56:02 -0700 From: "Marc W Chen" To: devel@edk2.groups.io Cc: Marc Chen , Ray Ni , Rangasai V Chaganty Subject: [edk2-devel] [edk2-platforms:PATCH v5] IntelSiliconPkg/Feature Implement SmmAccess Date: Tue, 27 Aug 2019 16:55:57 +0800 Message-Id: <20190827085557.3560-1-marc.w.chen@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,marc.w.chen@intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1566896169; bh=Go3zLyrxm1uiBrw0lfd5SW/HxPiUuj48Kal8JBGiRRA=; h=Cc:Date:From:Reply-To:Subject:To; b=sQbYKQ87gtKwfnwEugHWm42wC6BcCsm7gVBYy6PznR1RTFfE7Vp9BOrbnrzD8Zbw3vP XqxTg4Du/YvWY+irP8rOYRVCfvzAcQ8VZngYcJleDS6lQ+jyPAJ9vRTuhc4ahEogv2960 Wet1E4Ua4EFdQ5x0hvIq+LW+e1eyx4dhwdc= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2121 Implement SmmAccess for PEI and DXE phase in IntelSiliconPkg Signed-off-by: Marc Chen Cc: Ray Ni Cc: Rangasai V Chaganty --- .../Library/PeiSmmAccessLib/PeiSmmAccessLib.c | 339 +++++++++++++++++= ++++ .../Library/PeiSmmAccessLib/PeiSmmAccessLib.inf | 41 +++ .../Feature/SmmAccess/SmmAccessDxe/SmmAccess.inf | 46 +++ .../SmmAccess/SmmAccessDxe/SmmAccessDriver.c | 267 ++++++++++++++++ .../SmmAccess/SmmAccessDxe/SmmAccessDriver.h | 160 ++++++++++ .../IntelSiliconPkg/Include/Library/SmmAccessLib.h | 28 ++ 6 files changed, 881 insertions(+) create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library= /PeiSmmAccessLib/PeiSmmAccessLib.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library= /PeiSmmAccessLib/PeiSmmAccessLib.inf create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/SmmAcce= ssDxe/SmmAccess.inf create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/SmmAcce= ssDxe/SmmAccessDriver.c create mode 100644 Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/SmmAcce= ssDxe/SmmAccessDriver.h create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Library/SmmAccess= Lib.h diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmm= AccessLib/PeiSmmAccessLib.c b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAcce= ss/Library/PeiSmmAccessLib/PeiSmmAccessLib.c new file mode 100644 index 0000000000..da141cfa0e --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessL= ib/PeiSmmAccessLib.c @@ -0,0 +1,339 @@ +/** @file + This is to publish the SMM Access Ppi instance. + + Copyright (c) 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#define SMM_ACCESS_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('4', '5', 's', 'a') + +/// +/// Private data +/// +typedef struct { + UINTN Signature; + EFI_HANDLE Handle; + EFI_PEI_MM_ACCESS_PPI SmmAccess; + // + // Local Data for SMM Access interface goes here + // + UINTN NumberRegions; + EFI_SMRAM_DESCRIPTOR *SmramDesc; +} SMM_ACCESS_PRIVATE_DATA; + +#define SMM_ACCESS_PRIVATE_DATA_FROM_THIS(a) \ + CR (a, \ + SMM_ACCESS_PRIVATE_DATA, \ + SmmAccess, \ + SMM_ACCESS_PRIVATE_DATA_SIGNATURE \ + ) + +/** + This routine accepts a request to "open" a region of SMRAM. The + region could be legacy ABSEG, HSEG, or TSEG near top of physical memory. + The use of "open" means that the memory is visible from all PEIM + and SMM agents. + + @param[in] This - Pointer to the SMM Access Interface. + @param[in] DescriptorIndex - Region of SMRAM to Open. + @param[in] PeiServices - General purpose services available to eve= ry PEIM. + + @retval EFI_SUCCESS - The region was successfully opened. + @retval EFI_DEVICE_ERROR - The region could not be opened because= locked by + chipset. + @retval EFI_INVALID_PARAMETER - The descriptor index was out of bounds. +**/ +EFI_STATUS +EFIAPI +Open ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_MM_ACCESS_PPI *This, + IN UINTN DescriptorIndex + ) +{ + SMM_ACCESS_PRIVATE_DATA *SmmAccess; + + SmmAccess =3D SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This); + if (DescriptorIndex >=3D SmmAccess->NumberRegions) { + DEBUG ((DEBUG_WARN, "SMRAM region out of range\n")); + + return EFI_INVALID_PARAMETER; + } else if (SmmAccess->SmramDesc[DescriptorIndex].RegionState & EFI_SMRAM= _LOCKED) { + // + // Cannot open a "locked" region + // + DEBUG ((DEBUG_WARN, "Cannot open a locked SMRAM region\n")); + + return EFI_DEVICE_ERROR; + } + + SmmAccess->SmramDesc[DescriptorIndex].RegionState &=3D (UINT64) ~(EFI_SM= RAM_CLOSED | EFI_ALLOCATED); + SmmAccess->SmramDesc[DescriptorIndex].RegionState |=3D (UINT64) EFI_SMRA= M_OPEN; + SmmAccess->SmmAccess.OpenState =3D TRUE; + return EFI_SUCCESS; +} + +/** + This routine accepts a request to "close" a region of SMRAM. This is va= lid for + compatible SMRAM region. + + @param[in] PeiServices - General purpose services available to eve= ry PEIM. + @param[in] This - Pointer to the SMM Access Interface. + @param[in] DescriptorIndex - Region of SMRAM to Close. + + @retval EFI_SUCCESS - The region was successfully closed. + @retval EFI_DEVICE_ERROR - The region could not be closed because= locked by + chipset. + @retval EFI_INVALID_PARAMETER - The descriptor index was out of bounds. +**/ +EFI_STATUS +EFIAPI +Close ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_MM_ACCESS_PPI *This, + IN UINTN DescriptorIndex + ) +{ + SMM_ACCESS_PRIVATE_DATA *SmmAccess; + BOOLEAN OpenState; + UINT8 Index; + + SmmAccess =3D SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This); + if (DescriptorIndex >=3D SmmAccess->NumberRegions) { + DEBUG ((DEBUG_WARN, "SMRAM region out of range\n")); + + return EFI_INVALID_PARAMETER; + } else if (SmmAccess->SmramDesc[DescriptorIndex].RegionState & EFI_SMRAM= _LOCKED) { + // + // Cannot close a "locked" region + // + DEBUG ((DEBUG_WARN, "Cannot close a locked SMRAM region\n")); + + return EFI_DEVICE_ERROR; + } + + if (SmmAccess->SmramDesc[DescriptorIndex].RegionState & EFI_SMRAM_CLOSED= ) { + return EFI_DEVICE_ERROR; + } + + SmmAccess->SmramDesc[DescriptorIndex].RegionState &=3D (UINT64) ~EFI_SMR= AM_OPEN; + SmmAccess->SmramDesc[DescriptorIndex].RegionState |=3D (UINT64) (EFI_SMR= AM_CLOSED | EFI_ALLOCATED); + + // + // Find out if any regions are still open + // + OpenState =3D FALSE; + for (Index =3D 0; Index < SmmAccess->NumberRegions; Index++) { + if ((SmmAccess->SmramDesc[Index].RegionState & EFI_SMRAM_OPEN) =3D=3D = EFI_SMRAM_OPEN) { + OpenState =3D TRUE; + } + } + + SmmAccess->SmmAccess.OpenState =3D OpenState; + return EFI_SUCCESS; +} + +/** + This routine accepts a request to "lock" SMRAM. The + region could be legacy AB or TSEG near top of physical memory. + The use of "lock" means that the memory can no longer be opened + to PEIM. + + @param[in] PeiServices - General purpose services available to ever= y PEIM. + @param[in] This - Pointer to the SMM Access Interface. + @param[in] DescriptorIndex - Region of SMRAM to Lock. + + @retval EFI_SUCCESS - The region was successfully locked. + @retval EFI_DEVICE_ERROR - The region could not be locked because= at least + one range is still open. + @retval EFI_INVALID_PARAMETER - The descriptor index was out of bounds. +**/ +EFI_STATUS +EFIAPI +Lock ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_MM_ACCESS_PPI *This, + IN UINTN DescriptorIndex + ) +{ + SMM_ACCESS_PRIVATE_DATA *SmmAccess; + + SmmAccess =3D SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This); + if (DescriptorIndex >=3D SmmAccess->NumberRegions) { + DEBUG ((DEBUG_WARN, "SMRAM region out of range\n")); + + return EFI_INVALID_PARAMETER; + } else if (SmmAccess->SmmAccess.OpenState) { + DEBUG ((DEBUG_WARN, "Cannot lock SMRAM when SMRAM regions are still op= en\n")); + + return EFI_DEVICE_ERROR; + } + + SmmAccess->SmramDesc[DescriptorIndex].RegionState |=3D (UINT64) EFI_SMRA= M_LOCKED; + SmmAccess->SmmAccess.LockState =3D TRUE; + + return EFI_SUCCESS; +} + +/** + This routine services a user request to discover the SMRAM + capabilities of this platform. This will report the possible + ranges that are possible for SMRAM access, based upon the + memory controller capabilities. + + @param[in] PeiServices - General purpose services available to every P= EIM. + @param[in] This - Pointer to the SMRAM Access Interface. + @param[in] SmramMapSize - Pointer to the variable containing size of t= he + buffer to contain the description informatio= n. + @param[in] SmramMap - Buffer containing the data describing the Sm= ram + region descriptors. + + @retval EFI_BUFFER_TOO_SMALL - The user did not provide a sufficient b= uffer. + @retval EFI_SUCCESS - The user provided a sufficiently-sized = buffer. +**/ +EFI_STATUS +EFIAPI +GetCapabilities ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_MM_ACCESS_PPI *This, + IN OUT UINTN *SmramMapSize, + IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap + ) +{ + EFI_STATUS Status; + SMM_ACCESS_PRIVATE_DATA *SmmAccess; + UINTN NecessaryBufferSize; + + SmmAccess =3D SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This); + NecessaryBufferSize =3D SmmAccess->NumberRegions * sizeof (EFI_SMRAM_DES= CRIPTOR); + if (*SmramMapSize < NecessaryBufferSize) { + DEBUG ((DEBUG_WARN, "SMRAM Map Buffer too small\n")); + + Status =3D EFI_BUFFER_TOO_SMALL; + } else { + CopyMem (SmramMap, SmmAccess->SmramDesc, NecessaryBufferSize); + Status =3D EFI_SUCCESS; + } + + *SmramMapSize =3D NecessaryBufferSize; + return Status; +} + +/** + This function is to install an SMM Access PPI + - Introduction \n + A module to install a PPI for controlling SMM mode memory access basic= ally for S3 resume usage. + + - @result + Publish _EFI_PEI_MM_ACCESS_PPI. + + @retval EFI_SUCCESS - Ppi successfully started and installed. + @retval EFI_NOT_FOUND - Ppi can't be found. + @retval EFI_OUT_OF_RESOURCES - Ppi does not have enough resources to = initialize the driver. +**/ +EFI_STATUS +EFIAPI +PeiInstallSmmAccessPpi ( + VOID + ) +{ + EFI_STATUS Status; + UINTN Index; + EFI_PEI_PPI_DESCRIPTOR *PpiList; + EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *DescriptorBlock; + SMM_ACCESS_PRIVATE_DATA *SmmAccessPrivate; + VOID *HobList; + EFI_BOOT_MODE BootMode; + + Status =3D PeiServicesGetBootMode (&BootMode); + if (EFI_ERROR (Status)) { + // + // If not in S3 boot path. do nothing + // + return EFI_SUCCESS; + } + + if (BootMode !=3D BOOT_ON_S3_RESUME) { + return EFI_SUCCESS; + } + // + // Initialize private data + // + SmmAccessPrivate =3D AllocateZeroPool (sizeof (*SmmAccessPrivate)); + ASSERT (SmmAccessPrivate !=3D NULL); + if (SmmAccessPrivate =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + PpiList =3D AllocateZeroPool (sizeof (*PpiList)); + ASSERT (PpiList !=3D NULL); + if (PpiList =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + + SmmAccessPrivate->Signature =3D SMM_ACCESS_PRIVATE_DATA_SIGNATURE; + SmmAccessPrivate->Handle =3D NULL; + + // + // Get Hob list + // + HobList =3D GetFirstGuidHob (&gEfiSmmSmramMemoryGuid); + if (HobList =3D=3D NULL) { + DEBUG ((DEBUG_WARN, "SmramMemoryReserve HOB not found\n")); + return EFI_NOT_FOUND; + } + + DescriptorBlock =3D (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *) ((UINT8 *) HobLis= t + sizeof (EFI_HOB_GUID_TYPE)); + + // + // Alloc space for SmmAccessPrivate->SmramDesc + // + SmmAccessPrivate->SmramDesc =3D AllocateZeroPool ((DescriptorBlock->Numb= erOfSmmReservedRegions) * sizeof (EFI_SMRAM_DESCRIPTOR)); + if (SmmAccessPrivate->SmramDesc =3D=3D NULL) { + DEBUG ((DEBUG_WARN, "Alloc SmmAccessPrivate->SmramDesc fail.\n")); + return EFI_OUT_OF_RESOURCES; + } + + DEBUG ((DEBUG_INFO, "Alloc SmmAccessPrivate->SmramDesc success.\n")); + + // + // use the hob to publish SMRAM capabilities + // + for (Index =3D 0; Index < DescriptorBlock->NumberOfSmmReservedRegions; I= ndex++) { + SmmAccessPrivate->SmramDesc[Index].PhysicalStart =3D DescriptorBlock-= >Descriptor[Index].PhysicalStart; + SmmAccessPrivate->SmramDesc[Index].CpuStart =3D DescriptorBlock-= >Descriptor[Index].CpuStart; + SmmAccessPrivate->SmramDesc[Index].PhysicalSize =3D DescriptorBlock-= >Descriptor[Index].PhysicalSize; + SmmAccessPrivate->SmramDesc[Index].RegionState =3D DescriptorBlock-= >Descriptor[Index].RegionState; + } + + SmmAccessPrivate->NumberRegions =3D Index; + SmmAccessPrivate->SmmAccess.Open =3D Open; + SmmAccessPrivate->SmmAccess.Close =3D Close; + SmmAccessPrivate->SmmAccess.Lock =3D Lock; + SmmAccessPrivate->SmmAccess.GetCapabilities =3D GetCapabilities; + SmmAccessPrivate->SmmAccess.LockState =3D FALSE; + SmmAccessPrivate->SmmAccess.OpenState =3D FALSE; + + // + // Install PPI + // + PpiList->Flags =3D (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR= _TERMINATE_LIST); + PpiList->Guid =3D &gEfiPeiMmAccessPpiGuid; + PpiList->Ppi =3D &SmmAccessPrivate->SmmAccess; + + Status =3D PeiServicesInstallPpi (PpiList); + ASSERT_EFI_ERROR (Status); + + return EFI_SUCCESS; +} diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmm= AccessLib/PeiSmmAccessLib.inf b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAc= cess/Library/PeiSmmAccessLib/PeiSmmAccessLib.inf new file mode 100644 index 0000000000..0c2411ea57 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessL= ib/PeiSmmAccessLib.inf @@ -0,0 +1,41 @@ +## @file +# Library description file for the SmmAccess +# +# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + + +[Defines] +INF_VERSION =3D 0x00010017 +BASE_NAME =3D PeiSmmAccessLib +FILE_GUID =3D 54020881-B594-442A-8377-A57AFF98C7CF +VERSION_STRING =3D 1.0 +MODULE_TYPE =3D PEIM +LIBRARY_CLASS =3D SmmAccessLib + + +[LibraryClasses] +BaseLib +BaseMemoryLib +HobLib +PciSegmentLib +PeiServicesLib + + +[Packages] +MdePkg/MdePkg.dec +IntelSiliconPkg/IntelSiliconPkg.dec + + +[Sources] +PeiSmmAccessLib.c + + +[Ppis] +gEfiPeiMmAccessPpiGuid ## PRODUCES + + +[Guids] +gEfiSmmSmramMemoryGuid diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/S= mmAccess.inf b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe= /SmmAccess.inf new file mode 100644 index 0000000000..34dc65d7a3 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAcces= s.inf @@ -0,0 +1,46 @@ +## @file +# Component description file for the SmmAccess module +# +# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + + +[Defines] +INF_VERSION =3D 0x00010017 +BASE_NAME =3D SmmAccess +FILE_GUID =3D 1323C7F8-DAD5-4126-A54B-7A05FBF41515 +VERSION_STRING =3D 1.0 +MODULE_TYPE =3D DXE_DRIVER +ENTRY_POINT =3D SmmAccessDriverEntryPoint + + +[LibraryClasses] +UefiDriverEntryPoint +BaseLib +BaseMemoryLib +DebugLib +HobLib + + +[Packages] +MdePkg/MdePkg.dec +IntelSiliconPkg/IntelSiliconPkg.dec + + +[Sources] +SmmAccessDriver.h +SmmAccessDriver.c + + +[Protocols] +gEfiSmmAccess2ProtocolGuid ## PRODUCES + + +[Guids] +gEfiSmmSmramMemoryGuid + + +[Depex] +TRUE diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/S= mmAccessDriver.c b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/SmmAcces= sDxe/SmmAccessDriver.c new file mode 100644 index 0000000000..3d3c4ab206 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAcces= sDriver.c @@ -0,0 +1,267 @@ +/** @file + This is the driver that publishes the SMM Access Protocol + instance for System Agent. + + Copyright (c) 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ +#include "SmmAccessDriver.h" + +static SMM_ACCESS_PRIVATE_DATA mSmmAccess; + +/** + This is the standard EFI driver point that + installs an SMM Access Protocol + + @param[in] ImageHandle - Handle for the image of this driver + @param[in] SystemTable - Pointer to the EFI System Table + + @retval EFI_SUCCESS - Protocol was installed successfully + @exception EFI_UNSUPPORTED - Protocol was not installed + @retval EFI_NOT_FOUND - Protocol can't be found. + @retval EFI_OUT_OF_RESOURCES - Protocol does not have enough resources = to initialize the driver. +**/ +EFI_STATUS +EFIAPI +SmmAccessDriverEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + UINTN Index; + EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *DescriptorBlock; + EFI_PEI_HOB_POINTERS *Hob; + + // + // Initialize Global variables + // + ZeroMem (&mSmmAccess, sizeof (mSmmAccess)); + + mSmmAccess.Signature =3D SMM_ACCESS_PRIVATE_DATA_SIGNATURE; + mSmmAccess.Handle =3D NULL; + + // + // Get Hob list + // + Hob =3D GetFirstGuidHob (&gEfiSmmSmramMemoryGuid); + if (Hob =3D=3D NULL) { + DEBUG ((DEBUG_WARN, "SmramMemoryReserve HOB not found\n")); + return EFI_NOT_FOUND; + } + + DescriptorBlock =3D (VOID *) ((UINT8 *) Hob + sizeof (EFI_HOB_GUID_TYPE)= ); + + // + // Alloc space for mSmmAccess.SmramDesc + // + mSmmAccess.SmramDesc =3D AllocateZeroPool ((DescriptorBlock->NumberOfSmm= ReservedRegions) * sizeof (EFI_SMRAM_DESCRIPTOR)); + if (mSmmAccess.SmramDesc =3D=3D NULL) { + DEBUG ((DEBUG_WARN, "Alloc mSmmAccess.SmramDesc fail.\n")); + return EFI_OUT_OF_RESOURCES; + } + + DEBUG ((DEBUG_INFO, "Alloc mSmmAccess.SmramDesc success.\n")); + + // + // Use the HOB to publish SMRAM capabilities + // + for (Index =3D 0; Index < DescriptorBlock->NumberOfSmmReservedRegions; I= ndex++) { + mSmmAccess.SmramDesc[Index].PhysicalStart =3D DescriptorBlock->Descrip= tor[Index].PhysicalStart; + mSmmAccess.SmramDesc[Index].CpuStart =3D DescriptorBlock->Descrip= tor[Index].CpuStart; + mSmmAccess.SmramDesc[Index].PhysicalSize =3D DescriptorBlock->Descrip= tor[Index].PhysicalSize; + mSmmAccess.SmramDesc[Index].RegionState =3D DescriptorBlock->Descrip= tor[Index].RegionState; + } + + mSmmAccess.NumberRegions =3D Index; + mSmmAccess.SmmAccess.Open =3D Open; + mSmmAccess.SmmAccess.Close =3D Close; + mSmmAccess.SmmAccess.Lock =3D Lock; + mSmmAccess.SmmAccess.GetCapabilities =3D GetCapabilities; + mSmmAccess.SmmAccess.LockState =3D FALSE; + mSmmAccess.SmmAccess.OpenState =3D FALSE; + + // + // Install our protocol interfaces on the device's handle + // + Status =3D gBS->InstallMultipleProtocolInterfaces ( + &mSmmAccess.Handle, + &gEfiSmmAccess2ProtocolGuid, + &mSmmAccess.SmmAccess, + NULL + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_WARN, "InstallMultipleProtocolInterfaces returned %r\n",= Status)); + return EFI_UNSUPPORTED; + } + + return EFI_SUCCESS; +} + +/** + This routine accepts a request to "open" a region of SMRAM. The + region could be legacy ABSEG, HSEG, or TSEG near top of physical memory. + The use of "open" means that the memory is visible from all boot-service + and SMM agents. + + @param[in] This - Pointer to the SMM Access Interface. + + @retval EFI_SUCCESS - The region was successfully opened. + @retval EFI_DEVICE_ERROR - The region could not be opened because l= ocked by + chipset. + @retval EFI_INVALID_PARAMETER - The descriptor index was out of bounds. +**/ +EFI_STATUS +EFIAPI +Open ( + IN EFI_SMM_ACCESS2_PROTOCOL *This + ) +{ + SMM_ACCESS_PRIVATE_DATA *SmmAccess; + UINTN DescriptorIndex; + + SmmAccess =3D SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This); + for (DescriptorIndex =3D 0; DescriptorIndex < SmmAccess->NumberRegions; = DescriptorIndex++) { + if (SmmAccess->SmramDesc[DescriptorIndex].RegionState & EFI_SMRAM_LOCK= ED) { + DEBUG ((DEBUG_WARN, "Cannot open a locked SMRAM region\n")); + return EFI_DEVICE_ERROR; + } + } + + for (DescriptorIndex =3D 0; DescriptorIndex < SmmAccess->NumberRegions; = DescriptorIndex++) { + SmmAccess->SmramDesc[DescriptorIndex].RegionState &=3D (UINT64) ~(EFI_= SMRAM_CLOSED | EFI_ALLOCATED); + SmmAccess->SmramDesc[DescriptorIndex].RegionState |=3D (UINT64) EFI_SM= RAM_OPEN; + } + SmmAccess->SmmAccess.OpenState =3D TRUE; + return EFI_SUCCESS; +} + +/** + This routine accepts a request to "close" a region of SMRAM. The + region could be legacy AB or TSEG near top of physical memory. + The use of "close" means that the memory is only visible from SMM agents, + not from BS or RT code. + + @param[in] This - Pointer to the SMM Access Interface. + + @retval EFI_SUCCESS - The region was successfully closed. + @retval EFI_DEVICE_ERROR - The region could not be closed because l= ocked by chipset. + @retval EFI_INVALID_PARAMETER - The descriptor index was out of bounds. +**/ +EFI_STATUS +EFIAPI +Close ( + IN EFI_SMM_ACCESS2_PROTOCOL *This + ) +{ + SMM_ACCESS_PRIVATE_DATA *SmmAccess; + BOOLEAN OpenState; + UINT8 Index; + UINTN DescriptorIndex; + + SmmAccess =3D SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This); + + for (DescriptorIndex =3D 0; DescriptorIndex < SmmAccess->NumberRegions; = DescriptorIndex++) { + if (SmmAccess->SmramDesc[DescriptorIndex].RegionState & EFI_SMRAM_LOCK= ED) { + DEBUG ((DEBUG_WARN, "Cannot close a locked SMRAM region\n")); + continue; + } + + SmmAccess->SmramDesc[DescriptorIndex].RegionState &=3D (UINT64) ~EFI_S= MRAM_OPEN; + SmmAccess->SmramDesc[DescriptorIndex].RegionState |=3D (UINT64) (EFI_S= MRAM_CLOSED | EFI_ALLOCATED); + } + + // + // Find out if any regions are still open + // + OpenState =3D FALSE; + for (Index =3D 0; Index < mSmmAccess.NumberRegions; Index++) { + if ((SmmAccess->SmramDesc[Index].RegionState & EFI_SMRAM_OPEN) =3D=3D = EFI_SMRAM_OPEN) { + OpenState =3D TRUE; + } + } + + SmmAccess->SmmAccess.OpenState =3D OpenState; + return EFI_SUCCESS; +} + +/** + This routine accepts a request to "lock" SMRAM. The + region could be legacy AB or TSEG near top of physical memory. + The use of "lock" means that the memory can no longer be opened + to BS state.. + + @param[in] This - Pointer to the SMM Access Interface. + + @retval EFI_SUCCESS - The region was successfully locked. + @retval EFI_DEVICE_ERROR - The region could not be locked because a= t least + one range is still open. + @retval EFI_INVALID_PARAMETER - The descriptor index was out of bounds. +**/ +EFI_STATUS +EFIAPI +Lock ( + IN EFI_SMM_ACCESS2_PROTOCOL *This + ) +{ + SMM_ACCESS_PRIVATE_DATA *SmmAccess; + UINTN DescriptorIndex; + + SmmAccess =3D SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This); + + if (SmmAccess->SmmAccess.OpenState) { + DEBUG ((DEBUG_WARN, "Cannot lock SMRAM when SMRAM regions are still op= en\n")); + return EFI_DEVICE_ERROR; + } + for (DescriptorIndex =3D 0; DescriptorIndex < SmmAccess->NumberRegions; = DescriptorIndex++) { + SmmAccess->SmramDesc[DescriptorIndex].RegionState |=3D EFI_SMRAM_LOCKE= D; + } + SmmAccess->SmmAccess.LockState =3D TRUE; + + return EFI_SUCCESS; +} + +/** + This routine services a user request to discover the SMRAM + capabilities of this platform. This will report the possible + ranges that are possible for SMRAM access, based upon the + memory controller capabilities. + + @param[in] This - Pointer to the SMRAM Access Interface. + @param[in] SmramMapSize - Pointer to the variable containing si= ze of the + buffer to contain the description inf= ormation. + @param[in] SmramMap - Buffer containing the data describing= the Smram + region descriptors. + + @retval EFI_BUFFER_TOO_SMALL - The user did not provide a sufficient bu= ffer. + @retval EFI_SUCCESS - The user provided a sufficiently-sized b= uffer. +**/ +EFI_STATUS +EFIAPI +GetCapabilities ( + IN CONST EFI_SMM_ACCESS2_PROTOCOL *This, + IN OUT UINTN *SmramMapSize, + IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap + ) +{ + EFI_STATUS Status; + SMM_ACCESS_PRIVATE_DATA *SmmAccess; + UINTN NecessaryBufferSize; + + SmmAccess =3D SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This); + + NecessaryBufferSize =3D SmmAccess->NumberRegions * sizeof (EFI_SMRAM_DES= CRIPTOR); + + if (*SmramMapSize < NecessaryBufferSize) { + DEBUG ((DEBUG_WARN, "SMRAM Map Buffer too small\n")); + Status =3D EFI_BUFFER_TOO_SMALL; + } else { + CopyMem (SmramMap, SmmAccess->SmramDesc, NecessaryBufferSize); + Status =3D EFI_SUCCESS; + } + + *SmramMapSize =3D NecessaryBufferSize; + + return Status; +} diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/S= mmAccessDriver.h b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/SmmAcces= sDxe/SmmAccessDriver.h new file mode 100644 index 0000000000..c0ff3a250b --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAcces= sDriver.h @@ -0,0 +1,160 @@ +/** @file + Header file for SMM Access Driver. + + Copyright (c) 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ +#ifndef _SMM_ACCESS_DRIVER_H_ +#define _SMM_ACCESS_DRIVER_H_ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#define SMM_ACCESS_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('4', '5', 's', 'a') + +/// +/// Private data +/// +typedef struct { + UINTN Signature; + EFI_HANDLE Handle; + EFI_SMM_ACCESS2_PROTOCOL SmmAccess; + + /// + /// Local Data for SMM Access interface goes here + /// + UINTN NumberRegions; + EFI_SMRAM_DESCRIPTOR *SmramDesc; +} SMM_ACCESS_PRIVATE_DATA; + +#define SMM_ACCESS_PRIVATE_DATA_FROM_THIS(a) \ + CR (a, \ + SMM_ACCESS_PRIVATE_DATA, \ + SmmAccess, \ + SMM_ACCESS_PRIVATE_DATA_SIGNATURE \ + ) + +// +// Prototypes +// Driver model protocol interface +// +/** + SMM Access Driver Entry Point + This driver installs an SMM Access Protocol + - Introduction \n + This module publishes the SMM access protocol. The protocol is used b= y the SMM Base driver to access the SMRAM region when the processor is not = in SMM. + The SMM Base driver uses the services provided by the SMM access proto= col to open SMRAM during post and copy the SMM handler. + SMM access protocol is also used to close the SMRAM region once the co= pying is done. + Finally, the SMM access protocol provides services to "Lock" the SMRAM= region. + Please refer the SMM Protocols section in the attached SMM CIS Specifi= cation version 0.9 for further details. + This driver is required if SMM is supported. Proper configuration of S= MM registers is recommended even if SMM is not supported. + + - @result + Publishes the _EFI_SMM_ACCESS_PROTOCOL: Documented in the System Manag= ement Mode Core Interface Specification, available at the URL: http://www.i= ntel.com/technology/framework/spec.htm + + - Porting Recommendations \n + No modification of this module is recommended. Any modification shoul= d be done in compliance with the _EFI_SMM_ACCESS_PROTOCOL protocol definiti= on. + + @param[in] ImageHandle - Handle for the image of this driver + @param[in] SystemTable - Pointer to the EFI System Table + + @retval EFI_SUCCESS - Protocol was installed successfully + @exception EFI_UNSUPPORTED - Protocol was not installed +**/ +EFI_STATUS +EFIAPI +SmmAccessDriverEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); + +/** + This routine accepts a request to "open" a region of SMRAM. The + region could be legacy ABSEG, HSEG, or TSEG near top of physical memory. + The use of "open" means that the memory is visible from all boot-service + and SMM agents. + + @param[in] This - Pointer to the SMM Access Interface. + + @retval EFI_SUCCESS - The region was successfully opened. + @retval EFI_DEVICE_ERROR - The region could not be opened because l= ocked by + chipset. + @retval EFI_INVALID_PARAMETER - The descriptor index was out of bounds. +**/ +EFI_STATUS +EFIAPI +Open ( + IN EFI_SMM_ACCESS2_PROTOCOL *This + ); + +/** + This routine accepts a request to "close" a region of SMRAM. The + region could be legacy AB or TSEG near top of physical memory. + The use of "close" means that the memory is only visible from SMM agents, + not from BS or RT code. + + @param[in] This - Pointer to the SMM Access Interface. + + @retval EFI_SUCCESS - The region was successfully closed. + @retval EFI_DEVICE_ERROR - The region could not be closed because l= ocked by + chipset. + @retval EFI_INVALID_PARAMETER - The descriptor index was out of bounds. +**/ +EFI_STATUS +EFIAPI +Close ( + IN EFI_SMM_ACCESS2_PROTOCOL *This + ); + +/** + This routine accepts a request to "lock" SMRAM. The + region could be legacy AB or TSEG near top of physical memory. + The use of "lock" means that the memory can no longer be opened + to BS state.. + + @param[in] This - Pointer to the SMM Access Interface. + + @retval EFI_SUCCESS - The region was successfully locked. + @retval EFI_DEVICE_ERROR - The region could not be locked because a= t least + one range is still open. + @retval EFI_INVALID_PARAMETER - The descriptor index was out of bounds. +**/ +EFI_STATUS +EFIAPI +Lock ( + IN EFI_SMM_ACCESS2_PROTOCOL *This + ); + +/** + This routine services a user request to discover the SMRAM + capabilities of this platform. This will report the possible + ranges that are possible for SMRAM access, based upon the + memory controller capabilities. + + @param[in] This - Pointer to the SMRAM Access Interface. + @param[in] SmramMapSize - Pointer to the variable containing si= ze of the + buffer to contain the description information. + @param[in] SmramMap - Buffer containing the data describing= the Smram + region descriptors. + + @retval EFI_BUFFER_TOO_SMALL - The user did not provide a sufficient bu= ffer. + @retval EFI_SUCCESS - The user provided a sufficiently-sized b= uffer. +**/ +EFI_STATUS +EFIAPI +GetCapabilities ( + IN CONST EFI_SMM_ACCESS2_PROTOCOL *This, + IN OUT UINTN *SmramMapSize, + IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap + ); +#endif diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Library/SmmAccessLib.h b= /Silicon/Intel/IntelSiliconPkg/Include/Library/SmmAccessLib.h new file mode 100644 index 0000000000..f658bac68c --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Include/Library/SmmAccessLib.h @@ -0,0 +1,28 @@ +/** @file + Header file for SMM Access Driver. + + Copyright (c) 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ +#ifndef _SMM_ACCESS_LIB_H_ +#define _SMM_ACCESS_LIB_H_ + +/** + This function is to install an SMM Access PPI + - Introduction \n + A module to install a PPI for controlling SMM mode memory access basic= ally for S3 resume usage. + + - @result + Publish _PEI_MM_ACCESS_PPI. + + @retval EFI_SUCCESS - Ppi successfully started and installed. + @retval EFI_NOT_FOUND - Ppi can't be found. + @retval EFI_OUT_OF_RESOURCES - Ppi does not have enough resources to = initialize the driver. +**/ +EFI_STATUS +EFIAPI +PeiInstallSmmAccessPpi ( + VOID + ); +#endif --=20 2.16.2.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#46427): https://edk2.groups.io/g/devel/message/46427 Mute This Topic: https://groups.io/mt/33044024/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-