From nobody Wed May 8 14:13:52 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+46197+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+46197+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1566451688; cv=none; d=zoho.com; s=zohoarc; b=IJPJETa3BEcqfYst7YGAZK/pWl2n4D3Q9L68gTvz9k99NaVyE092FD6rCRs1zqzeXCfCs88aQ33+byDBYeibZt9a2Ds186vrc2Ql2s4B5irOENNodyiyts05gZa8iRX7wz2zsf0zAwloj1dYOZ+DtN+3Ibr3HuH42VhBSh8WcmU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1566451688; h=Cc:Date:From:List-Id:List-Unsubscribe:Message-ID:Reply-To:Sender:Subject:To:ARC-Authentication-Results; bh=nrS+JKasqFXDKaV09BWFYLl2hjFJo4+JqFdTNRzubAM=; b=ARY1/iEDmGX6Jdy/Lum8JdM1UIPuR2qtBFwlz2Ot0crE+e+eEuH+ZpMTIvVAJXi2qZKFL8XbHwNsVxt2otkYA76oa7c5RyZZ+yG5RdFVjkNmcCAxAGnT04kidIbzUaaMrrgnD2eQD4sR/9/dg5rKfeowdXYWywDY4maijGTjQHo= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+46197+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1566451688675410.53233830391673; Wed, 21 Aug 2019 22:28:08 -0700 (PDT) Return-Path: X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by groups.io with SMTP; Wed, 21 Aug 2019 22:28:07 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Aug 2019 22:28:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,415,1559545200"; d="scan'208";a="180264243" X-Received: from chenmarc-mobl.gar.corp.intel.com ([10.5.245.65]) by fmsmga007.fm.intel.com with ESMTP; 21 Aug 2019 22:28:04 -0700 From: "Marc W Chen" To: devel@edk2.groups.io Cc: Sai Chaganty , Chasel Chiu , Liming Gao , Nate DeSimone , Kelly Steele , Thad Gillispie , Daocheng Bu , Isaac W Oram Subject: [edk2-devel] [PATCH] Intel/* clean up duplicated files in Edk2Platforms Date: Thu, 22 Aug 2019 13:27:35 +0800 Message-Id: <20190822052735.14816-1-marc.w.chen@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,marc.w.chen@intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1566451688; bh=Wc4TlXUQjX2Lc/XBpSgtw6jlm2D/wCUkwjp2nDVROmk=; h=Cc:Date:From:Reply-To:Subject:To; b=EqpneHYcfIh82wTzTb3KyOoEbyxrHZDfuET/KtQVrCkjYJImDxYu5+lvG4RHATnE6rG glT15F2QyAgMTq9kLeTZs6CxEZRbquv6nmIkMcmkRmKud62RfGEgTnn9YHfgJuSCsJePQ pIQLpmPpz1GYswirH/kD1JS/ciS5tiwa3cI= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2108 SmramMemoryReserve.h has been added into Edk2\MdePkg\Include\Guid\SmramMemoryReserve.h. The following duplicated header file can be clean up. Edk2Platforms\Platform\Intel\MinPlatformPkg\Include\Guid\SmramMemoryReserve= .h Edk2Platforms\Silicon\Intel\KabylakeSiliconPkg\SampleCode\IntelFrameworkPkg= \Include\Guid\SmramMemoryReserve.h Edk2Platforms\Silicon\Intel\PurleySktPkg\Include\Guid\SmramMemoryReserve.h Edk2Platforms\Silicon\Intel\QuarkSocPkg\QuarkNorthCluster\Include\Guid\Smra= mMemoryReserve.h Edk2Platforms\Silicon\Intel\CoffeelakeSiliconPkg\SampleCode\IntelFrameworkP= kg\Include\Guid\SmramMemoryReserve.h Signed-off-by: Marc W Chen Cc: Sai Chaganty Cc: Chasel Chiu Cc: Liming Gao Cc: Nate DeSimone Cc: Kelly Steele Cc: Thad Gillispie Cc: Daocheng Bu Cc: Isaac W Oram Reviewed-by: Chasel Chiu --- .../Include/Guid/SmramMemoryReserve.h | 54 ------------------= ---- Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 5 -- .../PlatformInitPei/PlatformInitPostMem.c | 4 +- .../PlatformInitPei/PlatformInitPostMem.inf | 4 +- .../Library/TestPointCheckLib/PeiCheckSmmInfo.c | 6 +-- .../Acpi/DxeSmm/AcpiSmm/AcpiSmmPlatform.c | 4 +- .../Acpi/DxeSmm/AcpiSmm/AcpiSmmPlatform.inf | 2 +- .../Platform/Pei/PlatformInit/MrcWrapper.c | 8 ++-- .../Pei/PlatformInit/PlatformEarlyInit.inf | 2 +- .../Include/Guid/SmramMemoryReserve.h | 51 ------------------= -- Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec | 5 -- .../SystemAgent/SmmAccess/Dxe/SmmAccess.inf | 2 +- .../SystemAgent/SmmAccess/Dxe/SmmAccessDriver.c | 2 +- .../Include/Guid/SmramMemoryReserve.h | 54 ------------------= ---- Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec | 4 -- .../SystemAgent/SmmAccess/Dxe/SmmAccess.inf | 4 +- .../SystemAgent/SmmAccess/Dxe/SmmAccessDriver.c | 4 +- .../PurleySktPkg/Include/Guid/SmramMemoryReserve.h | 43 ----------------- Silicon/Intel/PurleySktPkg/SocketPkg.dec | 3 +- .../Include/Guid/SmramMemoryReserve.h | 54 ------------------= ---- .../Smm/Dxe/SmmAccessDxe/SmmAccess.inf | 2 +- .../Smm/Dxe/SmmAccessDxe/SmmAccessDriver.c | 2 +- .../Smm/Pei/SmmAccessPei/SmmAccessPei.c | 4 +- .../Smm/Pei/SmmAccessPei/SmmAccessPei.inf | 2 +- Silicon/Intel/QuarkSocPkg/QuarkSocPkg.dec | 1 - 25 files changed, 27 insertions(+), 299 deletions(-) delete mode 100644 Platform/Intel/MinPlatformPkg/Include/Guid/SmramMemoryR= eserve.h delete mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/SampleCode/IntelFram= eworkPkg/Include/Guid/SmramMemoryReserve.h delete mode 100644 Silicon/Intel/KabylakeSiliconPkg/SampleCode/IntelFramew= orkPkg/Include/Guid/SmramMemoryReserve.h delete mode 100644 Silicon/Intel/PurleySktPkg/Include/Guid/SmramMemoryRese= rve.h delete mode 100644 Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Include/Gui= d/SmramMemoryReserve.h diff --git a/Platform/Intel/MinPlatformPkg/Include/Guid/SmramMemoryReserve.= h b/Platform/Intel/MinPlatformPkg/Include/Guid/SmramMemoryReserve.h deleted file mode 100644 index 9918c768ba..0000000000 --- a/Platform/Intel/MinPlatformPkg/Include/Guid/SmramMemoryReserve.h +++ /dev/null @@ -1,54 +0,0 @@ -/** @file - Definition of GUIDed HOB for reserving SMRAM regions. - - This file defines: - * the GUID used to identify the GUID HOB for reserving SMRAM regions. - * the data structure of SMRAM descriptor to describe SMRAM candidate reg= ions - * values of state of SMRAM candidate regions - * the GUID specific data structure of HOB for reserving SMRAM regions. - This GUIDed HOB can be used to convey the existence of the T-SEG reserva= tion and H-SEG usage - -Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent - - @par Revision Reference: - GUIDs defined in SmmCis spec version 0.9. - -**/ - -#ifndef _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_ -#define _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_ - -#define EFI_SMM_PEI_SMRAM_MEMORY_RESERVE \ - { \ - 0x6dadf1d1, 0xd4cc, 0x4910, {0xbb, 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff,= 0x3d } \ - } - -/** -* GUID specific data structure of HOB for reserving SMRAM regions. -* -* Inconsistent with specification here:=20 -* EFI_HOB_SMRAM_DESCRIPTOR_BLOCK has been changed to EFI_SMRAM_HOB_DESCRIP= TOR_BLOCK. -* This inconsistency is kept in code in order for backward compatibility. -**/ -typedef struct { - /// - /// Designates the number of possible regions in the system - /// that can be usable for SMRAM.=20 - /// - /// Inconsistent with specification here: =20 - /// In Framework SMM CIS 0.91 specification, it defines the field type a= s UINTN. - /// However, HOBs are supposed to be CPU neutral, so UINT32 should be us= ed instead. - /// - UINT32 NumberOfSmmReservedRegions; - /// - /// Used throughout this protocol to describe the candidate - /// regions for SMRAM that are supported by this platform.=20 - /// - EFI_SMRAM_DESCRIPTOR Descriptor[1]; -} EFI_SMRAM_HOB_DESCRIPTOR_BLOCK; - -extern EFI_GUID gEfiSmmPeiSmramMemoryReserveGuid; - -#endif - diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/In= tel/MinPlatformPkg/MinPlatformPkg.dec index a642f9f3a3..d79f5ec1bd 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec @@ -42,11 +42,6 @@ gBoardNotificationInitGuid =3D {0x78dbcabf, 0xc544, 0x4e= 6f, {0xaf, 0x3a, 0x71, 0x1 gBoardAcpiTableGuid =3D {0xd70e9f57, 0x69f, 0x4bef, {0x96, 0xc0, 0= x84, 0x74, 0xf4, 0xa2, 0x5f, 0x3a}} gBoardAcpiEnableGuid =3D {0x9727b610, 0xf645, 0x4429, {0x89, 0x21, 0= x2c, 0x2b, 0x58, 0xdc, 0xbb, 0xa}} =20 -## -## IntelFrameworkPkg -## -gEfiSmmPeiSmramMemoryReserveGuid =3D {0x6dadf1d1, 0xd4cc, 0x4910, {0xbb, = 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff, 0x3d}} - gDefaultDataFileGuid =3D { 0x1ae42876, 0x008f, 0x41= 61, { 0xb2, 0xb7, 0x1c, 0x0d, 0x15, 0xc5, 0xef, 0x43 }} gDefaultDataOptSizeFileGuid =3D { 0x003e7b41, 0x98a2, 0x4b= e2, { 0xb2, 0x7a, 0x6c, 0x30, 0xc7, 0x65, 0x52, 0x25 }} =20 diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/Pla= tformInitPostMem.c b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformIni= tPei/PlatformInitPostMem.c index 00877593bc..70e6b9a495 100644 --- a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformIn= itPostMem.c +++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformIn= itPostMem.c @@ -1,7 +1,7 @@ /** @file Source code file for Platform Init PEI module =20 -Copyright (c) 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -113,7 +113,7 @@ SetCacheMtrrAfterEndOfPei ( Status =3D PeiServicesGetHobList ((VOID **) &Hob.Raw); while (!END_OF_HOB_LIST (Hob)) { if (Hob.Header->HobType =3D=3D EFI_HOB_TYPE_GUID_EXTENSION) { - if (CompareGuid (&Hob.Guid->Name, &gEfiSmmPeiSmramMemoryReserveGuid)= ) { + if (CompareGuid (&Hob.Guid->Name, &gEfiSmmSmramMemoryGuid)) { SmramHobDescriptorBlock =3D (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *) (Ho= b.Guid + 1); for (Index =3D 0; Index < SmramHobDescriptorBlock->NumberOfSmmRese= rvedRegions; Index++) { if (SmramHobDescriptorBlock->Descriptor[Index].PhysicalStart > 0= x100000) { diff --git a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/Pla= tformInitPostMem.inf b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformI= nitPei/PlatformInitPostMem.inf index 32d67a0a34..0736c8d494 100644 --- a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformIn= itPostMem.inf +++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformIn= itPostMem.inf @@ -1,7 +1,7 @@ ### @file # Component information file for the Platform Init PEI module. # -# Copyright (c) 2017, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -45,7 +45,7 @@ [Protocols] =20 [Guids] - gEfiSmmPeiSmramMemoryReserveGuid ## CONSUMES + gEfiSmmSmramMemoryGuid ## CONSUMES =20 [Depex] gEfiPeiMemoryDiscoveredPpiGuid diff --git a/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/P= eiCheckSmmInfo.c b/Platform/Intel/MinPlatformPkg/Test/Library/TestPointChec= kLib/PeiCheckSmmInfo.c index d04baf7663..6fe08e22ed 100644 --- a/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/PeiCheck= SmmInfo.c +++ b/Platform/Intel/MinPlatformPkg/Test/Library/TestPointCheckLib/PeiCheck= SmmInfo.c @@ -1,6 +1,6 @@ /** @file =20 -Copyright (c) 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -123,7 +123,7 @@ TestPointCheckSmramHob ( DEBUG ((DEBUG_INFO, "SMRAM HOB\n")); while (!END_OF_HOB_LIST (Hob)) { if (Hob.Header->HobType =3D=3D EFI_HOB_TYPE_GUID_EXTENSION) { - if (CompareGuid (&Hob.Guid->Name, &gEfiSmmPeiSmramMemoryReserveGuid)= ) { + if (CompareGuid (&Hob.Guid->Name, &gEfiSmmSmramMemoryGuid)) { SmramHobDescriptorBlock =3D (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *) (Ho= b.Guid + 1); DumpSmramDescriptor (SmramHobDescriptorBlock->NumberOfSmmReservedR= egions, SmramHobDescriptorBlock->Descriptor); break; @@ -138,7 +138,7 @@ TestPointCheckSmramHob ( Hob.Raw =3D GetHobList (); while (!END_OF_HOB_LIST (Hob)) { if (Hob.Header->HobType =3D=3D EFI_HOB_TYPE_GUID_EXTENSION) { - if (CompareGuid (&Hob.Guid->Name, &gEfiSmmPeiSmramMemoryReserveGuid)= ) { + if (CompareGuid (&Hob.Guid->Name, &gEfiSmmSmramMemoryGuid)) { SmramHobDescriptorBlock =3D (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *) (Ho= b.Guid + 1); for (Index =3D 0; Index < SmramHobDescriptorBlock->NumberOfSmmRese= rvedRegions; Index++) { if (Base =3D=3D 0) { diff --git a/Platform/Intel/QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPla= tform.c b/Platform/Intel/QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPlatfo= rm.c index f7f7ca3196..479459b801 100644 --- a/Platform/Intel/QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPlatform.c +++ b/Platform/Intel/QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPlatform.c @@ -3,7 +3,7 @@ ACPISMM Driver implementation file. =20 This is QNC Smm platform driver =20 -Copyright (c) 2013-2016 Intel Corporation. +Copyright (c) 2013-2019 Intel Corporation. =20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -225,7 +225,7 @@ Returns: // // Get Hob list for SMRAM desc // - GuidHob =3D GetFirstGuidHob (&gEfiSmmPeiSmramMemoryReserveGuid); + GuidHob =3D GetFirstGuidHob (&gEfiSmmSmramMemoryGuid); ASSERT (GuidHob); DescriptorBlock =3D GET_GUID_HOB_DATA (GuidHob); ASSERT (DescriptorBlock); diff --git a/Platform/Intel/QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPla= tform.inf b/Platform/Intel/QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPlat= form.inf index be80c73528..5301eccc6e 100644 --- a/Platform/Intel/QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPlatform.i= nf +++ b/Platform/Intel/QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPlatform.i= nf @@ -56,7 +56,7 @@ gEfiSmmSwDispatch2ProtocolGuid =20 [Guids] - gEfiSmmPeiSmramMemoryReserveGuid + gEfiSmmSmramMemoryGuid gQncS3CodeInLockBoxGuid gQncS3ContextInLockBoxGuid =20 diff --git a/Platform/Intel/QuarkPlatformPkg/Platform/Pei/PlatformInit/MrcW= rapper.c b/Platform/Intel/QuarkPlatformPkg/Platform/Pei/PlatformInit/MrcWra= pper.c index fcb5c79aaf..1bb532acfd 100644 --- a/Platform/Intel/QuarkPlatformPkg/Platform/Pei/PlatformInit/MrcWrapper.c +++ b/Platform/Intel/QuarkPlatformPkg/Platform/Pei/PlatformInit/MrcWrapper.c @@ -1,7 +1,7 @@ /** @file Framework PEIM to initialize memory on a Quark Memory Controller. =20 -Copyright (c) 2013 - 2016, Intel Corporation. +Copyright (c) 2013 - 2019, Intel Corporation. =20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -836,7 +836,7 @@ InstallEfiMemory ( BufferSize +=3D ((SmramRanges - 1) * sizeof (EFI_SMRAM_DESCRIPTOR)); =20 Hob.Raw =3D BuildGuidHob ( - &gEfiSmmPeiSmramMemoryReserveGuid, + &gEfiSmmSmramMemoryGuid, BufferSize ); ASSERT (Hob.Raw); @@ -958,7 +958,7 @@ InstallS3Memory ( } =20 Hob.Raw =3D BuildGuidHob ( - &gEfiSmmPeiSmramMemoryReserveGuid, + &gEfiSmmSmramMemoryGuid, BufferSize ); ASSERT (Hob.Raw); @@ -1546,7 +1546,7 @@ InfoPostInstallMemory ( } } } else if (Hob.Header->HobType =3D=3D EFI_HOB_TYPE_GUID_EXTENSION) { - if (CompareGuid (&(Hob.Guid->Name), &gEfiSmmPeiSmramMemoryReserveGui= d)) { + if (CompareGuid (&(Hob.Guid->Name), &gEfiSmmSmramMemoryGuid)) { SmramHobDescriptorBlock =3D (VOID*) (Hob.Raw + sizeof (EFI_HOB_GUI= D_TYPE)); if (SmramDescriptorPtr !=3D NULL) { *SmramDescriptorPtr =3D SmramHobDescriptorBlock->Descriptor; diff --git a/Platform/Intel/QuarkPlatformPkg/Platform/Pei/PlatformInit/Plat= formEarlyInit.inf b/Platform/Intel/QuarkPlatformPkg/Platform/Pei/PlatformIn= it/PlatformEarlyInit.inf index adec9e20eb..7910446402 100644 --- a/Platform/Intel/QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEar= lyInit.inf +++ b/Platform/Intel/QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEar= lyInit.inf @@ -108,7 +108,7 @@ gEfiAcpiVariableGuid # ALWAYS_CONSUMED L"AcpiGl= obalVariab" gEfiMemoryTypeInformationGuid # ALWAYS_CONSUMED L"Memory= TypeInformation" gEfiMemoryConfigDataGuid # SOMETIMES_PRODUCED Hob:= GUID_EXTENSION - gEfiSmmPeiSmramMemoryReserveGuid # ALWAYS_PRODUCED Hob: GU= ID_EXTENSION + gEfiSmmSmramMemoryGuid # ALWAYS_PRODUCED Hob: GU= ID_EXTENSION gEfiFirmwareFileSystem2Guid # ALWAYS_CONSUMED gPeiCapsuleOnDataCDGuid gPeiCapsuleOnFatIdeDiskGuid diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/SampleCode/IntelFrameworkPk= g/Include/Guid/SmramMemoryReserve.h b/Silicon/Intel/CoffeelakeSiliconPkg/Sa= mpleCode/IntelFrameworkPkg/Include/Guid/SmramMemoryReserve.h deleted file mode 100644 index 862a7c8aea..0000000000 --- a/Silicon/Intel/CoffeelakeSiliconPkg/SampleCode/IntelFrameworkPkg/Inclu= de/Guid/SmramMemoryReserve.h +++ /dev/null @@ -1,51 +0,0 @@ -/** @file - Definition of GUIDed HOB for reserving SMRAM regions. - - This file defines: - * the GUID used to identify the GUID HOB for reserving SMRAM regions. - * the data structure of SMRAM descriptor to describe SMRAM candidate reg= ions - * values of state of SMRAM candidate regions - * the GUID specific data structure of HOB for reserving SMRAM regions. - This GUIDed HOB can be used to convey the existence of the T-SEG reserva= tion and H-SEG usage - - Copyright (c) 2019 Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#ifndef _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_ -#define _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_ - -#define EFI_SMM_PEI_SMRAM_MEMORY_RESERVE \ - { \ - 0x6dadf1d1, 0xd4cc, 0x4910, {0xbb, 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff,= 0x3d } \ - } - -/** -* GUID specific data structure of HOB for reserving SMRAM regions. -* -* Inconsistent with specification here: -* EFI_HOB_SMRAM_DESCRIPTOR_BLOCK has been changed to EFI_SMRAM_HOB_DESCRIP= TOR_BLOCK. -* This inconsistency is kept in code in order for backward compatibility. -**/ -typedef struct { - /// - /// Designates the number of possible regions in the system - /// that can be usable for SMRAM. - /// - /// Inconsistent with specification here: - /// In Framework SMM CIS 0.91 specification, it defines the field type a= s UINTN. - /// However, HOBs are supposed to be CPU neutral, so UINT32 should be us= ed instead. - /// - UINT32 NumberOfSmmReservedRegions; - /// - /// Used throughout this protocol to describe the candidate - /// regions for SMRAM that are supported by this platform. - /// - EFI_SMRAM_DESCRIPTOR Descriptor[1]; -} EFI_SMRAM_HOB_DESCRIPTOR_BLOCK; - -extern EFI_GUID gEfiSmmPeiSmramMemoryReserveGuid; - -#endif - diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec b/Silicon/Intel/C= offeelakeSiliconPkg/SiPkg.dec index fa8c11e93d..6cf894498d 100644 --- a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec +++ b/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec @@ -54,11 +54,6 @@ gEfiMemoryTypeInformationGuid =3D {0x4c19049f, 0x4137,= 0x4dd3, {0x9c, 0x10, 0x8b gEfiCapsuleVendorGuid =3D {0x711c703f, 0xc285, 0x4b10, {0xa3, 0xb0, 0x36= , 0xec, 0xbd, 0x3c, 0x8b, 0xe2}} gEfiConsoleOutDeviceGuid =3D { 0xd3b36f2c, 0xd551, 0x11d4, { 0x9a, 0x46, 0= x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}} =20 -## -## IntelFrameworkPkg -## -gEfiSmmPeiSmramMemoryReserveGuid =3D {0x6dadf1d1, 0xd4cc, 0x4910, {0xbb, = 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff, 0x3d}} - ## ## Common ## diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/SystemAgent/SmmAccess/Dxe/S= mmAccess.inf b/Silicon/Intel/CoffeelakeSiliconPkg/SystemAgent/SmmAccess/Dxe= /SmmAccess.inf index 9356781c9e..bb1944c9ec 100644 --- a/Silicon/Intel/CoffeelakeSiliconPkg/SystemAgent/SmmAccess/Dxe/SmmAcces= s.inf +++ b/Silicon/Intel/CoffeelakeSiliconPkg/SystemAgent/SmmAccess/Dxe/SmmAcces= s.inf @@ -41,7 +41,7 @@ gEfiSmmAccess2ProtocolGuid ## PRODUCES =20 =20 [Guids] -gEfiSmmPeiSmramMemoryReserveGuid +gEfiSmmSmramMemoryGuid =20 =20 [Depex] diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/SystemAgent/SmmAccess/Dxe/S= mmAccessDriver.c b/Silicon/Intel/CoffeelakeSiliconPkg/SystemAgent/SmmAccess= /Dxe/SmmAccessDriver.c index 08fd9266c6..17855d3942 100644 --- a/Silicon/Intel/CoffeelakeSiliconPkg/SystemAgent/SmmAccess/Dxe/SmmAcces= sDriver.c +++ b/Silicon/Intel/CoffeelakeSiliconPkg/SystemAgent/SmmAccess/Dxe/SmmAcces= sDriver.c @@ -49,7 +49,7 @@ SmmAccessDriverEntryPoint ( /// /// Get Hob list /// - Hob =3D GetFirstGuidHob (&gEfiSmmPeiSmramMemoryReserveGuid); + Hob =3D GetFirstGuidHob (&gEfiSmmSmramMemoryGuid); if (Hob =3D=3D NULL) { DEBUG ((DEBUG_WARN, "SmramMemoryReserve HOB not found\n")); return EFI_NOT_FOUND; diff --git a/Silicon/Intel/KabylakeSiliconPkg/SampleCode/IntelFrameworkPkg/= Include/Guid/SmramMemoryReserve.h b/Silicon/Intel/KabylakeSiliconPkg/Sample= Code/IntelFrameworkPkg/Include/Guid/SmramMemoryReserve.h deleted file mode 100644 index 9918c768ba..0000000000 --- a/Silicon/Intel/KabylakeSiliconPkg/SampleCode/IntelFrameworkPkg/Include= /Guid/SmramMemoryReserve.h +++ /dev/null @@ -1,54 +0,0 @@ -/** @file - Definition of GUIDed HOB for reserving SMRAM regions. - - This file defines: - * the GUID used to identify the GUID HOB for reserving SMRAM regions. - * the data structure of SMRAM descriptor to describe SMRAM candidate reg= ions - * values of state of SMRAM candidate regions - * the GUID specific data structure of HOB for reserving SMRAM regions. - This GUIDed HOB can be used to convey the existence of the T-SEG reserva= tion and H-SEG usage - -Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent - - @par Revision Reference: - GUIDs defined in SmmCis spec version 0.9. - -**/ - -#ifndef _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_ -#define _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_ - -#define EFI_SMM_PEI_SMRAM_MEMORY_RESERVE \ - { \ - 0x6dadf1d1, 0xd4cc, 0x4910, {0xbb, 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff,= 0x3d } \ - } - -/** -* GUID specific data structure of HOB for reserving SMRAM regions. -* -* Inconsistent with specification here:=20 -* EFI_HOB_SMRAM_DESCRIPTOR_BLOCK has been changed to EFI_SMRAM_HOB_DESCRIP= TOR_BLOCK. -* This inconsistency is kept in code in order for backward compatibility. -**/ -typedef struct { - /// - /// Designates the number of possible regions in the system - /// that can be usable for SMRAM.=20 - /// - /// Inconsistent with specification here: =20 - /// In Framework SMM CIS 0.91 specification, it defines the field type a= s UINTN. - /// However, HOBs are supposed to be CPU neutral, so UINT32 should be us= ed instead. - /// - UINT32 NumberOfSmmReservedRegions; - /// - /// Used throughout this protocol to describe the candidate - /// regions for SMRAM that are supported by this platform.=20 - /// - EFI_SMRAM_DESCRIPTOR Descriptor[1]; -} EFI_SMRAM_HOB_DESCRIPTOR_BLOCK; - -extern EFI_GUID gEfiSmmPeiSmramMemoryReserveGuid; - -#endif - diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec b/Silicon/Intel/Kab= ylakeSiliconPkg/SiPkg.dec index a9f1c0f092..3881671757 100644 --- a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec +++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec @@ -63,10 +63,6 @@ gEfiMemoryTypeInformationGuid =3D {0x4c19049f, 0x4137,= 0x4dd3, {0x9c, 0x10, 0x8b gEfiCapsuleVendorGuid =3D {0x711c703f, 0xc285, 0x4b10, {0xa3, 0x= b0, 0x36, 0xec, 0xbd, 0x3c, 0x8b, 0xe2}} gEfiConsoleOutDeviceGuid =3D {0xd3b36f2c, 0xd551, 0x11d4, {0x9a, 0x= 46, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}} ## -## IntelFrameworkPkg -## -gEfiSmmPeiSmramMemoryReserveGuid =3D {0x6dadf1d1, 0xd4cc, 0x4910, {0xbb, = 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff, 0x3d}} -## ##=20 ## gSmbiosProcessorInfoHobGuid =3D {0xe6d73d92, 0xff56, 0x4146, {0xaf, 0xac,= 0x1c, 0x18, 0x81, 0x7d, 0x68, 0x71}} diff --git a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/SmmAccess/Dxe/Smm= Access.inf b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/SmmAccess/Dxe/Smm= Access.inf index 93ab408206..287e631689 100644 --- a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/SmmAccess/Dxe/SmmAccess.= inf +++ b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/SmmAccess/Dxe/SmmAccess.= inf @@ -3,7 +3,7 @@ # # {1323C7F8-DAD5-4126-A54B-7A05FBF4151} # -# Copyright (c) 2017, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -42,7 +42,7 @@ gEfiSmmAccess2ProtocolGuid ## PRODUCES =20 =20 [Guids] -gEfiSmmPeiSmramMemoryReserveGuid +gEfiSmmSmramMemoryGuid =20 =20 [Depex] diff --git a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/SmmAccess/Dxe/Smm= AccessDriver.c b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/SmmAccess/Dxe= /SmmAccessDriver.c index f03dbe3d27..77f465fd25 100644 --- a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/SmmAccess/Dxe/SmmAccessD= river.c +++ b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/SmmAccess/Dxe/SmmAccessD= river.c @@ -2,7 +2,7 @@ This is the driver that publishes the SMM Access Protocol instance for System Agent. =20 -Copyright (c) 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -61,7 +61,7 @@ SmmAccessDriverEntryPoint ( /// /// Get Hob list /// - Hob =3D GetFirstGuidHob (&gEfiSmmPeiSmramMemoryReserveGuid); + Hob =3D GetFirstGuidHob (&gEfiSmmSmramMemoryGuid); if (Hob =3D=3D NULL) { DEBUG ((DEBUG_ERROR, "SmramMemoryReserve HOB not found\n")); return EFI_NOT_FOUND; diff --git a/Silicon/Intel/PurleySktPkg/Include/Guid/SmramMemoryReserve.h b= /Silicon/Intel/PurleySktPkg/Include/Guid/SmramMemoryReserve.h deleted file mode 100644 index 46e8198f00..0000000000 --- a/Silicon/Intel/PurleySktPkg/Include/Guid/SmramMemoryReserve.h +++ /dev/null @@ -1,43 +0,0 @@ -/** @file - -Copyright (c) 2018, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#ifndef _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_ -#define _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_ - -#define EFI_SMM_PEI_SMRAM_MEMORY_RESERVE \ - { \ - 0x6dadf1d1, 0xd4cc, 0x4910, {0xbb, 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff,= 0x3d } \ - } - -/** -* GUID specific data structure of HOB for reserving SMRAM regions. -* -* Inconsistent with specification here:=20 -* EFI_HOB_SMRAM_DESCRIPTOR_BLOCK has been changed to EFI_SMRAM_HOB_DESCRIP= TOR_BLOCK. -* This inconsistency is kept in code in order for backward compatibility. -**/ -typedef struct { - /// - /// Designates the number of possible regions in the system - /// that can be usable for SMRAM.=20 - /// - /// Inconsistent with specification here: =20 - /// In Framework SMM CIS 0.91 specification, it defines the field type a= s UINTN. - /// However, HOBs are supposed to be CPU neutral, so UINT32 should be us= ed instead. - /// - UINT32 NumberOfSmmReservedRegions; - /// - /// Used throughout this protocol to describe the candidate - /// regions for SMRAM that are supported by this platform.=20 - /// - EFI_SMRAM_DESCRIPTOR Descriptor[1]; -} EFI_SMRAM_HOB_DESCRIPTOR_BLOCK; - -extern EFI_GUID gEfiSmmPeiSmramMemoryReserveGuid; - -#endif - diff --git a/Silicon/Intel/PurleySktPkg/SocketPkg.dec b/Silicon/Intel/Purle= ySktPkg/SocketPkg.dec index 2ff937f5d8..e554a9555d 100644 --- a/Silicon/Intel/PurleySktPkg/SocketPkg.dec +++ b/Silicon/Intel/PurleySktPkg/SocketPkg.dec @@ -1,6 +1,6 @@ ### @file # -# Copyright (c) 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -51,7 +51,6 @@ gEfiRasClvTesterGuid =3D { 0x9bd36f4f, 0x= 08dc, 0x4eab, { 0x86, 0x37, 0x2b, 0xc1, 0xbd, 0x5e, 0x0d, 0x95 } } gSocketPkgFpgaGuid =3D { 0x624b948f, 0x= 6eba, 0x4dfd, { 0x9d, 0xda, 0x10, 0xb0, 0x07, 0x3a, 0x37, 0x35 } } # {624B= 948F-6EBA-4DFD-9DDA-10B0073A3735} gIioPolicyHobGuid =3D { 0xcabb327, 0x= 11fe, 0x416b, { 0xae, 0x80, 0x2d, 0xe5, 0xdf, 0x60, 0xf7, 0x7d } } - gEfiSmmPeiSmramMemoryReserveGuid =3D { 0x6dadf1d1, 0x= d4cc, 0x4910, { 0xbb, 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff, 0x3d } } =20 [Ppis] gPeiBaseMemoryTestPpiGuid =3D { 0xb6ec423c, 0x= 21d2, 0x490d, { 0x85, 0xc6, 0xdd, 0x58, 0x64, 0xea, 0xa6, 0x74 } } diff --git a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Include/Guid/Smram= MemoryReserve.h b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Include/Guid/= SmramMemoryReserve.h deleted file mode 100644 index d57dfbebf3..0000000000 --- a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Include/Guid/SmramMemoryR= eserve.h +++ /dev/null @@ -1,54 +0,0 @@ -/** @file - Definition of GUIDed HOB for reserving SMRAM regions. - - This file defines: - * the GUID used to identify the GUID HOB for reserving SMRAM regions. - * the data structure of SMRAM descriptor to describe SMRAM candidate reg= ions - * values of state of SMRAM candidate regions - * the GUID specific data structure of HOB for reserving SMRAM regions. - This GUIDed HOB can be used to convey the existence of the T-SEG reserva= tion and H-SEG usage - -Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent - - @par Revision Reference: - GUIDs defined in SmmCis spec version 0.9. - -**/ - -#ifndef _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_ -#define _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_ - -#define EFI_SMM_PEI_SMRAM_MEMORY_RESERVE \ - { \ - 0x6dadf1d1, 0xd4cc, 0x4910, {0xbb, 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff,= 0x3d } \ - } - -/** -* GUID specific data structure of HOB for reserving SMRAM regions. -* -* Inconsistent with specification here: -* EFI_HOB_SMRAM_DESCRIPTOR_BLOCK has been changed to EFI_SMRAM_HOB_DESCRIP= TOR_BLOCK. -* This inconsistency is kept in code in order for backward compatibility. -**/ -typedef struct { - /// - /// Designates the number of possible regions in the system - /// that can be usable for SMRAM. - /// - /// Inconsistent with specification here: - /// In Framework SMM CIS 0.91 specification, it defines the field type a= s UINTN. - /// However, HOBs are supposed to be CPU neutral, so UINT32 should be us= ed instead. - /// - UINT32 NumberOfSmmReservedRegions; - /// - /// Used throughout this protocol to describe the candidate - /// regions for SMRAM that are supported by this platform. - /// - EFI_SMRAM_DESCRIPTOR Descriptor[1]; -} EFI_SMRAM_HOB_DESCRIPTOR_BLOCK; - -extern EFI_GUID gEfiSmmPeiSmramMemoryReserveGuid; - -#endif - diff --git a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessD= xe/SmmAccess.inf b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmA= ccessDxe/SmmAccess.inf index bb555b4a2e..cf579efd02 100644 --- a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/SmmA= ccess.inf +++ b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/SmmA= ccess.inf @@ -42,7 +42,7 @@ gEfiSmmAccess2ProtocolGuid =20 [Guids] - gEfiSmmPeiSmramMemoryReserveGuid + gEfiSmmSmramMemoryGuid =20 [Depex] gEfiPciRootBridgeIoProtocolGuid diff --git a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessD= xe/SmmAccessDriver.c b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/= SmmAccessDxe/SmmAccessDriver.c index 830f8b83c3..7992ef7ded 100644 --- a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/SmmA= ccessDriver.c +++ b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/SmmA= ccessDriver.c @@ -75,7 +75,7 @@ Returns: // // Get Hob list // - GuidHob =3D GetFirstGuidHob (&gEfiSmmPeiSmramMemoryReserveGuid); + GuidHob =3D GetFirstGuidHob (&gEfiSmmSmramMemoryGuid); DescriptorBlock =3D GET_GUID_HOB_DATA (GuidHob); ASSERT (DescriptorBlock); =20 diff --git a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessP= ei/SmmAccessPei.c b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Pei/Smm= AccessPei/SmmAccessPei.c index 637792d147..d03cadbde5 100644 --- a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessPei/SmmA= ccessPei.c +++ b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessPei/SmmA= ccessPei.c @@ -2,7 +2,7 @@ This is the driver that publishes the SMM Access Ppi instance for the Quark SOC. =20 -Copyright (c) 2013-2015 Intel Corporation. +Copyright (c) 2013-2019 Intel Corporation. =20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -325,7 +325,7 @@ Returns: // // Get Hob list // - GuidHob =3D GetFirstGuidHob (&gEfiSmmPeiSmramMemoryReserveGuid); + GuidHob =3D GetFirstGuidHob (&gEfiSmmSmramMemoryGuid); DescriptorBlock =3D GET_GUID_HOB_DATA (GuidHob); ASSERT (DescriptorBlock); =20 diff --git a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessP= ei/SmmAccessPei.inf b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Pei/S= mmAccessPei/SmmAccessPei.inf index 60b5fbab0f..5f78f72859 100644 --- a/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessPei/SmmA= ccessPei.inf +++ b/Silicon/Intel/QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessPei/SmmA= ccessPei.inf @@ -34,7 +34,7 @@ ENTRY_POINT =3D SmmAccessPeiEntryPoint SmmLib =20 [Guids] - gEfiSmmPeiSmramMemoryReserveGuid # ALWAYS_CONSUMED + gEfiSmmSmramMemoryGuid # ALWAYS_CONSUMED =20 [Ppis] gPeiSmmAccessPpiGuid # ALWAYS_PRODUCED diff --git a/Silicon/Intel/QuarkSocPkg/QuarkSocPkg.dec b/Silicon/Intel/Quar= kSocPkg/QuarkSocPkg.dec index 32f57e0c5e..94e7d8c60b 100644 --- a/Silicon/Intel/QuarkSocPkg/QuarkSocPkg.dec +++ b/Silicon/Intel/QuarkSocPkg/QuarkSocPkg.dec @@ -72,7 +72,6 @@ gEfiQuarkNcSocIdTokenSpaceGuid =3D { 0xca452c6a, 0xdf0c, 0x4dc9, { 0x82= , 0xfb, 0xea, 0xe2, 0xab, 0x31, 0x29, 0x46 }} gQncS3CodeInLockBoxGuid =3D { 0x1f18c5b3, 0x29ed, 0x4d9e, {0xa5, 0x4,= 0x6d, 0x97, 0x8e, 0x7e, 0xd5, 0x69}} gQncS3ContextInLockBoxGuid =3D { 0xe5769ea9, 0xe706, 0x454b, {0x95, 0x7f= , 0xaf, 0xc6, 0xdb, 0x4b, 0x8a, 0xd}} - gEfiSmmPeiSmramMemoryReserveGuid =3D { 0x6dadf1d1, 0xd4cc, 0x4910, { 0xb= b, 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff, 0x3d }} =20 # # South Cluster --=20 2.16.2.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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