From nobody Fri Dec 19 20:15:53 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+45901+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+45901+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1566001018; cv=none; d=zoho.com; s=zohoarc; b=dOy00StVcr5sZYYWr/pLdCxcgiwF9dcMK6qUJtSaPSxcmP0HGFjAOBZiKlGN3TU5MwWwjQXgFIVDMB17Hz92E2aUJDBP+z1XJsImzgyMXQFup3prBYd5QQAgjU1MOhagg7ve+58AQFTXgDDzZCtwD4s8NN6p6lLxAorwHYFAH34= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1566001018; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=JcsIMwNHShivd02IVed9MyrHqhvCJ11sLcxHwgyL3Ng=; b=NeyAqvGhjPNvxRM26jCQBiPM+HmEJs3kY+B+fKWrjiYkTmiKu3NvR3FB4jhjK8bUK3AKkLheVBG14zJlY387/kfy+ogzcWn55sF1YvaetgrGw6AszJuc4tXrXx8IpyTiBT+jEzLnkBH5ZJ+mHWrWIOQxWbYA7KGBde4OsbuMGWA= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+45901+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1566001018320485.8569927325524; Fri, 16 Aug 2019 17:16:58 -0700 (PDT) Return-Path: X-Received: from mga12.intel.com (mga12.intel.com []) by groups.io with SMTP; Fri, 16 Aug 2019 17:16:56 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Aug 2019 17:16:56 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,395,1559545200"; d="scan'208";a="182319308" X-Received: from makuback-desk1.amr.corp.intel.com ([10.7.159.162]) by orsmga006.jf.intel.com with ESMTP; 16 Aug 2019 17:16:54 -0700 From: "Kubacki, Michael A" To: devel@edk2.groups.io Cc: Sai Chaganty , Chasel Chiu , Nate DeSimone , Liming Gao , Michael D Kinney , Ankit Sinha Subject: [edk2-devel] [edk2-platforms][PATCH V1 24/37] CoffeelakeSiliconPkg/Pch: Add SMM private library instances Date: Fri, 16 Aug 2019 17:15:50 -0700 Message-Id: <20190817001603.30632-25-michael.a.kubacki@intel.com> In-Reply-To: <20190817001603.30632-1-michael.a.kubacki@intel.com> References: <20190817001603.30632-1-michael.a.kubacki@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,michael.a.kubacki@intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1566001017; bh=ezL4CkCnXD4zJjNsR7fhHdOmAKKTWVmnsaiETUnpLyU=; h=Cc:Date:From:Reply-To:Subject:To; b=HczHqVI+zkuNDjyABnEjzQvC6KH6BCmkYuYKYyLNrvcLY+60+7AzufNQ8sIe2qxqaRu NbXm8YYtEAx/TzHZdQQKijuLHAoRM51Pl/SX7cIy3l9XhMiTzokuHMF2sn/YQvDsCIous vrC0MNXuNX+gzddQPSTB8+pZQzzchF5M6No= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2082 Adds PCH SMM private library class instances. * SmmPchPrivateLib Cc: Sai Chaganty Cc: Chasel Chiu Cc: Nate DeSimone Cc: Liming Gao Cc: Michael D Kinney Cc: Ankit Sinha Signed-off-by: Michael Kubacki --- Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/SmmPchPrivateLib/Sm= mPchPrivateLib.inf | 32 +++++++++++ Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/SmmPchPrivateLib/Sm= mPchPrivateLib.c | 58 ++++++++++++++++++++ 2 files changed, 90 insertions(+) diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/SmmPchP= rivateLib/SmmPchPrivateLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Lib= rary/Private/SmmPchPrivateLib/SmmPchPrivateLib.inf new file mode 100644 index 0000000000..5cbad21fa5 --- /dev/null +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/SmmPchPrivateL= ib/SmmPchPrivateLib.inf @@ -0,0 +1,32 @@ +## @file +# PCH SMM private lib. +# +# Copyright (c) 2019 Intel Corporation. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] +INF_VERSION =3D 0x00010017 +BASE_NAME =3D SmmPchPrivateLib +FILE_GUID =3D FE6495FB-7AA9-4A24-BF3E-4698F7BCE0EE +VERSION_STRING =3D 1.0 +MODULE_TYPE =3D DXE_SMM_DRIVER +LIBRARY_CLASS =3D SmmPchPrivateLib + + +[LibraryClasses] +BaseLib +IoLib +DebugLib +CpuPlatformLib + + +[Packages] +MdePkg/MdePkg.dec +CoffeelakeSiliconPkg/SiPkg.dec + + +[Sources] +SmmPchPrivateLib.c diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/SmmPchP= rivateLib/SmmPchPrivateLib.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Libra= ry/Private/SmmPchPrivateLib/SmmPchPrivateLib.c new file mode 100644 index 0000000000..85a3086874 --- /dev/null +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/SmmPchPrivateL= ib/SmmPchPrivateLib.c @@ -0,0 +1,58 @@ +/** @file + PCH SMM private lib. + + Copyright (c) 2019 Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include +#include +#include +#include +#include +#include + +/** + Set InSmm.Sts bit +**/ +VOID +PchSetInSmmSts ( + VOID + ) +{ + UINT32 Data32; + + /// + /// Read memory location FED30880h OR with 00000001h, place the result i= n EAX, + /// and write data to lower 32 bits of MSR 1FEh (sample code available) + /// + Data32 =3D MmioRead32 (0xFED30880); + AsmWriteMsr32 (MSR_SPCL_CHIPSET_USAGE_ADDR, Data32 | BIT0); + /// + /// Read FED30880h back to ensure the setting went through. + /// + Data32 =3D MmioRead32 (0xFED30880); +} + +/** + Clear InSmm.Sts bit +**/ +VOID +PchClearInSmmSts ( + VOID + ) +{ + UINT32 Data32; + + /// + /// Read memory location FED30880h AND with FFFFFFFEh, place the result = in EAX, + /// and write data to lower 32 bits of MSR 1FEh (sample code available) + /// + Data32 =3D MmioRead32 (0xFED30880); + AsmWriteMsr32 (MSR_SPCL_CHIPSET_USAGE_ADDR, Data32 & (UINT32) (~BIT0)); + /// + /// Read FED30880h back to ensure the setting went through. + /// + Data32 =3D MmioRead32 (0xFED30880); +} --=20 2.16.2.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#45901): https://edk2.groups.io/g/devel/message/45901 Mute This Topic: https://groups.io/mt/32918194/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-