From nobody Fri Dec 19 20:15:27 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+45893+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+45893+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1566001015; cv=none; d=zoho.com; s=zohoarc; b=WMwU226//EffoQZV8ePDxzFZn0/xA6gLbdwV4zMZD5n9CYnDaVHrT9QUhqgkJ+wPZ5SBZwaznJqcWJPQtJ2w/Otgjnz61BuYCB3kqSm9IPNga+iah4rNDlOHEdMqMpI0VC0Sc0hqaFiHlsg9eDqnEk3TY7IoWY9+izEnE6SwQ+I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1566001015; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=KPydHxQmXqMMwvTzpjF1jpjL9cwd5QZC6HtYdgrgDNc=; b=R+oBuD4EosDWs9C6mAwxl6AhZpIv+u+yqUlqpKbp0BVu230XrsBpMrzB76Hvm46EF70i6avSa3tjQcexbAsBinSWbiVAZbGE5Wplomwo31n4OjoWInU65WflG1FD5EmB2F0BTgU6KvEgdhxjjn+KArll1UBdEZjEij6NQEgUEcE= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+45893+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1566001015745781.9345324531279; Fri, 16 Aug 2019 17:16:55 -0700 (PDT) Return-Path: X-Received: from mga04.intel.com (mga04.intel.com []) by groups.io with SMTP; Fri, 16 Aug 2019 17:16:53 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Aug 2019 17:16:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,395,1559545200"; d="scan'208";a="182319274" X-Received: from makuback-desk1.amr.corp.intel.com ([10.7.159.162]) by orsmga006.jf.intel.com with ESMTP; 16 Aug 2019 17:16:52 -0700 From: "Kubacki, Michael A" To: devel@edk2.groups.io Cc: Sai Chaganty , Chasel Chiu , Nate DeSimone , Liming Gao , Michael D Kinney , Ankit Sinha Subject: [edk2-devel] [edk2-platforms][PATCH V1 16/37] CoffeelakeSiliconPkg/Me: Add library instances Date: Fri, 16 Aug 2019 17:15:42 -0700 Message-Id: <20190817001603.30632-17-michael.a.kubacki@intel.com> In-Reply-To: <20190817001603.30632-1-michael.a.kubacki@intel.com> References: <20190817001603.30632-1-michael.a.kubacki@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,michael.a.kubacki@intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1566001015; bh=do6Nt7DGqqn4y2PKc5/LJXU0R+z/SRwpaFwYxWf9qag=; h=Cc:Date:From:Reply-To:Subject:To; b=b4WqT53JV3cFhTaNrOhmBOw+BYxRak2s526mNkyInJrUwtqJVEx+Ul5rZIYt38oTjF1 Fnr/qpax4YelAqievTg/PXXEQSbohm0DOhaZGcvYKMtSIa+oe64UevQIyJDpX04bvk+lq s0ZHAF0yo/RCYlF2FizU2pCxyhc6J7xM8xM= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2082 Adds ME library class instances. * PeiMePolicyLib - PEI ME policy configuration services. Cc: Sai Chaganty Cc: Chasel Chiu Cc: Nate DeSimone Cc: Liming Gao Cc: Michael D Kinney Cc: Ankit Sinha Signed-off-by: Michael Kubacki --- Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMePolicyLi= b.inf | 44 ++++ Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMePolicyLi= brary.h | 25 ++ Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMePolicyLi= b.c | 251 ++++++++++++++++++++ 3 files changed, 320 insertions(+) diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/P= eiMePolicyLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePoli= cyLib/PeiMePolicyLib.inf new file mode 100644 index 0000000000..85a227f950 --- /dev/null +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMePol= icyLib.inf @@ -0,0 +1,44 @@ +## @file +# Component description file for the PeiMePolicyLib libbrary. +# +# Copyright (c) 2019 Intel Corporation. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] +INF_VERSION =3D 0x00010017 +BASE_NAME =3D PeiMePolicyLib +FILE_GUID =3D 2655FA94-4559-F393-B0B1-85A8E79C1532 +VERSION_STRING =3D 1.0 +MODULE_TYPE =3D PEIM +LIBRARY_CLASS =3D PeiMePolicyLib + + +[LibraryClasses] +DebugLib +IoLib +PeiServicesLib +BaseMemoryLib +MemoryAllocationLib +ConfigBlockLib + + +[Packages] +MdePkg/MdePkg.dec +CoffeelakeSiliconPkg/SiPkg.dec + +[Sources] +PeiMePolicyLib.c +PeiMePolicyLibrary.h + + +[Ppis] +gSiPolicyPpiGuid ## PRODUCES +gSiPreMemPolicyPpiGuid ## PRODUCES + + +[Guids] +gMePeiPreMemConfigGuid +gMePeiConfigGuid diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/P= eiMePolicyLibrary.h b/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePo= licyLib/PeiMePolicyLibrary.h new file mode 100644 index 0000000000..3ac6a639e9 --- /dev/null +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMePol= icyLibrary.h @@ -0,0 +1,25 @@ +/** @file + Header file for the PeiMePolicy library. + + Copyright (c) 2019 Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef _PEI_ME_POLICY_LIBRARY_H_ +#define _PEI_ME_POLICY_LIBRARY_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#endif // _PEI_ME_POLICY_LIBRARY_H_ diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/P= eiMePolicyLib.c b/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicy= Lib/PeiMePolicyLib.c new file mode 100644 index 0000000000..6f3d70b841 --- /dev/null +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Me/Library/PeiMePolicyLib/PeiMePol= icyLib.c @@ -0,0 +1,251 @@ +/** @file + This file is PeiMePolicy library. + + Copyright (c) 2019 Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include "PeiMePolicyLibrary.h" + +/** + Load default settings for ME config block in pre-mem phase. + + @param[in] ConfigBlockPointer The pointer to the config = block +**/ +VOID +LoadMePeiPreMemDefault ( + IN VOID *ConfigBlockPointer + ); + +/** + Load default settings for ME config block in PEI phase. + + @param[in] ConfigBlockPointer The pointer to the config = block +**/ +VOID +LoadMePeiDefault ( + IN VOID *ConfigBlockPointer + ); + +STATIC COMPONENT_BLOCK_ENTRY mMeCompontBlockPreMemBlocks [] =3D { + {&gMePeiPreMemConfigGuid, sizeof (ME_PEI_PREMEM_CONFIG), ME_PEI_PREMEM_= CONFIG_REVISION, LoadMePeiPreMemDefault} +}; + +STATIC COMPONENT_BLOCK_ENTRY mMeCompontBlockBlocks [] =3D { + {&gMePeiConfigGuid, sizeof (ME_PEI_CONFIG), ME_PEI_CONFIG_= REVISION, LoadMePeiDefault} +}; + +/** + Load default settings for ME config block in pre-mem phase. + + @param[in] ConfigBlockPointer The pointer to the config = block +**/ +VOID +LoadMePeiPreMemDefault ( + IN VOID *ConfigBlockPointer + ) +{ + ME_PEI_PREMEM_CONFIG *MePeiPreMemConfig; + MePeiPreMemConfig =3D ConfigBlockPointer; + + MePeiPreMemConfig->HeciTimeouts =3D 1; + + MePeiPreMemConfig->Heci1BarAddress =3D 0xFED1A000; + MePeiPreMemConfig->Heci2BarAddress =3D 0xFED1B000; + MePeiPreMemConfig->Heci3BarAddress =3D 0xFED1C000; + + // + // Test policies + // + MePeiPreMemConfig->SendDidMsg =3D 1; + + MePeiPreMemConfig->KtDeviceEnable =3D 1; +} + +/** + Load default settings for ME config block in PEI phase. + + @param[in] ConfigBlockPointer The pointer to the config = block +**/ +VOID +LoadMePeiDefault ( + IN VOID *ConfigBlockPointer + ) +{ + ME_PEI_CONFIG *MePeiConfig; + MePeiConfig =3D ConfigBlockPointer; + + MePeiConfig->EndOfPostMessage =3D EOP_SEND_IN_DXE; + MePeiConfig->MeUnconfigOnRtcClear =3D 1; +} + +/** + Dump values of ME config block in pre-mem phase. + + @param[in] MePeiPreMemConfig The pointer to the conf= ig block +**/ +VOID +EFIAPI +PrintMePeiPreMemConfig ( + IN ME_PEI_PREMEM_CONFIG *MePeiPreMemConfig + ) +{ + DEBUG_CODE_BEGIN (); + DEBUG ((DEBUG_INFO, "------------------------ ME_PEI_PREMEM_CONFIG -----= ------------\n")); + DEBUG ((DEBUG_INFO, " Revision : 0x%x\n", MePeiPreMemCo= nfig->Header.Revision)); + ASSERT (MePeiPreMemConfig->Header.Revision =3D=3D ME_PEI_PREMEM_CONFIG_R= EVISION); + + DEBUG ((DEBUG_INFO, " HeciTimeouts : 0x%x\n", MePeiPreMemCo= nfig->HeciTimeouts)); + DEBUG ((DEBUG_INFO, " DidInitStat : 0x%x\n", MePeiPreMemCo= nfig->DidInitStat)); + DEBUG ((DEBUG_INFO, " DisableCpuReplacedPolling : 0x%x\n", MePeiPreMemCo= nfig->DisableCpuReplacedPolling)); + DEBUG ((DEBUG_INFO, " SendDidMsg : 0x%x\n", MePeiPreMemCo= nfig->SendDidMsg)); + DEBUG ((DEBUG_INFO, " DisableHeciRetry : 0x%x\n", MePeiPreMemCo= nfig->DisableHeciRetry)); + DEBUG ((DEBUG_INFO, " DisableMessageCheck : 0x%x\n", MePeiPreMemCo= nfig->DisableMessageCheck)); + DEBUG ((DEBUG_INFO, " SkipMbpHob : 0x%x\n", MePeiPreMemCo= nfig->SkipMbpHob)); + DEBUG ((DEBUG_INFO, " HeciCommunication2 : 0x%x\n", MePeiPreMemCo= nfig->HeciCommunication2)); + DEBUG ((DEBUG_INFO, " KtDeviceEnable : 0x%x\n", MePeiPreMemCo= nfig->KtDeviceEnable)); + DEBUG ((DEBUG_INFO, " Heci1BarAddress : 0x%x\n", MePeiPreMemCo= nfig->Heci1BarAddress)); + DEBUG ((DEBUG_INFO, " Heci2BarAddress : 0x%x\n", MePeiPreMemCo= nfig->Heci2BarAddress)); + DEBUG ((DEBUG_INFO, " Heci3BarAddress : 0x%x\n", MePeiPreMemCo= nfig->Heci3BarAddress)); + DEBUG_CODE_END (); +} + +/** + Dump values of ME config block in PEI phase. + + @param[in] MePeiConfig The pointer to the config block +**/ +VOID +EFIAPI +PrintMePeiConfig ( + IN ME_PEI_CONFIG *MePeiConfig + ) +{ + DEBUG_CODE_BEGIN (); + DEBUG ((DEBUG_INFO, "------------------------ ME_PEI_CONFIG ------------= -----\n")); + DEBUG ((DEBUG_INFO, " Revision : 0x%x\n", MePeiConfig->= Header.Revision)); + ASSERT (MePeiConfig->Header.Revision =3D=3D ME_PEI_CONFIG_REVISION); + + DEBUG ((DEBUG_INFO, " MctpBroadcastCycle : 0x%x\n", MePeiConfig->= MctpBroadcastCycle)); + DEBUG ((DEBUG_INFO, " EndOfPostMessage : 0x%x\n", MePeiConfig->= EndOfPostMessage)); + DEBUG ((DEBUG_INFO, " Heci3Enabled : 0x%x\n", MePeiConfig->= Heci3Enabled)); + DEBUG ((DEBUG_INFO, " DisableD0I3SettingForHeci : 0x%x\n", MePeiConfig->= DisableD0I3SettingForHeci)); + DEBUG ((DEBUG_INFO, " MeUnconfigOnRtcClear : 0x%x\n", MePeiConfig->= MeUnconfigOnRtcClear)); + + DEBUG_CODE_END (); +} + +/** + Print PEI ME config block + + @param[in] SiPolicyPpiPreMem The RC Policy PPI instance +**/ +VOID +EFIAPI +MePrintPolicyPpiPreMem ( + IN SI_PREMEM_POLICY_PPI *SiPolicyPpiPreMem + ) +{ + DEBUG_CODE_BEGIN (); + EFI_STATUS Status; + ME_PEI_PREMEM_CONFIG *MePeiPreMemConfig; + + Status =3D GetConfigBlock ((VOID *) SiPolicyPpiPreMem, &gMePeiPreMemConf= igGuid, (VOID *) &MePeiPreMemConfig); + ASSERT_EFI_ERROR (Status); + + DEBUG ((DEBUG_INFO, "\n---------------------- Me Config Block Pre-Mem Pr= int Begin -----------------\n")); + PrintMePeiPreMemConfig (MePeiPreMemConfig); + DEBUG ((DEBUG_INFO, "\n---------------------- Me Config Block Pre-Mem Pr= int End -------------------\n")); + DEBUG_CODE_END (); +} + +/** + Print PEI ME config block + + @param[in] SiPolicyPpi The RC Policy PPI instance +**/ +VOID +EFIAPI +MePrintPolicyPpi ( + IN SI_POLICY_PPI *SiPolicyPpi + ) +{ + DEBUG_CODE_BEGIN (); + EFI_STATUS Status; + ME_PEI_CONFIG *MePeiConfig; + + Status =3D GetConfigBlock ((VOID *) SiPolicyPpi, &gMePeiConfigGuid, (VOI= D *) &MePeiConfig); + ASSERT_EFI_ERROR (Status); + + DEBUG ((DEBUG_INFO, "\n---------------------- Me Config Block Print Begi= n -----------------\n")); + PrintMePeiConfig (MePeiConfig); + DEBUG ((DEBUG_INFO, "\n---------------------- Me Config Block Print End = -------------------\n")); + DEBUG_CODE_END (); +} + +/** + Get ME config block table total size. + + @retval Size of ME config block table +**/ +UINT16 +EFIAPI +MeGetConfigBlockTotalSizePreMem ( + VOID + ) +{ + return GetComponentConfigBlockTotalSize (&mMeCompontBlockPreMemBlocks[0]= , sizeof (mMeCompontBlockPreMemBlocks) / sizeof (COMPONENT_BLOCK_ENTRY)); +} + +/** + Get ME config block table total size. + + @retval Size of ME config block table +**/ +UINT16 +EFIAPI +MeGetConfigBlockTotalSize ( + VOID + ) +{ + return GetComponentConfigBlockTotalSize (&mMeCompontBlockBlocks[0], size= of (mMeCompontBlockBlocks) / sizeof (COMPONENT_BLOCK_ENTRY)); +} + +/** + MeAddConfigBlocksPreMem add all config blocks. + + @param[in] ConfigBlockTableAddress The pointer to add config blocks + + @retval EFI_SUCCESS The policy default is initialized. + @retval EFI_OUT_OF_RESOURCES Insufficient resources to create b= uffer +**/ +EFI_STATUS +EFIAPI +MeAddConfigBlocksPreMem ( + IN VOID *ConfigBlockTableAddress + ) +{ + DEBUG ((DEBUG_INFO, "Me AddConfigBlocks. TotalBlockCount =3D 0x%x\n", s= izeof (mMeCompontBlockPreMemBlocks) / sizeof (COMPONENT_BLOCK_ENTRY))); + + return AddComponentConfigBlocks (ConfigBlockTableAddress, &mMeCompontBlo= ckPreMemBlocks[0], sizeof (mMeCompontBlockPreMemBlocks) / sizeof (COMPONENT= _BLOCK_ENTRY)); +} + +/** + MeAddConfigBlocks add all config blocks. + + @param[in] ConfigBlockTableAddress The pointer to add config blocks + + @retval EFI_SUCCESS The policy default is initialized. + @retval EFI_OUT_OF_RESOURCES Insufficient resources to create b= uffer +**/ +EFI_STATUS +EFIAPI +MeAddConfigBlocks ( + IN VOID *ConfigBlockTableAddress + ) +{ + DEBUG ((DEBUG_INFO, "ME AddConfigBlocks. TotalBlockCount =3D 0x%x\n", s= izeof (mMeCompontBlockBlocks) / sizeof (COMPONENT_BLOCK_ENTRY))); + + return AddComponentConfigBlocks (ConfigBlockTableAddress, &mMeCompontBlo= ckBlocks[0], sizeof (mMeCompontBlockBlocks) / sizeof (COMPONENT_BLOCK_ENTRY= )); +} --=20 2.16.2.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#45893): https://edk2.groups.io/g/devel/message/45893 Mute This Topic: https://groups.io/mt/32918185/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-