From nobody Sun Feb 8 05:09:06 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+45257+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+45257+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1565331152; cv=none; d=zoho.com; s=zohoarc; b=bDeiNVzNONU3oEBxSnBj7BUB0qF/cGd88pBtVaJqnPBPnSTN8AL8wfkQn4S2ToNlCz+TQL8cQbQ75FV7eJJpMg8qvU+9L9Nq9w4zwqM44lxvppvHeLqU+DF7H2AheYC10liuiRUh4MuCUJb9uEbgrX6cpnyOtYME9Pa6Hkk2zRw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565331152; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=PR+5/W6q09sMqRsrl04i6x3qiruyeoqsNgcjgptYOik=; b=KKWWziqXkImYlXSAE723YiR1Ep4iaHr2CSI8Y0sYD5zVRGqv1/rSlvURmt8Uwfqs/ZN2mFwAheqTPUxGa7Op7ZCE0dY2HqScZb5rZKtCyPYPmt4OvXSJJMuBHM05XePh1AoOBpaWnVp6NE0yIECx72Q8oEP6l4bt+5zijgW52JU= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+45257+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1565331152339694.6143409778824; Thu, 8 Aug 2019 23:12:32 -0700 (PDT) Return-Path: X-Received: from mga06.intel.com (mga06.intel.com []) by groups.io with SMTP; Thu, 08 Aug 2019 23:12:31 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2019 23:12:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,364,1559545200"; d="scan'208";a="326540080" X-Received: from ydong10-win10.ccr.corp.intel.com ([10.239.158.133]) by orsmga004.jf.intel.com with ESMTP; 08 Aug 2019 23:12:30 -0700 From: "Dong, Eric" To: devel@edk2.groups.io Cc: Ray Ni , Laszlo Ersek Subject: [edk2-devel] [Patch 3/4] UefiCpuPkg/PiSmmCpuDxeSmm: Supports detect before set new value logic. Date: Fri, 9 Aug 2019 14:11:58 +0800 Message-Id: <20190809061159.40248-4-eric.dong@intel.com> In-Reply-To: <20190809061159.40248-1-eric.dong@intel.com> References: <20190809061159.40248-1-eric.dong@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,eric.dong@intel.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1565331151; bh=ftKmadOk0HR/8MHVpAppxmGXYk42fLSCjMOIgW0cnVc=; h=Cc:Date:From:Reply-To:Subject:To; b=i6AWFTzdu8fmBUynCu+8wHVzDfjiVaPsodT/3EGmpHv88/rmI/jXaZdt6CxY4WMlOjz oCaOOOOtvD62hnvDwpTXure410vLO6rSfd8DENvPOWvWxQZEo1R1V7TNqUX54M19Zrsq5 4zQAWDjNwXVWoYrBABgojBYMq40/M6Ac9lA= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D2040 Supports new logic which detect current value before set new value. Only set new value when current value not same as new value. Signed-off-by: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek --- UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 135 ++++++++++++++++++++---------- 1 file changed, 92 insertions(+), 43 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/= CpuS3.c index d8c6b19ead..957f2896eb 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -159,6 +159,58 @@ S3WaitForSemaphore ( ) !=3D Value); } =20 +/** + Read / write CR value. + + @param[in] CrIndex The CR index which need to read/write. + @param[in] Read Read or write. TRUE is read. + @param[in,out] CrValue CR value. + + @retval EFI_SUCCESS means read/write success, else return EFI_UNSUPPO= RTED. +**/ +UINTN +ReadWriteCr ( + IN UINT32 CrIndex, + IN BOOLEAN Read, + IN OUT UINTN *CrValue + ) +{ + switch (CrIndex) { + case 0: + if (Read) { + *CrValue =3D AsmReadCr0 (); + } else { + AsmWriteCr0 (*CrValue); + } + break; + case 2: + if (Read) { + *CrValue =3D AsmReadCr2 (); + } else { + AsmWriteCr2 (*CrValue); + } + break; + case 3: + if (Read) { + *CrValue =3D AsmReadCr3 (); + } else { + AsmWriteCr3 (*CrValue); + } + break; + case 4: + if (Read) { + *CrValue =3D AsmReadCr4 (); + } else { + AsmWriteCr4 (*CrValue); + } + break; + default: + return EFI_UNSUPPORTED;; + } + + return EFI_SUCCESS; +} + /** Initialize the CPU registers from a register table. =20 @@ -188,6 +240,8 @@ ProgramProcessorRegister ( UINTN ProcessorIndex; UINTN ValidThreadCount; UINT32 *ValidCoreCountPerPackage; + EFI_STATUS Status; + UINT64 CurrentValue; =20 // // Traverse Register Table of this logical processor @@ -206,55 +260,50 @@ ProgramProcessorRegister ( // The specified register is Control Register // case ControlRegister: - switch (RegisterTableEntry->Index) { - case 0: - Value =3D AsmReadCr0 (); - Value =3D (UINTN) BitFieldWrite64 ( - Value, - RegisterTableEntry->ValidBitStart, - RegisterTableEntry->ValidBitStart + RegisterTabl= eEntry->ValidBitLength - 1, - (UINTN) RegisterTableEntry->Value - ); - AsmWriteCr0 (Value); - break; - case 2: - Value =3D AsmReadCr2 (); - Value =3D (UINTN) BitFieldWrite64 ( - Value, - RegisterTableEntry->ValidBitStart, - RegisterTableEntry->ValidBitStart + RegisterTabl= eEntry->ValidBitLength - 1, - (UINTN) RegisterTableEntry->Value - ); - AsmWriteCr2 (Value); - break; - case 3: - Value =3D AsmReadCr3 (); - Value =3D (UINTN) BitFieldWrite64 ( - Value, - RegisterTableEntry->ValidBitStart, - RegisterTableEntry->ValidBitStart + RegisterTabl= eEntry->ValidBitLength - 1, - (UINTN) RegisterTableEntry->Value - ); - AsmWriteCr3 (Value); - break; - case 4: - Value =3D AsmReadCr4 (); - Value =3D (UINTN) BitFieldWrite64 ( - Value, - RegisterTableEntry->ValidBitStart, - RegisterTableEntry->ValidBitStart + RegisterTabl= eEntry->ValidBitLength - 1, - (UINTN) RegisterTableEntry->Value - ); - AsmWriteCr4 (Value); - break; - default: - break; + Status =3D ReadWriteCr(RegisterTableEntry->Index, TRUE, &Value); + if (EFI_ERROR (Status)) { + return; + } + if (RegisterTableEntry->DetectIt) { + CurrentValue =3D BitFieldRead64( + Value, + RegisterTableEntry->ValidBitStart, + RegisterTableEntry->ValidBitStart + RegisterTable= Entry->ValidBitLength - 1 + ); + if (CurrentValue =3D=3D RegisterTableEntry->Value) { + return; + } } + Value =3D (UINTN) BitFieldWrite64 ( + Value, + RegisterTableEntry->ValidBitStart, + RegisterTableEntry->ValidBitStart + RegisterTableE= ntry->ValidBitLength - 1, + RegisterTableEntry->Value + ); + ReadWriteCr (RegisterTableEntry->Index, FALSE, &Value); break; // // The specified register is Model Specific Register // case Msr: + if (RegisterTableEntry->DetectIt) { + Value =3D (UINTN)AsmReadMsr64 (RegisterTableEntry->Index); + if (RegisterTableEntry->ValidBitLength >=3D 64) { + if (Value =3D=3D RegisterTableEntry->Value) { + return; + } + } else { + CurrentValue =3D BitFieldRead64( + Value, + RegisterTableEntry->ValidBitStart, + RegisterTableEntry->ValidBitStart + RegisterTab= leEntry->ValidBitLength - 1 + ); + if (CurrentValue =3D=3D RegisterTableEntry->Value) { + return; + } + } + } + // // If this function is called to restore register setting after INIT= signal, // there is no need to restore MSRs in register table. --=20 2.21.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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