From nobody Sun May 5 04:04:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+44507+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+44507+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1564398477; cv=none; d=zoho.com; s=zohoarc; b=bujlic9W8RVC5r6/XT+/dHekPtafFlz/QwD+vaDo0JR8nljpkmTwURnVrEKtHWzhxlvxQrjbnGM3rqz1dqAb115lgVRGgkHf0Cqj14i7A8fhLaLuLPs7fIq8KE9LCaYRY77aaEqFUVvUY013Ijon9334DvY99wGoAm9GVtIHVrs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1564398477; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=KOP7pKyWgUbEeFEm4c3juHxshfSqO8+nrytDDWzxYIE=; b=gkq5H3Mnk3NfsQr3iH2LQEswV5uJOLPW3oOld9NmApVVZuAzExO0txLrPSraO5b7FPuQ94aXzdBkCoOMZWbO/lnfqNozJRSjAR8JSF9sg/q47RUheIbsMeA7i0enzxEiUjpwNhWeX5J+5m251TXrL81Jwfc5WlCY8MVgDtRDJpY= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+44507+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 156439847727058.38060183101095; Mon, 29 Jul 2019 04:07:57 -0700 (PDT) Return-Path: X-Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by groups.io with SMTP; Mon, 29 Jul 2019 04:07:56 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Jul 2019 04:07:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,322,1559545200"; d="scan'208";a="165445354" X-Received: from cchiu4-mobl1.gar.corp.intel.com ([10.5.240.67]) by orsmga008.jf.intel.com with ESMTP; 29 Jul 2019 04:07:51 -0700 From: "Chiu, Chasel" To: devel@edk2.groups.io Cc: Michael Kubacki , Nate DeSimone , Liming Gao Subject: [edk2-devel] [PATCH 1/4] MinPlatformPkg: Auto configure Fsp*BaseAddress PCD Date: Mon, 29 Jul 2019 19:07:12 +0800 Message-Id: <20190729110715.2312-2-chasel.chiu@intel.com> In-Reply-To: <20190729110715.2312-1-chasel.chiu@intel.com> References: <20190729110715.2312-1-chasel.chiu@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,chasel.chiu@intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1564398476; bh=1M4u3OdMxINCzsDefJJ7umhuH21faF5ME4m8PSyq/HQ=; h=Cc:Date:From:Reply-To:Subject:To; b=ThAhKT2yqzesi2+IKtqzrdcNhpPsksasbL2MhrbE0Rw1D6XsG7gnc/E8odS1JyYPNIs ugUIb0jqP63/Ww194fWpgb8/PDPl6xIkzhFYf3RpJKFW4pzRCjXuJ4cz2FSHuWZ10I/Gm LH5BClnlMB0RzC5hrgZ/DGAghXrGxPqKKP8= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1863 Add python script which will rebase FSP binary without patching platform DSC for Fsp*BaseAddress PCDs. Those base address PCD will be updated in FDF basing on flash map. Cc: Michael Kubacki Cc: Nate DeSimone Cc: Liming Gao Signed-off-by: Chasel Chiu Reviewed-by: Ankit Sinha Reviewed-by: Nate DeSimone --- Platform/Intel/MinPlatformPkg/Tools/Fsp/RebaseFspBinBaseAddress.py | 96 ++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= +++++++++++++++++++ 1 file changed, 96 insertions(+) diff --git a/Platform/Intel/MinPlatformPkg/Tools/Fsp/RebaseFspBinBaseAddres= s.py b/Platform/Intel/MinPlatformPkg/Tools/Fsp/RebaseFspBinBaseAddress.py new file mode 100644 index 0000000000..a8165b08e6 --- /dev/null +++ b/Platform/Intel/MinPlatformPkg/Tools/Fsp/RebaseFspBinBaseAddress.py @@ -0,0 +1,96 @@ +## @ RebaseFspBinBaseAddress.py +# +# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent +# + +import os +import sys +import re +import subprocess + +if len(sys.argv) not in [5,6]: + print ("RebaseFspBinBaseAddress.py - Error in number of arguments receiv= ed") + print ("Usage - RebaseFspBinBaseAddress.py \ + ") + exit(1) + +flashMapName =3D sys.argv[1] +fspBinPath =3D sys.argv[2] +fspBinFile =3D sys.argv[3] +fvOffset =3D int(sys.argv[4], 16) +fspBinFileRebased =3D "Fsp_Rebased.fd" +splitFspBinPath =3D os.path.join("edk2","IntelFsp2Pkg","Tools","SplitFsp= Bin.py") + +if len(sys.argv) =3D=3D 6: + splitFspBinPath =3D sys.argv[5] + +# +# Make sure argument passed or valid +# +if not os.path.exists(flashMapName): + print ("WARNING! " + str(flashMapName) + " is not found.") + exit(1) +fspBinFilePath =3D fspBinPath + os.sep + fspBinFile +if not os.path.exists(fspBinFilePath): + print ("WARNING! " + str(fspBinFilePath) + " is not found.") + exit(1) +if not os.path.exists(splitFspBinPath): + print ("WARNING! " + str(splitFspBinPath) + " is not found.") + exit(1) + +# +# Get the FSP-S / FSP-M-T FV Base Address from Flash Map +# +file =3D open (flashMapName, "r") +data =3D file.read () + +# Get the Flash Base Address +flashBase =3D int(data.split("FLASH_BASE")[1].split("=3D")[1].split()[0], = 16) + +# Based on Build Target, select the section in the FlashMap file +flashmap =3D data + +# Get FSP-S & FSP-M & FSP-T offset & calculate the base +for line in flashmap.split("\n"): + if "PcdFlashFvFspSOffset" in line: + fspSBaseOffset =3D int(line.split("=3D")[1].split()[0], 16) + if "PcdFlashFvFspMOffset" in line: + fspMBaseOffset =3D int(line.split("=3D")[1].split()[0], 16) + if "PcdFlashFvFspTOffset" in line: + fspTBaseOffset =3D int(line.split("=3D")[1].split()[0], 16) +file.close() + +# +# Get FSP-M Size, in order to calculate the FSP-T Base. Used SplitFspBin.p= y script +# to dump the header, and get the ImageSize in FSP-M section +# +pythontool =3D 'python' +if 'PYTHON_HOME' in os.environ: + pythontool =3D os.environ['PYTHON_HOME'] + os.sep + 'python' +Process =3D subprocess.Popen([pythontool, splitFspBinPath, "info","-f",fsp= BinFilePath], stdout=3Dsubprocess.PIPE) +Output =3D Process.communicate()[0] +FsptInfo =3D Output.rsplit(b"FSP_M", 1); +for line in FsptInfo[1].split(b"\n"): + if b"ImageSize" in line: + fspMSize =3D int(line.split(b"=3D")[1], 16) + break + +# Calculate FSP-S/M/T base address, to which re-base has to be done +fspSBaseAddress =3D flashBase + fspSBaseOffset + fvOffset +fspMBaseAddress =3D flashBase + fspMBaseOffset +fspTBaseAddress =3D flashBase + fspTBaseOffset + +# +# Re-base FSP bin file to new address and save it as fspBinFileRebased usi= ng SplitFspBin.py +# +rebaseArguments =3D fspBinFilePath + " -c s m t -b " + str(hex(fspSBaseAdd= ress).rstrip("L")) + " " + str(hex(fspMBaseAddress).rstrip("L")) + " " + st= r(hex(fspTBaseAddress).rstrip("L")) + " -o" + fspBinPath + " -n " + fspBinF= ileRebased +os.system(pythontool + " " + splitFspBinPath + " rebase -f" + rebaseArgume= nts) + +# +# Split FSP bin to FSP-S/M/T segments +# +splitArguments =3D fspBinPath + os.sep + fspBinFileRebased + " -o " + fspB= inPath + " -n Fsp_Rebased.fd" +os.system(pythontool + " " + splitFspBinPath + " split -f" + splitArgument= s) + +exit(0) --=20 2.13.3.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#44507): https://edk2.groups.io/g/devel/message/44507 Mute This Topic: https://groups.io/mt/32640906/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 5 04:04:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+44508+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+44508+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1564398477; cv=none; d=zoho.com; s=zohoarc; b=OTjSoCeDUsE2+3VV9paVTwc4TON8cjvXh3XWVBja8IBEkw4v1u3g5qEKRxNm72IkFkgI3rV53O8n0ahGQZSMomyL8OW0tj+nuzZXNaJ2zWVUydfEC96gTwVwZTgcJlKbvL9F5RZHzurlophHJ2Wo4Uc1yEuXiSFSigrDQVg/OeM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1564398477; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=SA0yrQmHi+/GuY3Ymnd8FS0JlVeMz/akJC+IR8vLxVo=; b=AjQNXFQXazhyV0PRgHOeSzut67iw7RyFcw2k/D43WsoHjJrJuJShBq+EwWEXGR2l1d4lOvXA4m1E0PxPy5aGWdhAQvN0gQUSTpKH3CMaX0FLybliBlGGV6/ru8PYLPbH0mOZOQKdIn28zaYD1r0DzopEOTf28LVPctySWJ9R0sw= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+44508+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1564398477106896.8020954836984; Mon, 29 Jul 2019 04:07:57 -0700 (PDT) Return-Path: X-Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by groups.io with SMTP; Mon, 29 Jul 2019 04:07:56 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Jul 2019 04:07:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,322,1559545200"; d="scan'208";a="165445368" X-Received: from cchiu4-mobl1.gar.corp.intel.com ([10.5.240.67]) by orsmga008.jf.intel.com with ESMTP; 29 Jul 2019 04:07:52 -0700 From: "Chiu, Chasel" To: devel@edk2.groups.io Cc: Michael Kubacki , Nate DeSimone , Liming Gao Subject: [edk2-devel] [PATCH 2/4] Platform/Intel: Auto configure Fsp*BaseAddress PCD Date: Mon, 29 Jul 2019 19:07:13 +0800 Message-Id: <20190729110715.2312-3-chasel.chiu@intel.com> In-Reply-To: <20190729110715.2312-1-chasel.chiu@intel.com> References: <20190729110715.2312-1-chasel.chiu@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,chasel.chiu@intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1564398476; bh=++ce4Q4It0K13LanauKjM8/Ijm8SG7WI8nIPGsheBNY=; h=Cc:Date:From:Reply-To:Subject:To; b=g2Bl313/YBoHsHvG9m7fMKiP+m3Q1CpE+zGlcNA2p9DO7fJVR7TI9V2txuEsODTnjuI BBuaCpm6Mf+GPjP7VakUQfQiYyCCyo84D1KQr/mK3D7BresYfCTS17eYt3q/vpGxS61L/ +Q5fPDkfU40V0j0LDkHj0t8x8ejx4mZ3GSk= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1863 Consume RebaseFspBinBaseAddress.py which will only rebase FSP binary without patching platform DSC. Cc: Michael Kubacki Cc: Nate DeSimone Cc: Liming Gao Signed-off-by: Chasel Chiu Reviewed-by: Ankit Sinha Reviewed-by: Nate DeSimone --- Platform/Intel/build_bios.py | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/Platform/Intel/build_bios.py b/Platform/Intel/build_bios.py index c01b953d16..37b5ee2f5b 100644 --- a/Platform/Intel/build_bios.py +++ b/Platform/Intel/build_bios.py @@ -303,21 +303,18 @@ def build(config): os.path.join(config['WORKSPACE_PLATFORM'], config['PLATFORM_PACKAGE'], 'Tools', 'Fsp', - 'RebaseAndPatchFspBinBaseAddress.py'), + 'RebaseFspBinBaseAddress.py'), os.path.join(config['WORKSPACE_PLATFORM'], config['FLASH_MAP_FDF']), os.path.join(config['WORKSPACE_FSP_BIN'], config['FSP_BIN_PKG']), "Fsp.fd", - os.path.join(config['WORKSPACE_PLATFORM'], - config['PROJECT'], - config['BOARD_PKG_PCD_DSC']), "0x0"] =20 _, _, _, return_code =3D execute_script(command, config, shell=3DF= alse) =20 if return_code !=3D 0: - print("ERROR:RebaseAndPatchFspBinBaseAddress failed") + print("ERROR:RebaseFspBinBaseAddress failed") sys.exit(return_code) =20 # create Fsp_Rebased.fd which is Fsp_Rebased_S.fd + --=20 2.13.3.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#44508): https://edk2.groups.io/g/devel/message/44508 Mute This Topic: https://groups.io/mt/32640907/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 5 04:04:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+44510+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+44510+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1564398477; cv=none; d=zoho.com; s=zohoarc; b=dfsVo3vadK3oVeZBuCtCnJCLUGR/gKvXs8IDvOZkrhYzXT02A5De67I3OGHxXLOMSPhMip+65jsA8ERQwkf/sfTRjj6gH2GTwuB/iEeWr3Wkdn/TZnuM+EwHimC/7T3smr49OC67vyLK8o68BJ+yIQ/M/VPrpNO1f2QctA/wuaw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1564398477; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=R2c4wSZer2ZADgQyBlnOCmnvctL9+me024V9ujtGJkE=; b=ZdcdkDXJarChnc8TOiCU48r6eB4naajTbBqHhMbn6K4OI0E9Hal6YK5SBMoeeuWoON6XY2KX4443+EOJmsohQ/oOef/cgKTFY+OFltgjE1xsSLnC5l0McxmqM99+ZXNeUGmjjseAcN2mpuvuon89Ih3pCK8cx+6PuupBsKgwulk= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+44510+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 15643984772679.964622304755721; Mon, 29 Jul 2019 04:07:57 -0700 (PDT) Return-Path: X-Received: from mga12.intel.com (mga12.intel.com []) by groups.io with SMTP; Mon, 29 Jul 2019 04:07:56 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Jul 2019 04:07:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,322,1559545200"; d="scan'208";a="165445382" X-Received: from cchiu4-mobl1.gar.corp.intel.com ([10.5.240.67]) by orsmga008.jf.intel.com with ESMTP; 29 Jul 2019 04:07:53 -0700 From: "Chiu, Chasel" To: devel@edk2.groups.io Cc: Michael Kubacki , Nate DeSimone , Liming Gao Subject: [edk2-devel] [PATCH 3/4] KabylakeOpenBoardPkg: Auto configure Fsp*BaseAddress PCD Date: Mon, 29 Jul 2019 19:07:14 +0800 Message-Id: <20190729110715.2312-4-chasel.chiu@intel.com> In-Reply-To: <20190729110715.2312-1-chasel.chiu@intel.com> References: <20190729110715.2312-1-chasel.chiu@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,chasel.chiu@intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1564398476; bh=sCdXkemwTAZwEFGyRpwaq8dtHt0+uQb8kRY8l8tKIGE=; h=Cc:Date:From:Reply-To:Subject:To; b=GuNOGbuKxD0JKjrd74jSYEhEsohE2M3m4ot5IsQbntw78LFUerC6l28qrquuXsqiLAC MZJZwlsWWVX11nF6o26vRsIK/62IsPox1B+bqQKPOsBYLwASi338ERIVj7jc66hxvW/Ac UBuK/G2fo+rF1unJLvE5/zYtSOKzTPa7rHU= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1863 PcdFsp*BaseAddress now will be updated in FDF basing on flash map. DSC will only define types of those PCDs and always having 0 as default. Test: interanl platform booted with this patch. Cc: Michael Kubacki Cc: Nate DeSimone Cc: Liming Gao Signed-off-by: Chasel Chiu Reviewed-by: Ankit Sinha Reviewed-by: Nate DeSimone --- Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf | 3 = +++ Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc | 12 = +++++++++--- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.= fdf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf index abafd8e44d..7267d478ad 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf @@ -53,6 +53,9 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize= =3D gSiPkgTokenSpaceG SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvOffset SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gSiPkgTok= enSpaceGuid.PcdFlashAreaBaseAddress SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gSiPkgTok= enSpaceGuid.PcdFlashAreaSize +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pc= dFlashFvFspTOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pc= dFlashFvFspMOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pc= dFlashFvFspSOffset) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gSiPkgTok= enSpaceGuid.PcdFlashAreaBaseAddress SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gSiPkgTok= enSpaceGuid.PcdFlashAreaSize ##########################################################################= ###### diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgP= cd.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.d= sc index c22e91af12..55ae9f47ac 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc @@ -144,8 +144,11 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000 gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0xE0 !endif =20 - gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0xFFEBC000 - gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0xFFE00000 + # + # FSP Base address PCD will be updated in FDF basing on flash map. + # + gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0 + gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0 =20 ## Specifies timeout value in microseconds for the BSP to detect all APs= for the first time. # @Prompt Timeout for the BSP to detect all APs for the first time. @@ -252,7 +255,10 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000 !endif =20 [PcdsDynamicDefault] - gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0xFFDA0000 + # + # FSP Base address PCD will be updated in FDF basing on flash map. + # + gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0 # Platform will pre-allocate UPD buffer and pass it to FspWrapper # Those dummy address will be patched before FspWrapper executing gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0xFFFFFFFF --=20 2.13.3.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#44510): https://edk2.groups.io/g/devel/message/44510 Mute This Topic: https://groups.io/mt/32640909/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 5 04:04:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+44511+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+44511+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1564398477; cv=none; d=zoho.com; s=zohoarc; b=Q/72zSXqMpGDVYwv7e3HtVQs2OX7AkH95LQVaGuHYbo8C2q/ZlBjtOnWZlCZcjHHNOCdUALGFF3I9/6Vj0ia8ksynJJnPR/zLjkOSMgqrsnWJgbTsKtpivQp3gXbvNitiqjllK67BJ+nEOJ3gnjJmJGoCRg31hAv4ydCoSYLcWA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1564398477; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=Yob3Rdmp9q8oG0ln6HFPTnojc6TjhTJQr0W85MCp+7Y=; b=i64WXuRN6jvQ+PAJ2GkjnMkYD+F4LBw8ctE3sQ6dd+rRIUdzY2AKWLCZ3jRJZKikJaUfZQU3rQtJmVoiUg1HS9CxNgmCt7ZG3pRwtBH8c5PKTc3/irMyQ9HVQ8uCy3HWHcSikoP/qZZdfufjVETh1P4C0BkE7esyOl/c9E4RwZg= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+44511+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1564398477426118.43119285371097; Mon, 29 Jul 2019 04:07:57 -0700 (PDT) Return-Path: X-Received: from mga12.intel.com (mga12.intel.com []) by groups.io with SMTP; Mon, 29 Jul 2019 04:07:56 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Jul 2019 04:07:56 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,322,1559545200"; d="scan'208";a="165445397" X-Received: from cchiu4-mobl1.gar.corp.intel.com ([10.5.240.67]) by orsmga008.jf.intel.com with ESMTP; 29 Jul 2019 04:07:55 -0700 From: "Chiu, Chasel" To: devel@edk2.groups.io Cc: Michael Kubacki , Ankit Sinha , Nate DeSimone , Liming Gao Subject: [edk2-devel] [PATCH 4/4] ClevoOpenBoardPkg: Auto configure Fsp*BaseAddress PCD Date: Mon, 29 Jul 2019 19:07:15 +0800 Message-Id: <20190729110715.2312-5-chasel.chiu@intel.com> In-Reply-To: <20190729110715.2312-1-chasel.chiu@intel.com> References: <20190729110715.2312-1-chasel.chiu@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,chasel.chiu@intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1564398477; bh=+Pq2mfijYRICvUughPkiMID4zZaKTbYgEeGgpXt1KBI=; h=Cc:Date:From:Reply-To:Subject:To; b=P0caZcAgoTm7iRdEMTKbAfch+w3WyI66QEsgNK321IXXRuy81PbEnbOEjW/k4m5xALh oFFGMRLBLbik9WiYS7jwAQkfixcpUj9LNNMEEqxjEX6Gu7QuPtD3krB8+RFqiBnc61eOR SqVu2a10asMUaHe9o9izAkHvlllAHcCv9SY= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1863 PcdFsp*BaseAddress now will be updated in FDF basing on flash map. DSC will only define types of those PCDs and always having 0 as default. Test: interanl platform booted with this patch. Cc: Michael Kubacki Cc: Ankit Sinha Cc: Nate DeSimone Cc: Liming Gao Signed-off-by: Chasel Chiu Reviewed-by: Ankit Sinha Reviewed-by: Nate DeSimone --- Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf | 3 +++ Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc | 12 +++++++++= --- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf b/Pla= tform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf index da498ad379..c425e4b280 100644 --- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf +++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf @@ -53,6 +53,9 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize= =3D gSiPkgTokenSpaceG SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvOffset SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gSiPkgTok= enSpaceGuid.PcdFlashAreaBaseAddress SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gSiPkgTok= enSpaceGuid.PcdFlashAreaSize +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pc= dFlashFvFspTOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pc= dFlashFvFspMOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pc= dFlashFvFspSOffset) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gSiPkgTok= enSpaceGuid.PcdFlashAreaBaseAddress SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gSiPkgTok= enSpaceGuid.PcdFlashAreaSize ##########################################################################= ###### diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc b/= Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc index c6bce19856..83cbd18557 100644 --- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc +++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc @@ -109,8 +109,11 @@ gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0xE0 !endif =20 - gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0xFFEBC000 - gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0xFFE00000 + # + # FSP Base address PCD will be updated in FDF basing on flash map. + # + gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0 + gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0 =20 ## Specifies max supported number of Logical Processors. # @Prompt Configure max supported number of Logical Processorss @@ -201,7 +204,10 @@ !endif =20 [PcdsDynamicDefault] - gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0xFFDA0000 + # + # FSP Base address PCD will be updated in FDF basing on flash map. + # + gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0 # Platform will pre-allocate UPD buffer and pass it to FspWrapper # Those dummy address will be patched before FspWrapper executing gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0xFFFFFFFF --=20 2.13.3.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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