From nobody Mon Feb 9 03:12:55 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+44173+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+44173+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1563836349; cv=none; d=zoho.com; s=zohoarc; b=HgTXsWhKPoQ+zVqCp5pcy5UTceBI294myJV9HD8Xtt0LSf21W5Cov97cpjZp3H06O522Fys6bnVj9fmS9H6aZrroyKAsxyMehS05w6MW0DZTML/kyFxtAB0d9yjUYwYDgtmZtyvMjDkdP1SVOez44SRncEepT1XWFehlKNLIEVg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1563836349; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=84SyFrCjlQE/Vw7bXzKUHpoTFaz7fL+CKL7wRm/3nsU=; b=SoaXTaM+Hfcm++MqqNCHMgz9F2TiP5HKGMyIR7EAuT8gteOmia3PX60IBKQVXg9N5WLaELJMGwxU5nswMBra2eorRIPiRVBpohhRv+TGvqBy2/f5k7bZiuUjYOep1L3pJ41EOwA42BC3VCqYYVnI/qWUbxq1H7eY79GneHvdIWQ= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+44173+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1563836349290697.0428437660827; Mon, 22 Jul 2019 15:59:09 -0700 (PDT) Return-Path: X-Received: from mga02.intel.com (mga02.intel.com []) by groups.io with SMTP; Mon, 22 Jul 2019 15:59:07 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Jul 2019 15:59:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,296,1559545200"; d="scan'208";a="169386493" X-Received: from mdkinney-mobl2.amr.corp.intel.com ([10.254.83.213]) by fmsmga008.fm.intel.com with ESMTP; 22 Jul 2019 15:59:05 -0700 From: "Michael D Kinney" To: devel@edk2.groups.io Cc: Zailiang Sun , Yi Qian , Gary Lin Subject: [edk2-devel] [edk2-platforms Patch V3 06/12] Vlv2TbltDevicePkg: Remove non ASCII characters from source files Date: Mon, 22 Jul 2019 15:58:53 -0700 Message-Id: <20190722225859.24724-7-michael.d.kinney@intel.com> In-Reply-To: <20190722225859.24724-1-michael.d.kinney@intel.com> References: <20190722225859.24724-1-michael.d.kinney@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,michael.d.kinney@intel.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1563836348; bh=UcSyiJ0pyImjIp3j2p13kwXg+yaJlJxzbec+fCXDptI=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=V8MBRzI8DjVLcWtJ2WNyJ9YnNR/2zIBgu8T6+ttG0wXMaUffTZKaNsrcQCT1MUt3htz LnC9TZSCOiaz0xYc5LTMpsY2a9DNHZMQVe3UIzoP6P6T8Q8adFmGvdqad4JdTX5cVsuUW JNV/sVb7oulstdLPvTW0JmNfN2Iis9kouec= X-ZohoMail-DKIM: pass (identity @groups.io) Remove non-ASCII characters from comments in source files. These are preventing the build tool from generating report files on Linux systems. Cc: Zailiang Sun Cc: Yi Qian Cc: Gary Lin Signed-off-by: Michael D Kinney --- .../Intel/Vlv2TbltDevicePkg/PlatformInitPei/PchInitPeim.c | 2 +- Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/BootMode.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PchInitPeim.c= b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PchInitPeim.c index 4a51a47e36..71d6cb7c15 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PchInitPeim.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PchInitPeim.c @@ -461,7 +461,7 @@ UARTInit ( if (SystemConfiguration->LpssHsuart0Enabled =3D=3D 1){ // //Valleyview BIOS Specification Vol2,17.2 - //LPSS_UART1 =EF=BF=BDC set each pad PAD_CONF0.Func_Pin_Mux to fun= ction 1: + //LPSS_UART1 C set each pad PAD_CONF0.Func_Pin_Mux to function 1: // MmioAnd8 (IO_BASE_ADDRESS + 0x0090, (UINT8)~0x07); MmioOr8 (IO_BASE_ADDRESS + 0x0090, 0x01); diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/BootMode.c b/Plat= form/Intel/Vlv2TbltDevicePkg/PlatformPei/BootMode.c index 4c0e660b7f..2061b8d559 100644 --- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/BootMode.c +++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/BootMode.c @@ -205,9 +205,9 @@ GetSleepTypeAfterWakeup ( // VLV BIOS Specification 0.6.2 - Section 18.4, "Power Failure Considera= tion" // // When the SUS_PWR_FLR bit is set, it indicates the SUS well power is l= ost. - // This bit is in the SUS Well and defaults to 1=EF=BF=BDb1 based on RSM= RST# assertion (not cleared by any type of reset). + // This bit is in the SUS Well and defaults to 1'b1 based on RSMRST# ass= ertion (not cleared by any type of reset). // System BIOS should follow cold boot path if SUS_PWR_FLR (PBASE + 0x20= [14]), - // GEN_RST_STS (PBASE + 0x20[9]) or PWRBTNOR_STS (ABASE + 0x00[11]) is s= et to 1=EF=BF=BDb1 + // GEN_RST_STS (PBASE + 0x20[9]) or PWRBTNOR_STS (ABASE + 0x00[11]) is s= et to 1'b1 // regardless of the value in the SLP_TYP (ABASE + 0x04[12:10]) field. // GenPmCon1 =3D MmioRead16 (PMC_BASE_ADDRESS + R_PCH_PMC_GEN_PMCON_1); --=20 2.21.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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