From nobody Fri Apr 26 23:44:26 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+43363+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+43363+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1562336258; cv=none; d=zoho.com; s=zohoarc; b=c+wpV1mL5qnIolyJ0YbUstTIE57+d3I4ecKLywCWB+y3fcTfledTQr6EbS3mgk0euSug6+GRsgIvtfGTBZsDmgu5izrGGYsIe/EOsco+Upcm4wvP8XtpgWVs+SCNDaorgZTojM2Zmx8XauGlr4JeIP4+G5um5h2gH7tHhCWe+6o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1562336258; h=Content-Transfer-Encoding:Cc:Date:From:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To:ARC-Authentication-Results; bh=j7MVTzSRXWEqA74kO+xqIQixr4+YK0cBTX2epoQ4uhQ=; b=Xg8crSR0dsdb0tN6muNJhrxxwdWaoYIsJd8P4OoL5odUHqy1JHmrZ5ltkRwtb7U87Mj8can2K802KdyFlM/5l4Xal4zlzbttNhaA4slasJe/aWhaepaQDX9sP7BwbB2F0y2AaYkpkrHIAjBW/C8qOVxJ0FaxVsg3pu/HKFys5Co= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+43363+1787277+3901457@groups.io Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1562336258145770.1951790909078; Fri, 5 Jul 2019 07:17:38 -0700 (PDT) Return-Path: X-Received: from mout.gmx.net (mout.gmx.net [212.227.17.20]) by groups.io with SMTP; Fri, 05 Jul 2019 07:17:36 -0700 X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c X-Received: from localhost.localdomain ([45.32.43.45]) by mail.gmx.com (mrgmx103 [212.227.17.168]) with ESMTPSA (Nemesis) id 0MAy40-1hr8mg2GWq-009xzX; Fri, 05 Jul 2019 16:17:28 +0200 From: =?UTF-8?B?Q8WTdXI=?= To: devel@edk2.groups.io, nathaniel.l.desimone@intel.com, star.zeng@intel.com, chasel.chiu@intel.com Cc: =?UTF-8?q?Antoine=20C=C5=93ur?= Subject: [edk2-devel] [PATCH] IntelFsp2Pkg: Fix various typos Date: Fri, 5 Jul 2019 22:17:05 +0800 Message-Id: <20190705141705.82437-1-coeur@gmx.fr> MIME-Version: 1.0 X-Provags-ID: V03:K1:7zN1QWewIZwIjwVygK6yMF2KvOBL7VUZQtD6MAzKy/E/M9jkvep Bdj4jcHW1raVQS4M/Xu9cmBN/ZdPA6razOa1qRDvc0QNzICu++sgRrpDKsEHYt1ITd2/E8j 8cQzlHoWLOWivKZ4u2vqcqP8RJ2279ALkSUTFhZgognkDwR5Q1mYhztXvDH8On1Gqg9ZkWF 7/jSKFEPUT7N3KkStL3dg== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1;V03:K0:Z8z1lgfQpRg=:A6iVHauKYHokmLbjEf6utf q7NJWL00nS7F+mYSEYVL+zsxdoFtPj9Qj+BYwFbFKqNthWiql6g4JJEtm7KIMiZaw0gneVIZA 164GxWEHuDAAMYCC45iHmsON9tP8uLR3IFdBTPu4hEzDHyqc65RTH91qCT06ZDoEARc4fXdi7 wN+p4oaC69TjwiVnf56G7D12V8wwvuXuBsdATKHbg7sROLhbHRbfJg6ooEgPt7x3Vbv3Ga9Rj Z9zWLqGdDK5H28aRq50By43ptl8aFTaj8bvtT6n7XJ2k1r0aQYuFqJnAWxrDJcmKNt6Gn9AmS zu0HroPcp5e6lhBGPh0jTPjBaCBh3OKDFvShzLHf2MonlrJZgRA0K9JQKd9hC0KeFxP/qBMQb N1StftfBSYlNi9BQZvv4bPzyos4WCexlRPVUeae4m0mHm3NPTCKznfyFoL9F9Rol6nbfz/hxp aAuVT6lrxo7ngao8CmxQ9MSrK7Z1l27bB1CMSV+B9RjhnvzAPlTihi1PLnqW7FAQ5ZP184VJB 2hc08sc3+5jbBf0Iq2cOHKCJkoOQhlJkoTFW/oXHl3mwA1lQOKLeWBcnAn0jbTz15belbh77+ N75Hh4GMfoZNRMN3+nm94Nit7m4cn7WXju4jMUNHMDieW2jU6OdCQcY+BMqlzz/O5HbNjYhrK KXLxjQ2HuGlJ0ThIq/YLNzdz7bTUSkcATmktEItRQlvdMTZ45pbwmCU14OZ5UwR2mRNw1bghR SA03IEvsxWJkWYteQFDP4VlcOLAfFtYZ2+BKC9YgFpZo11pXO7IZoPa/orDcMoV8ZAWdQrFdo a/2Hf8GKhj31lzq7XLO+WsTtlP2hYcoooeiRD3lelWeGQd2rnOYcdfcN5j6itU/k6M47tAbH9 VKKgmYl2wBh8RISt+rd93FhkIlF9u7LNBxIaiKdRy7/kia6aaDIJe/1An7AIRI+f71ukr4+8M lDmGClaChJfugS2uxSmPFoohMCtXstMQ2CdCB2iXLIF38ZkC2aheftpOjSGuFb42MKgoZ+Fnc UuarxghB84m8EXwc6r59s7oIJ7HzEzlwacCNT0Z8lFQwNFHAWBF6zR3qXn/JCBDv1A== Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,coeur@gmx.fr Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1562336257; bh=GiXuXeNWTAjAKReSCwnp9mgWcyR3NVOmAZ9wdb1G7qw=; h=Cc:Date:From:Reply-To:Subject:To; b=e7Jp3rd+//2WoNml+XBbhzsMapgqo67fud62Ogtf2ePOpeAB8BO8r4mM78optexkhlg mzeI7M+935cyhfmlnYj5338Xj0t8AwPT2MQfwg8KvSDLAKYOSR63ZSnKESlsuu6N/oMVT rtkwbmBgA6VJ9nufFjOx+rZXrDQz4eTLRzU= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Fix various typos in IntelFsp2Pkg. Reviewed-by: Chasel Chiu Reviewed-by: Star Zeng --- .../FspSecCore/Ia32/FspApiEntryM.nasm | 4 +-- .../FspSecCore/Ia32/InitializeFpu.nasm | 2 +- .../FspSecCore/Ia32/SaveRestoreSseNasm.inc | 2 +- IntelFsp2Pkg/FspSecCore/Ia32/Stack.nasm | 2 +- IntelFsp2Pkg/FspSecCore/SecFsp.c | 2 +- IntelFsp2Pkg/FspSecCore/SecMain.c | 2 +- .../FspSecCore/Vtf0/Ia16/ResetVec.asm16 | 2 +- IntelFsp2Pkg/Include/FspEas/FspApi.h | 6 ++-- .../Include/Library/FspSecPlatformLib.h | 2 +- IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c | 10 +++--- .../BaseFspDebugLibSerialPort/DebugLib.c | 34 +++++++++---------- .../BaseFspSwitchStackLib/Ia32/Stack.nasm | 2 +- .../SecFspSecPlatformLibNull/Ia32/Flat32.nasm | 2 +- .../PlatformSecLibNull.c | 2 +- IntelFsp2Pkg/Tools/GenCfgOpt.py | 2 +- IntelFsp2Pkg/Tools/PatchFv.py | 2 +- .../Tools/UserManuals/GenCfgOptUserManual.md | 2 +- .../Tools/UserManuals/PatchFvUserManual.md | 2 +- 18 files changed, 41 insertions(+), 41 deletions(-) diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm b/IntelFsp2Pkg/= FspSecCore/Ia32/FspApiEntryM.nasm index f14c18c7b9..e7261b41cd 100644 --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm @@ -194,9 +194,9 @@ StackSetupDone: ; ; Pass BFV into the PEI Core - ; It uses relative address to calucate the actual boot FV base + ; It uses relative address to calculate the actual boot FV base ; For FSP implementation with single FV, PcdFspBootFirmwareVolumeBase and - ; PcdFspAreaBaseAddress are the same. For FSP with mulitple FVs, + ; PcdFspAreaBaseAddress are the same. For FSP with multiple FVs, ; they are different. The code below can handle both cases. ; call ASM_PFX(AsmGetFspBaseAddress) diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm b/IntelFsp2Pkg= /FspSecCore/Ia32/InitializeFpu.nasm index e1886ea11b..c45520c6c1 100644 --- a/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm +++ b/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm @@ -46,7 +46,7 @@ ASM_PFX(InitializeFloatingPointUnits): fldcw [ASM_PFX(mFpuControlWord)] ; - ; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] =3D 1) to test + ; Use CpuId instruction (CPUID.01H:EDX.SSE[bit 25] =3D 1) to test ; whether the processor supports SSE instruction. ; mov eax, 1 diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc b/IntelFsp= 2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc index b257deb76c..09cb813497 100644 --- a/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc +++ b/IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc @@ -150,7 +150,7 @@ NextAddress: fldcw [FpuControlWord] ; - ; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] =3D 1) to = test + ; Use CpuId instruction (CPUID.01H:EDX.SSE[bit 25] =3D 1) to t= est ; whether the processor supports SSE instruction. ; mov eax, 1 diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/Stack.nasm b/IntelFsp2Pkg/FspSecC= ore/Ia32/Stack.nasm index d72212ed45..f183d0d10b 100644 --- a/IntelFsp2Pkg/FspSecCore/Ia32/Stack.nasm +++ b/IntelFsp2Pkg/FspSecCore/Ia32/Stack.nasm @@ -58,7 +58,7 @@ ASM_PFX(SecSwitchStack): mov esp, eax ; From now, esp is pointed to perma= nent memory ; - ; Fixup the ebp point to permenent memory + ; Fixup the ebp point to permanent memory ; mov eax, ebp sub eax, ebx diff --git a/IntelFsp2Pkg/FspSecCore/SecFsp.c b/IntelFsp2Pkg/FspSecCore/Sec= Fsp.c index 6497c88ebe..a939b7e836 100644 --- a/IntelFsp2Pkg/FspSecCore/SecFsp.c +++ b/IntelFsp2Pkg/FspSecCore/SecFsp.c @@ -169,7 +169,7 @@ FspGlobalDataInit ( SerialPortInitialize (); // - // Ensure the golbal data pointer is valid + // Ensure the global data pointer is valid // ASSERT (GetFspGlobalDataPointer () =3D=3D PeiFspData); diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c b/IntelFsp2Pkg/FspSecCore/Se= cMain.c index cd3ab46ce2..a63d1336e4 100644 --- a/IntelFsp2Pkg/FspSecCore/SecMain.c +++ b/IntelFsp2Pkg/FspSecCore/SecMain.c @@ -110,7 +110,7 @@ SecStartup ( // |-------------------|----> // | | // | | - // | Heap | PeiTemporayRamSize + // | Heap | PeiTemporaryRamSize // | | // | | // |-------------------|----> TempRamBase diff --git a/IntelFsp2Pkg/FspSecCore/Vtf0/Ia16/ResetVec.asm16 b/IntelFsp2Pk= g/FspSecCore/Vtf0/Ia16/ResetVec.asm16 index f25de0206a..e16d692a76 100644 --- a/IntelFsp2Pkg/FspSecCore/Vtf0/Ia16/ResetVec.asm16 +++ b/IntelFsp2Pkg/FspSecCore/Vtf0/Ia16/ResetVec.asm16 @@ -61,7 +61,7 @@ ApStartup: ; ; Jmp Rel16 instruction ; Use machine code directly in case of the assembler optimization - ; SEC entry point relatvie address will be fixed up by some build tool. + ; SEC entry point relative address will be fixed up by some build tool. ; ; Typically, SEC entry point is the function _ModuleEntryPoint() defin= ed in ; SecEntry.asm diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h b/IntelFsp2Pkg/Include/Fs= pEas/FspApi.h index 1d38e639e6..dea99afc64 100644 --- a/IntelFsp2Pkg/Include/FspEas/FspApi.h +++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h @@ -211,12 +211,12 @@ EFI_STATUS each FSP release. After FspMemInit completes its execution, it passes the pointer to the H= obList and returns to the boot loader from where it was called. BootLoader is respo= nsible to - migrate it's stack and data to Memory. + migrate its stack and data to Memory. FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate = method to complete the silicon initialization and provides bootloader an opportuni= ty to get control after system memory is available and before the temporary RAM is= torn down. - @param[in] FspmUpdDataPtr Pointer to the FSPM_UPD data sructur= e. + @param[in] FspmUpdDataPtr Pointer to the FSPM_UPD data structu= re. @param[out] HobListPtr Pointer to receive the address of th= e HOB list. @retval EFI_SUCCESS FSP execution environment was initia= lized successfully. @@ -271,7 +271,7 @@ EFI_STATUS @retval EFI_INVALID_PARAMETER Input parameters are invalid. @retval EFI_UNSUPPORTED The FSP calling conditions were not = met. @retval EFI_DEVICE_ERROR FSP initialization failed. - @retval FSP_STATUS_RESET_REQUIREDx A reset is reuired. These status cod= es will not be returned during S3. + @retval FSP_STATUS_RESET_REQUIREDx A reset is required. These status co= des will not be returned during S3. **/ typedef EFI_STATUS diff --git a/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h b/IntelFsp2Pk= g/Include/Library/FspSecPlatformLib.h index 48b04c5a90..bd057ecf1b 100644 --- a/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h +++ b/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h @@ -66,7 +66,7 @@ SecCarInit ( ); /** - This function check the signture of UPD. + This function check the signature of UPD. @param[in] ApiIdx Internal index of the FSP API. @param[in] ApiParam Parameter of the FSP API. diff --git a/IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c b/IntelFsp2Pkg/Li= brary/BaseCacheLib/CacheLib.c index 927cee13d3..cd404f9463 100644 --- a/IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c +++ b/IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c @@ -52,8 +52,8 @@ IsDefaultType ( @param[in] BaseAddress Base address. @param[in] Size Size. - @retval Zero Alligned. - @retval Non-Zero Not alligned. + @retval Zero Aligned. + @retval Non-Zero Not aligned. **/ UINT32 @@ -217,7 +217,7 @@ Power2MaxMemory ( } // - // Compute inital power of 2 size to return + // Compute initial power of 2 size to return // Result =3D GetPowerOfTwo64(MemoryLength); @@ -247,8 +247,8 @@ Power2MaxMemory ( @param[in] BaseAddress Base address. @param[in] Size Size. - @retval Zero Alligned. - @retval Non-Zero Not alligned. + @retval Zero Aligned. + @retval Non-Zero Not aligned. **/ UINT32 diff --git a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c b/In= telFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c index 17688c7fcb..b34905365d 100644 --- a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c +++ b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c @@ -186,7 +186,7 @@ DebugBPrint ( } /** - Convert an UINT32 value into HEX string sepcified by Buffer. + Convert an UINT32 value into HEX string specified by Buffer. @param Value The HEX value to convert to string @param Buffer The pointer to the target buffer to be filled with HEX s= tring @@ -211,8 +211,8 @@ FillHex ( Print a message of the form "ASSERT (): \n" to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED= bit of - PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if - DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set= then + PcdDebugPropertyMask is set then CpuBreakpoint() is called. Otherwise, if + DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugPropertyMask is se= t then CpuDeadLoop() is called. If neither of these bits are set, then this fu= nction returns immediately after the message is printed to the debug output dev= ice. DebugAssert() must actively prevent recursion. If DebugAssert() is call= ed while @@ -265,8 +265,8 @@ DebugAssertInternal ( Print a message of the form "ASSERT (): \n" to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED= bit of - PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if - DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set= then + PcdDebugPropertyMask is set then CpuBreakpoint() is called. Otherwise, if + DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugPropertyMask is se= t then CpuDeadLoop() is called. If neither of these bits are set, then this fu= nction returns immediately after the message is printed to the debug output dev= ice. DebugAssert() must actively prevent recursion. If DebugAssert() is call= ed while @@ -322,10 +322,10 @@ DebugClearMemory ( Returns TRUE if ASSERT() macros are enabled. This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bi= t of - PcdDebugProperyMask is set. Otherwise FALSE is returned. + PcdDebugPropertyMask is set. Otherwise FALSE is returned. - @retval TRUE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebug= ProperyMask is set. - @retval FALSE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebug= ProperyMask is clear. + @retval TRUE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebug= PropertyMask is set. + @retval FALSE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebug= PropertyMask is clear. **/ BOOLEAN @@ -342,10 +342,10 @@ DebugAssertEnabled ( Returns TRUE if DEBUG() macros are enabled. This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit= of - PcdDebugProperyMask is set. Otherwise FALSE is returned. + PcdDebugPropertyMask is set. Otherwise FALSE is returned. - @retval TRUE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugP= roperyMask is set. - @retval FALSE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugP= roperyMask is clear. + @retval TRUE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugP= ropertyMask is set. + @retval FALSE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugP= ropertyMask is clear. **/ BOOLEAN @@ -361,10 +361,10 @@ DebugPrintEnabled ( Returns TRUE if DEBUG_CODE() macros are enabled. This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit = of - PcdDebugProperyMask is set. Otherwise FALSE is returned. + PcdDebugPropertyMask is set. Otherwise FALSE is returned. - @retval TRUE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugPr= operyMask is set. - @retval FALSE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugPr= operyMask is clear. + @retval TRUE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugPr= opertyMask is set. + @retval FALSE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugPr= opertyMask is clear. **/ BOOLEAN @@ -381,10 +381,10 @@ DebugCodeEnabled ( Returns TRUE if DEBUG_CLEAR_MEMORY() macro is enabled. This function returns TRUE if the DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bi= t of - PcdDebugProperyMask is set. Otherwise FALSE is returned. + PcdDebugPropertyMask is set. Otherwise FALSE is returned. - @retval TRUE The DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of PcdDebug= ProperyMask is set. - @retval FALSE The DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of PcdDebug= ProperyMask is clear. + @retval TRUE The DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of PcdDebug= PropertyMask is set. + @retval FALSE The DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of PcdDebug= PropertyMask is clear. **/ BOOLEAN diff --git a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/Ia32/Stack.nasm b/I= ntelFsp2Pkg/Library/BaseFspSwitchStackLib/Ia32/Stack.nasm index 45cc974788..aaa3fc0867 100644 --- a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/Ia32/Stack.nasm +++ b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/Ia32/Stack.nasm @@ -5,7 +5,7 @@ ; ; Abstract: ; -; Switch the stack from temporary memory to permenent memory. +; Switch the stack from temporary memory to permanent memory. ; ;-------------------------------------------------------------------------= ----- diff --git a/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/Ia32/Flat32.nasm= b/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/Ia32/Flat32.nasm index dc4af7c078..ff919681a8 100644 --- a/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/Ia32/Flat32.nasm +++ b/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/Ia32/Flat32.nasm @@ -54,7 +54,7 @@ ASM_PFX(SecPlatformInit): ; esp ; ; Description: -; Perform any essential early platform initilaisation +; Perform any essential early platform initialisation ; Setup a stack ; ;-------------------------------------------------------------------------= --- diff --git a/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNu= ll.c b/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c index 50cb3142d2..c445190d8e 100644 --- a/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c +++ b/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c @@ -10,7 +10,7 @@ #include /** - This function check the signture of UPD. + This function check the signature of UPD. @param[in] ApiIdx Internal index of the FSP API. @param[in] ApiParam Parameter of the FSP API. diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py b/IntelFsp2Pkg/Tools/GenCfgOpt= .py index c4e1e6239d..a42717caae 100644 --- a/IntelFsp2Pkg/Tools/GenCfgOpt.py +++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py @@ -535,7 +535,7 @@ EndList Offset =3D 0 else: if DscLine.startswith('!'): - print("ERROR: Unrecoginized di= rective for line '%s'" % DscLine) + print("ERROR: Unrecognized dir= ective for line '%s'" % DscLine) raise SystemExit if not Handle: continue diff --git a/IntelFsp2Pkg/Tools/PatchFv.py b/IntelFsp2Pkg/Tools/PatchFv.py index 2173984dea..edb30c816b 100644 --- a/IntelFsp2Pkg/Tools/PatchFv.py +++ b/IntelFsp2Pkg/Tools/PatchFv.py @@ -160,7 +160,7 @@ class Symbols: # def createDicts (self, fvDir, fvNames): # - # If the fvDir is not a dirctory, then raise an exception + # If the fvDir is not a directory, then raise an exception # if not os.path.isdir(fvDir): raise Exception ("'%s' is not a valid directory!" % FvDir) diff --git a/IntelFsp2Pkg/Tools/UserManuals/GenCfgOptUserManual.md b/IntelF= sp2Pkg/Tools/UserManuals/GenCfgOptUserManual.md index 938c18416d..0a0f592801 100644 --- a/IntelFsp2Pkg/Tools/UserManuals/GenCfgOptUserManual.md +++ b/IntelFsp2Pkg/Tools/UserManuals/GenCfgOptUserManual.md @@ -213,7 +213,7 @@ in the third. ```@Bsf NAME:{Variable 1} TYPE:{Combo}``` There is a special **None** type that puts the variable in the **StructDef= ** -region of the BSF, but doesn?t put it in any **Page** section. This makes = the +region of the BSF, but doesn't put it in any **Page** section. This makes = the variable visible to BCT, but not to the end user. ###HELP diff --git a/IntelFsp2Pkg/Tools/UserManuals/PatchFvUserManual.md b/IntelFsp= 2Pkg/Tools/UserManuals/PatchFvUserManual.md index becaf96b21..5f1031e729 100644 --- a/IntelFsp2Pkg/Tools/UserManuals/PatchFvUserManual.md +++ b/IntelFsp2Pkg/Tools/UserManuals/PatchFvUserManual.md @@ -30,7 +30,7 @@ FSP tree. The example used contains Windows batch script %VARIABLES%. -#FvFileBaseNames (Argument 2: 0ptional Part 1) +#FvFileBaseNames (Argument 2: Optional Part 1) The firmware volume file base names (**_FvFileBaseNames_**) are the indepe= ndent Fv?s that are to be patched within the FD. (0 or more in the form **FVFILEBASENAME:**) The colon **:** is used for delimiting the single -- 2.20.1 (Apple Git-117) -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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