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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,coeur@gmx.fr Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1562333547; bh=XUP89BYgG63bbx9U7SHsRJrp04onLvLKr9xY9a/0ewY=; h=Cc:Date:From:Reply-To:Subject:To; b=oF6zBnRilHmtAkMy6yDp+aO79GaRBx/rKWbliUtLM5tRc4NI5H0b5nnmvmTbiMLtnqQ V9EczViu7a8WM2IRtJBbbcueNBkIvACQ6xgwvJlhSxr31qjnN8dyr94mnnWhDACKiOWJK FRB+MT+OEmJRKNINmKRYbpwQwCYya8n1qXg= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Fix various typos in PcAtChipsetPkg. --- PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c | 4 ++-- PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf | 2 +- PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.uni | 2 +- PcAtChipsetPkg/Include/Library/IoApicLib.h | 2 +- PcAtChipsetPkg/Library/AcpiTimerLib/AcpiTimerLib.c | 2 +- PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c | 2 +- PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c | 14 +++++++------- PcAtChipsetPkg/PcAtChipsetPkg.dec | 2 +- PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h | 2 +- 9 files changed, 16 insertions(+), 16 deletions(-) diff --git a/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c b/PcAtChipsetPkg/HpetT= imerDxe/HpetTimer.c index ded3b53619..1a1ed29e9c 100644 --- a/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c +++ b/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c @@ -1,5 +1,5 @@ /** @file - Timer Architectural Protocol module using High Precesion Event Timer (HP= ET) + Timer Architectural Protocol module using High Precision Event Timer (HP= ET) Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -246,7 +246,7 @@ HpetRead ( /** Write a 64-bit HPET register. - @param Offset Specifies the ofsfert of the HPET register to write. + @param Offset Specifies the offset of the HPET register to write. @param Value Specifies the value to write to the HPET register specif= ied by Offset. @return The 64-bit value written to HPET register specified by Offset. diff --git a/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf b/PcAtChipsetPkg/= HpetTimerDxe/HpetTimerDxe.inf index ba2e075118..125eea0aab 100644 --- a/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf +++ b/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf @@ -1,5 +1,5 @@ ## @file -# Timer Architectural Protocol module using High Precesion Event Timer (HP= ET). +# Timer Architectural Protocol module using High Precision Event Timer (HP= ET). # # Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent diff --git a/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.uni b/PcAtChipsetPkg/= HpetTimerDxe/HpetTimerDxe.uni index e2320653b6..7d1797b1df 100644 --- a/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.uni +++ b/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.uni @@ -1,5 +1,5 @@ // /** @file -// Timer Architectural Protocol module using High Precesion Event Timer (H= PET). +// Timer Architectural Protocol module using High Precision Event Timer (H= PET). // // Timer Architectural Protocol module using High Precision Event Timer (H= PET). // diff --git a/PcAtChipsetPkg/Include/Library/IoApicLib.h b/PcAtChipsetPkg/In= clude/Library/IoApicLib.h index 200ef731fb..4ee092c0f2 100644 --- a/PcAtChipsetPkg/Include/Library/IoApicLib.h +++ b/PcAtChipsetPkg/Include/Library/IoApicLib.h @@ -63,7 +63,7 @@ IoApicEnableInterrupt ( Configures an I/O APIC interrupt. Configure an I/O APIC Redirection Table Entry to deliver an interrupt in= physical - mode to the Local APIC of the currntly executing CPU. The default state= of the + mode to the Local APIC of the currently executing CPU. The default stat= e of the entry is for the interrupt to be disabled (masked). IoApicEnableInterru= pts() must be used to enable(unmask) the I/O APIC Interrupt. diff --git a/PcAtChipsetPkg/Library/AcpiTimerLib/AcpiTimerLib.c b/PcAtChips= etPkg/Library/AcpiTimerLib/AcpiTimerLib.c index 7dc11014a5..0a49093dbf 100644 --- a/PcAtChipsetPkg/Library/AcpiTimerLib/AcpiTimerLib.c +++ b/PcAtChipsetPkg/Library/AcpiTimerLib/AcpiTimerLib.c @@ -59,7 +59,7 @@ AcpiTimerLibConstructor ( // // If the register offset to the BAR for the ACPI I/O Port Base Address = is 0x0000, then - // no PCI register programming is required to enable access to the the A= CPI registers + // no PCI register programming is required to enable access to the ACPI = registers // specified by PcdAcpiIoPortBaseAddress // if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) =3D=3D 0x0000) { diff --git a/PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c b/PcAtChipset= Pkg/Library/BaseIoApicLib/IoApicLib.c index 7a3c9aca8d..9e4a58049e 100644 --- a/PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c +++ b/PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c @@ -94,7 +94,7 @@ IoApicEnableInterrupt ( Configures an I/O APIC interrupt. Configure an I/O APIC Redirection Table Entry to deliver an interrupt in= physical - mode to the Local APIC of the currntly executing CPU. The default state= of the + mode to the Local APIC of the currently executing CPU. The default stat= e of the entry is for the interrupt to be disabled (masked). IoApicEnableInterru= pts() must be used to enable(unmask) the I/O APIC Interrupt. diff --git a/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c b/PcAtChips= etPkg/Library/SerialIoLib/SerialPortLib.c index 93affe151e..aa5657a7fd 100644 --- a/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c +++ b/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c @@ -58,7 +58,7 @@ UINT8 gBreakSet =3D 0; If the serial device could not be initialized, then return RETURN_DEVICE= _ERROR. @retval RETURN_SUCCESS The serial device was initialized. - @retval RETURN_DEVICE_ERROR The serail device could not be initialized. + @retval RETURN_DEVICE_ERROR The serial device could not be initialized. **/ RETURN_STATUS @@ -139,7 +139,7 @@ SerialPortWrite ( while ((NumberOfBytes--) !=3D 0) { // - // Wait for the serail port to be ready. + // Wait for the serial port to be ready. // do { Data =3D IoRead8 ((UINT16) gUartBase + LSR_OFFSET); @@ -180,7 +180,7 @@ SerialPortRead ( while ((NumberOfBytes--) !=3D 0) { // - // Wait for the serail port to be ready. + // Wait for the serial port to be ready. // do { Data =3D IoRead8 ((UINT16) gUartBase + LSR_OFFSET); @@ -195,7 +195,7 @@ SerialPortRead ( /** Polls a serial device to see if there is any data waiting to be read. - Polls aserial device to see if there is any data waiting to be read. + Polls a serial device to see if there is any data waiting to be read. If there is data waiting to be read from the serial device, then TRUE is= returned. If there is no data waiting to be read from the serial device, then FALS= E is returned. @@ -339,13 +339,13 @@ SerialPortGetControl ( } /** - Sets the baud rate, receive FIFO depth, transmit/receice time out, parit= y, + Sets the baud rate, receive FIFO depth, transmit/receive time out, parit= y, data bits, and stop bits on a serial device. @param BaudRate The requested baud rate. A BaudRate value of 0= will use the device's default interface speed. On output, the value actually set. - @param ReveiveFifoDepth The requested depth of the FIFO on the receive= side of the + @param ReceiveFifoDepth The requested depth of the FIFO on the receive= side of the serial interface. A ReceiveFifoDepth value of = 0 will use the device's default FIFO depth. On output, the value actually set. @@ -358,7 +358,7 @@ SerialPortGetControl ( DefaultParity will use the device's default pa= rity value. On output, the value actually set. @param DataBits The number of data bits to use on the serial d= evice. A DataBits - vaule of 0 will use the device's default data = bit setting. + value of 0 will use the device's default data = bit setting. On output, the value actually set. @param StopBits The number of stop bits to use on this serial = device. A StopBits value of DefaultStopBits will use the device's= default number of diff --git a/PcAtChipsetPkg/PcAtChipsetPkg.dec b/PcAtChipsetPkg/PcAtChipset= Pkg.dec index d99d91496b..130c8e3723 100644 --- a/PcAtChipsetPkg/PcAtChipsetPkg.dec +++ b/PcAtChipsetPkg/PcAtChipsetPkg.dec @@ -50,7 +50,7 @@ # @Prompt HPET local APIC vector. gPcAtChipsetPkgTokenSpaceGuid.PcdHpetLocalApicVector|0x40|UINT8|0x000000= 0A - ## This PCD specifies the defaut period of the HPET Timer in 100 ns unit= s. + ## This PCD specifies the default period of the HPET Timer in 100 ns uni= ts. # The default value of 100000 100 ns units is the same as 10 ms. # @Prompt Default period of HPET timer. gPcAtChipsetPkgTokenSpaceGuid.PcdHpetDefaultTimerPeriod|100000|UINT64|0x= 0000000B diff --git a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h b/PcAtChips= etPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h index 038482d04d..3c78c37d54 100644 --- a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h +++ b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h @@ -110,7 +110,7 @@ typedef struct { UINT8 Uf : 1; // Update End Interrupt Flag UINT8 Af : 1; // Alarm Interrupt Flag UINT8 Pf : 1; // Periodic Interrupt Flag - UINT8 Irqf : 1; // Iterrupt Request Flag =3D PF & PIE | AF & AIE | U= F & UIE + UINT8 Irqf : 1; // Interrupt Request Flag =3D PF & PIE | AF & AIE | = UF & UIE } RTC_REGISTER_C_BITS; typedef union { -- 2.20.1 (Apple Git-117) -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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