From nobody Mon Feb 9 05:41:51 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+43199+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+43199+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1562136887; cv=none; d=zoho.com; s=zohoarc; b=NA6Zqqa0HPbas83pLsVv2wAOesCcQHD9Fd96RudVxTIpU4MOYSvYvtcayMVmLMf1YjqABlZ/QtpolJxPWvxgyRgxCNOKYDuR76gQ4F7kTXsyKIv1tXUG2Etip8/9YjZeSRZhL7bKffE0V6EUfd/deOcWgKJwhilrawcFSC4xnEU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1562136887; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=uvzHqoDzl2ccayun3M7OW17gMMq8D+D+djqEEmaD3y0=; b=V7J4yZQ2g/bF5z5sQgFbzcDeY3lFxR9UjyQ6sH0F9QSf/3BMmxiGJzRMiuy+9RJDAEc/a6wwywLRVSichCzuuymJhoQqHA27CPhMc6KgqD98R+gcc1C6j1XumeL47tDYpsjuBG4qHvo9b5UVjM1brxk8cXgPl5ZEU2XZ7gV0I4s= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+43199+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 15621368870625.982453967995866; Tue, 2 Jul 2019 23:54:47 -0700 (PDT) Return-Path: X-Received: from mga02.intel.com (mga02.intel.com []) by groups.io with SMTP; Tue, 02 Jul 2019 23:54:46 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 02 Jul 2019 23:54:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,446,1557212400"; d="scan'208";a="247523166" X-Received: from ray-dev.ccr.corp.intel.com ([10.239.9.16]) by orsmga001.jf.intel.com with ESMTP; 02 Jul 2019 23:54:45 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong , Laszlo Ersek Subject: [edk2-devel] [PATCH v2 1/3] UefiCpuPkg/PiSmmCpu: Change variable names and comments to follow SDM Date: Wed, 3 Jul 2019 14:54:14 +0800 Message-Id: <20190703065416.116816-2-ray.ni@intel.com> In-Reply-To: <20190703065416.116816-1-ray.ni@intel.com> References: <20190703065416.116816-1-ray.ni@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1562136886; bh=o1a9xUv7SGsS/J6108rRfXL+6wf1kL10Z3uB/EwkWG0=; h=Cc:Date:From:Reply-To:Subject:To; b=XJODcAUnUmkGmC9wi/uuBXmeZvclRw6oe2uaOaUfMfNH9HoaJxBPOau+0SVOtAQfYGx NDa+xl3tuqfgrbx8X50D9V1TGV8xS0cHdTpW8MlUPsZAwGDeeWfgw4pA1YXn1UA2vGp3t 37Rwddu54ElOeBo3rwsPNwQUoMHnkglWwog= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Per SDM, for IA-32e 4-KByte paging, there are four layers in the page table structure: 1. PML4 2. Page-Directory-Pointer Table (PDPT) 3. Page-Directory (PD) 4. Page Table (PT) The patch changes the local variable names and comments to use "PML4", "PDPT", "PD", "PT" to better align to terms used in SDM. There is no functionality impact for this change. Signed-off-by: Ray Ni Cc: Eric Dong Regression-tested-by: Laszlo Ersek Reviewed-by: Eric Dong --- UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 114 ++++++++++++------------- 1 file changed, 57 insertions(+), 57 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c b/UefiCpuPkg/PiSmmCpuDx= eSmm/SmmProfile.c index 3b2f967355..e2b6a2d9b2 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c @@ -535,15 +535,15 @@ InitPaging ( ) { UINT64 *Pml4; - UINT64 *Pde; - UINT64 *Pte; + UINT64 *Pdpt; + UINT64 *Pd; UINT64 *Pt; UINTN Address; - UINTN Level1; - UINTN Level2; - UINTN Level3; - UINTN Level4; - UINTN NumberOfPdpEntries; + UINTN Pml4Index; + UINTN PdptIndex; + UINTN PdIndex; + UINTN PtIndex; + UINTN NumberOfPdptEntries; UINTN NumberOfPml4Entries; UINTN SizeOfMemorySpace; BOOLEAN Nx; @@ -556,143 +556,143 @@ InitPaging ( // if (SizeOfMemorySpace <=3D 39 ) { NumberOfPml4Entries =3D 1; - NumberOfPdpEntries =3D (UINT32)LShiftU64 (1, (SizeOfMemorySpace - 30= )); + NumberOfPdptEntries =3D (UINT32)LShiftU64 (1, (SizeOfMemorySpace - 3= 0)); } else { NumberOfPml4Entries =3D (UINT32)LShiftU64 (1, (SizeOfMemorySpace - 3= 9)); - NumberOfPdpEntries =3D 512; + NumberOfPdptEntries =3D 512; } } else { NumberOfPml4Entries =3D 1; - NumberOfPdpEntries =3D 4; + NumberOfPdptEntries =3D 4; } =20 // // Go through page table and change 2MB-page into 4KB-page. // - for (Level1 =3D 0; Level1 < NumberOfPml4Entries; Level1++) { + for (Pml4Index =3D 0; Pml4Index < NumberOfPml4Entries; Pml4Index++) { if (sizeof (UINTN) =3D=3D sizeof (UINT64)) { - if ((Pml4[Level1] & IA32_PG_P) =3D=3D 0) { + if ((Pml4[Pml4Index] & IA32_PG_P) =3D=3D 0) { // - // If Pml4 entry does not exist, skip it + // If PML4 entry does not exist, skip it // continue; } - Pde =3D (UINT64 *)(UINTN)(Pml4[Level1] & ~mAddressEncMask & PHYSICAL= _ADDRESS_MASK); + Pdpt =3D (UINT64 *)(UINTN)(Pml4[Pml4Index] & ~mAddressEncMask & PHYS= ICAL_ADDRESS_MASK); } else { - Pde =3D (UINT64*)(UINTN)mSmmProfileCr3; + Pdpt =3D (UINT64*)(UINTN)mSmmProfileCr3; } - for (Level2 =3D 0; Level2 < NumberOfPdpEntries; Level2++, Pde++) { - if ((*Pde & IA32_PG_P) =3D=3D 0) { + for (PdptIndex =3D 0; PdptIndex < NumberOfPdptEntries; PdptIndex++, Pd= pt++) { + if ((*Pdpt & IA32_PG_P) =3D=3D 0) { // - // If PDE entry does not exist, skip it + // If PDPT entry does not exist, skip it // continue; } - if ((*Pde & IA32_PG_PS) !=3D 0) { + if ((*Pdpt & IA32_PG_PS) !=3D 0) { // // This is 1G entry, skip it // continue; } - Pte =3D (UINT64 *)(UINTN)(*Pde & ~mAddressEncMask & PHYSICAL_ADDRESS= _MASK); - if (Pte =3D=3D 0) { + Pd =3D (UINT64 *)(UINTN)(*Pdpt & ~mAddressEncMask & PHYSICAL_ADDRESS= _MASK); + if (Pd =3D=3D 0) { continue; } - for (Level3 =3D 0; Level3 < SIZE_4KB / sizeof (*Pte); Level3++, Pte+= +) { - if ((*Pte & IA32_PG_P) =3D=3D 0) { + for (PdIndex =3D 0; PdIndex < SIZE_4KB / sizeof (*Pd); PdIndex++, Pd= ++) { + if ((*Pd & IA32_PG_P) =3D=3D 0) { // - // If PTE entry does not exist, skip it + // If PD entry does not exist, skip it // continue; } - Address =3D (((Level2 << 9) + Level3) << 21); + Address =3D (((PdptIndex << 9) + PdIndex) << 21); =20 // // If it is 2M page, check IsAddressSplit() // - if (((*Pte & IA32_PG_PS) !=3D 0) && IsAddressSplit (Address)) { + if (((*Pd & IA32_PG_PS) !=3D 0) && IsAddressSplit (Address)) { // // Based on current page table, create 4KB page table for split = area. // - ASSERT (Address =3D=3D (*Pte & PHYSICAL_ADDRESS_MASK)); + ASSERT (Address =3D=3D (*Pd & PHYSICAL_ADDRESS_MASK)); =20 Pt =3D AllocatePageTableMemory (1); ASSERT (Pt !=3D NULL); =20 // Split it - for (Level4 =3D 0; Level4 < SIZE_4KB / sizeof(*Pt); Level4++) { - Pt[Level4] =3D Address + ((Level4 << 12) | mAddressEncMask | P= AGE_ATTRIBUTE_BITS); + for (PtIndex =3D 0; PtIndex < SIZE_4KB / sizeof(*Pt); PtIndex++)= { + Pt[PtIndex] =3D Address + ((PtIndex << 12) | mAddressEncMask |= PAGE_ATTRIBUTE_BITS); } // end for PT - *Pte =3D (UINT64)(UINTN)Pt | mAddressEncMask | PAGE_ATTRIBUTE_BI= TS; + *Pd =3D (UINT64)(UINTN)Pt | mAddressEncMask | PAGE_ATTRIBUTE_BIT= S; } // end if IsAddressSplit - } // end for PTE - } // end for PDE - } + } // end for PD + } // end for PDPT + } // end for PML4 =20 // // Go through page table and set several page table entries to absent or= execute-disable. // DEBUG ((EFI_D_INFO, "Patch page table start ...\n")); - for (Level1 =3D 0; Level1 < NumberOfPml4Entries; Level1++) { + for (Pml4Index =3D 0; Pml4Index < NumberOfPml4Entries; Pml4Index++) { if (sizeof (UINTN) =3D=3D sizeof (UINT64)) { - if ((Pml4[Level1] & IA32_PG_P) =3D=3D 0) { + if ((Pml4[Pml4Index] & IA32_PG_P) =3D=3D 0) { // - // If Pml4 entry does not exist, skip it + // If PML4 entry does not exist, skip it // continue; } - Pde =3D (UINT64 *)(UINTN)(Pml4[Level1] & ~mAddressEncMask & PHYSICAL= _ADDRESS_MASK); + Pdpt =3D (UINT64 *)(UINTN)(Pml4[Pml4Index] & ~mAddressEncMask & PHYS= ICAL_ADDRESS_MASK); } else { - Pde =3D (UINT64*)(UINTN)mSmmProfileCr3; + Pdpt =3D (UINT64*)(UINTN)mSmmProfileCr3; } - for (Level2 =3D 0; Level2 < NumberOfPdpEntries; Level2++, Pde++) { - if ((*Pde & IA32_PG_P) =3D=3D 0) { + for (PdptIndex =3D 0; PdptIndex < NumberOfPdptEntries; PdptIndex++, Pd= pt++) { + if ((*Pdpt & IA32_PG_P) =3D=3D 0) { // - // If PDE entry does not exist, skip it + // If PDPT entry does not exist, skip it // continue; } - if ((*Pde & IA32_PG_PS) !=3D 0) { + if ((*Pdpt & IA32_PG_PS) !=3D 0) { // // This is 1G entry, set NX bit and skip it // if (mXdSupported) { - *Pde =3D *Pde | IA32_PG_NX; + *Pdpt =3D *Pdpt | IA32_PG_NX; } continue; } - Pte =3D (UINT64 *)(UINTN)(*Pde & ~mAddressEncMask & PHYSICAL_ADDRESS= _MASK); - if (Pte =3D=3D 0) { + Pd =3D (UINT64 *)(UINTN)(*Pdpt & ~mAddressEncMask & PHYSICAL_ADDRESS= _MASK); + if (Pd =3D=3D 0) { continue; } - for (Level3 =3D 0; Level3 < SIZE_4KB / sizeof (*Pte); Level3++, Pte+= +) { - if ((*Pte & IA32_PG_P) =3D=3D 0) { + for (PdIndex =3D 0; PdIndex < SIZE_4KB / sizeof (*Pd); PdIndex++, Pd= ++) { + if ((*Pd & IA32_PG_P) =3D=3D 0) { // - // If PTE entry does not exist, skip it + // If PD entry does not exist, skip it // continue; } - Address =3D (((Level2 << 9) + Level3) << 21); + Address =3D (((PdptIndex << 9) + PdIndex) << 21); =20 - if ((*Pte & IA32_PG_PS) !=3D 0) { + if ((*Pd & IA32_PG_PS) !=3D 0) { // 2MB page =20 if (!IsAddressValid (Address, &Nx)) { // // Patch to remove Present flag and RW flag // - *Pte =3D *Pte & (INTN)(INT32)(~PAGE_ATTRIBUTE_BITS); + *Pd =3D *Pd & (INTN)(INT32)(~PAGE_ATTRIBUTE_BITS); } if (Nx && mXdSupported) { - *Pte =3D *Pte | IA32_PG_NX; + *Pd =3D *Pd | IA32_PG_NX; } } else { // 4KB page - Pt =3D (UINT64 *)(UINTN)(*Pte & ~mAddressEncMask & PHYSICAL_ADDR= ESS_MASK); + Pt =3D (UINT64 *)(UINTN)(*Pd & ~mAddressEncMask & PHYSICAL_ADDRE= SS_MASK); if (Pt =3D=3D 0) { continue; } - for (Level4 =3D 0; Level4 < SIZE_4KB / sizeof(*Pt); Level4++, Pt= ++) { + for (PtIndex =3D 0; PtIndex < SIZE_4KB / sizeof(*Pt); PtIndex++,= Pt++) { if (!IsAddressValid (Address, &Nx)) { *Pt =3D *Pt & (INTN)(INT32)(~PAGE_ATTRIBUTE_BITS); } @@ -702,9 +702,9 @@ InitPaging ( Address +=3D SIZE_4KB; } // end for PT } // end if PS - } // end for PTE - } // end for PDE - } + } // end for PD + } // end for PDPT + } // end for PML4 =20 // // Flush TLB --=20 2.21.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#43199): https://edk2.groups.io/g/devel/message/43199 Mute This Topic: https://groups.io/mt/32295047/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-