From nobody Mon Feb 9 07:42:27 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+41307+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+41307+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1558674291; cv=none; d=zoho.com; s=zohoarc; b=n4aPa8KR8t5u/5A8XCV+etyV+V3hC7RiYzTHjKUussZroNi/e5RwKZ6tuJF0BbKeivLnSrxpbE0ZKd9bf5oNTK1a/G1TPgIWWFAp125dJKI1PXmHaqlYzj6bgkorJgG4L8Vw/pWSSoOpOOoOcQi6HQrJDCjByL316a4atww6EGk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1558674291; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=V1M943qU0sgSnEqxiQy8WRNB6NAztPAkcKeqypqOcFQ=; b=BSwAak/lS0A8/F52WJ1ec3CPFnFQ0aDW8Tlj98f0nrZEv0VS/ALOpKxXAyF8DBvrB6IS/UC4FYuAW7uQuOZwq+0gqHkOe0NbYMhS8/bzGK90uKzHTaUS/WpPyLifyWvz4d5QB5Bon9oDd1QjLnVb7D6OcsPTdiq6n2RPTUqrkEs= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+41307+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1558674291698929.6540976403636; Thu, 23 May 2019 22:04:51 -0700 (PDT) Return-Path: X-Received: from mga03.intel.com (mga03.intel.com []) by groups.io with SMTP; Thu, 23 May 2019 22:04:51 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 May 2019 22:04:50 -0700 X-ExtLoop1: 1 X-Received: from fieedk001.ccr.corp.intel.com ([10.239.33.119]) by fmsmga001.fm.intel.com with ESMTP; 23 May 2019 22:04:48 -0700 From: "Gao, Zhichao" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Laszlo Ersek , Liming Gao , Sean Brogan , Michael Turner , Bret Barkelew Subject: [edk2-devel] [PATCH 5/6] UefiCpuPkg/CpuDxe: Implement Cpu2 protocol Date: Fri, 24 May 2019 13:04:36 +0800 Message-Id: <20190524050437.38616-6-zhichao.gao@intel.com> In-Reply-To: <20190524050437.38616-1-zhichao.gao@intel.com> References: <20190524050437.38616-1-zhichao.gao@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,zhichao.gao@intel.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1558674291; bh=ORYlEGcPWyx9yNirKApek275aVKaJPz1VIseSVWWCLs=; h=Cc:Date:From:Reply-To:Subject:To; b=nKm106xwyKu9RYSj067Xw4En19RRlmSCpaBrdpkFZztNAY5LmfOzC5Nj94JghPo0mf+ vMq56tUvxxdCuAH4aJ5uQO68Xf64nZJKxTlbI5VV45OTFULCACXKVZVZww6ukBcMXXhny UG4FTJk+wf3AsXXf3nQGzuj3B6e3bl+DX1w= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1400 Implement Cp2 protocol: it has one interface to enable the interrupt and put cpu to sleep and wait for an interrupt. Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Cc: Liming Gao Cc: Sean Brogan Cc: Michael Turner Cc: Bret Barkelew Signed-off-by: Zhichao Gao --- UefiCpuPkg/CpuDxe/CpuDxe.c | 40 +++++++++++++++++++++++++++++++++++- UefiCpuPkg/CpuDxe/CpuDxe.h | 15 ++++++++++++++ UefiCpuPkg/CpuDxe/CpuDxe.inf | 3 ++- 3 files changed, 56 insertions(+), 2 deletions(-) diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c index 7d7270e10b..0d0cdf6f86 100644 --- a/UefiCpuPkg/CpuDxe/CpuDxe.c +++ b/UefiCpuPkg/CpuDxe/CpuDxe.c @@ -1,7 +1,7 @@ /** @file CPU DXE Module to produce CPU ARCH Protocol. =20 - Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -18,6 +18,7 @@ // BOOLEAN InterruptState =3D FALSE; EFI_HANDLE mCpuHandle =3D NULL; +EFI_HANDLE mCpu2Handle =3D NULL; BOOLEAN mIsFlushingGCD; BOOLEAN mIsAllocatingPageTable =3D FALSE; UINT64 mValidMtrrAddressMask; @@ -96,6 +97,10 @@ EFI_CPU_ARCH_PROTOCOL gCpu =3D { 4 // DmaBufferAlignment }; =20 +EFI_CPU2_PROTOCOL gCpu2 =3D { + CpuEnableAndWaitForInterrupt +}; + // // CPU Arch Protocol Functions // @@ -499,6 +504,28 @@ CpuSetMemoryAttributes ( return AssignMemoryPageAttributes (NULL, BaseAddress, Length, MemoryAttr= ibutes, NULL); } =20 +// +// CPU2 Protocol Functions +// +/** + This function enables CPU interrupts and then waits for an interrupt to = arrive. + + @param This The EFI_CPU2_PROTOCOL instance. + + @retval EFI_SUCCESS Interrupts are enabled on the processor. + @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the pro= cessor. + +**/ +EFI_STATUS +CpuEnableAndWaitForInterrupt ( + IN EFI_CPU2_PROTOCOL *This + ) +{ + EnableInterruptsAndSleep (); + + return EFI_SUCCESS; +} + /** Initializes the valid bits mask and valid address mask for MTRRs. =20 @@ -1211,6 +1238,17 @@ InitializeCpu ( ); ASSERT_EFI_ERROR (Status); =20 + // + // Install CPU2 Protocol + // + Status =3D gBS->InstallMultipleProtocolInterfaces ( + &mCpu2Handle, + &gEfiCpu2ProtocolGuid, + &gCpu2, + NULL + ); + ASSERT_EFI_ERROR (Status); + InitializeMpSupport (); =20 return Status; diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.h b/UefiCpuPkg/CpuDxe/CpuDxe.h index b029be430b..8698ff78eb 100644 --- a/UefiCpuPkg/CpuDxe/CpuDxe.h +++ b/UefiCpuPkg/CpuDxe/CpuDxe.h @@ -12,6 +12,7 @@ #include =20 #include +#include #include #include =20 @@ -305,6 +306,20 @@ PageFaultExceptionHandler ( IN EFI_SYSTEM_CONTEXT SystemContext ); =20 +/** + This function enables CPU interrupts and then waits for an interrupt to = arrive. + + @param This The EFI_CPU2_PROTOCOL instance. + + @retval EFI_SUCCESS Interrupts are enabled on the processor. + @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the pro= cessor. + +**/ +EFI_STATUS +CpuEnableAndWaitForInterrupt ( + IN EFI_CPU2_PROTOCOL *This + ); + extern BOOLEAN mIsAllocatingPageTable; extern UINTN mNumberOfProcessors; =20 diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf index 57381dbc85..d4ff562d89 100644 --- a/UefiCpuPkg/CpuDxe/CpuDxe.inf +++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf @@ -1,7 +1,7 @@ ## @file # CPU driver installs CPU Architecture Protocol and CPU MP protocol. # -# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.
# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent @@ -62,6 +62,7 @@ gEfiCpuArchProtocolGuid ## PRODUCES gEfiMpServiceProtocolGuid ## PRODUCES gEfiSmmBase2ProtocolGuid ## SOMETIMES_CONSUMES + gEfiCpu2ProtocolGuid ## PRODUCES =20 [Guids] gIdleLoopEventGuid ## CONSUMES ## E= vent --=20 2.21.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#41307): https://edk2.groups.io/g/devel/message/41307 Mute This Topic: https://groups.io/mt/31741732/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-