From nobody Sun Apr 28 14:39:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+40513+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+40513+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1557758784; cv=none; d=zoho.com; s=zohoarc; b=G64ZzcTdDikMtU+feW1gE0VbtSlG9vKu/pIVZYDt1TPCmxN3h89BipLFtcFUJm1mPQZ7wV/88pBAarjBzoWNhvIW4cwDW9hGoPneXVq9+cw06tAdhGwnuTznGU5qISDfuUvqHaFCu5NOiw7qMGbye7skeF+U5jClu4g5xhGNTFA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557758784; h=Cc:Date:From:List-Id:List-Unsubscribe:Message-ID:Reply-To:Sender:Subject:To:ARC-Authentication-Results; bh=Wryz/gNc2io1iJhF2TNNGIIyC1HQwYP6G1Jaa2DlSDQ=; b=RDUH8xNiIt2BNqAd7PhKqsrwGjK+niovu9OW+dYO6AEc//IKjN5stlm5QOWr3pn7ldQimhjNxyELBFhAB8/Pd9lC0/BzUXzWAj0nisJgf/sa8xpF2inhJkMXMhQqIAdf7B8CDLaxjZiz+r+CIUwPoSplGmxRefotnF8UEZuOLq0= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+40513+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 15577587840661014.3140128017911; Mon, 13 May 2019 07:46:24 -0700 (PDT) Return-Path: X-Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by groups.io with SMTP; Sun, 12 May 2019 23:18:19 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 May 2019 23:18:19 -0700 X-ExtLoop1: 1 X-Received: from chenmarc-mobl.gar.corp.intel.com ([10.5.245.93]) by orsmga001.jf.intel.com with ESMTP; 12 May 2019 23:18:17 -0700 From: "Marc W Chen" To: devel@edk2.groups.io Cc: Marc Chen , Michael Kubacki , Sai Chaganty Subject: [edk2-devel] [PATCH] MinPlatformPkg: Add multiple segment support for PciHostBridgeLib Date: Mon, 13 May 2019 14:18:14 +0800 Message-Id: <20190513061814.27396-1-marc.w.chen@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,marc.w.chen@intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1557758783; bh=/2U1NwkaaZ//4Sp2enG3iUobAYsaOyLFJA0UZgn0gCk=; h=Cc:Date:From:Reply-To:Subject:To; b=CGes3QS1IclQflYEpjBbpeVppRFCr7RUp2idbftY35x+VQBJ4CpIF0rzpSwUbj4ymNR S8KJBTnV2qB9SW/5o9tYNRLZxK0ojAVzjNeKpUXSYfRqHxcMjH2kK+tAh/RRoH3bBhp2c WPspPL/LsoqbHszTD6DZK4dwbVRnipax/jc= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" https://bugzilla.tianocore.org/show_bug.cgi?id=3D1799 Add PcdPciSegmentCount PCD in MinPlatformPkg.dec and set default to 1, then= base on PciHostBridge related PCDs to Initialize RootBridges. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marc Chen Cc: Michael Kubacki Cc: Sai Chaganty --- Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 1 + .../PciHostBridgeLibSimple.c | 63 ++++++++++++++----= ---- .../PciHostBridgeLibSimple.inf | 2 +- 3 files changed, 43 insertions(+), 23 deletions(-) diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/In= tel/MinPlatformPkg/MinPlatformPkg.dec index 3185776ac3..09701bd004 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec @@ -223,6 +223,7 @@ gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UIN= T32|0x90000019 gMinPlatformPkgTokenSpaceGuid.PcdPciDmaAbove4G |FALSE|BOOL= EAN|0x4001004B gMinPlatformPkgTokenSpaceGuid.PcdPciNoExtendedConfigSpace |FALSE|BOOL= EAN|0x4001004C gMinPlatformPkgTokenSpaceGuid.PcdPciResourceAssigned |FALSE|BOOL= EAN|0x4001004D + gMinPlatformPkgTokenSpaceGuid.PcdPciSegmentCount |0x1 |UI= NT8|0x4001004E =20 gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT16= |0x00010035 gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT16= |0x00010036 diff --git a/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimp= le/PciHostBridgeLibSimple.c b/Platform/Intel/MinPlatformPkg/Pci/Library/Pci= HostBridgeLibSimple/PciHostBridgeLibSimple.c index 557ac2a5b3..78f4471c0a 100644 --- a/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciH= ostBridgeLibSimple.c +++ b/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciH= ostBridgeLibSimple.c @@ -15,6 +15,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER= EXPRESS OR IMPLIED. #include #include #include +#include #include #include #include @@ -28,7 +29,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER= EXPRESS OR IMPLIED. GLOBAL_REMOVE_IF_UNREFERENCED CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTyp= eStr[] =3D { L"Mem", L"I/O", L"Bus" }; -ACPI_HID_DEVICE_PATH mRootBridgeDeviceNode =3D { +ACPI_HID_DEVICE_PATH mRootBridgeDeviceNodeTemplate =3D { { ACPI_DEVICE_PATH, ACPI_DP, @@ -41,7 +42,7 @@ ACPI_HID_DEVICE_PATH mRootBridgeDeviceNode =3D { 0 }; =20 -PCI_ROOT_BRIDGE mRootBridge =3D { +PCI_ROOT_BRIDGE mRootBridgeTemplate =3D { 0, EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO | EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO | @@ -72,35 +73,53 @@ PciHostBridgeGetRootBridges ( UINTN *Count ) { - mRootBridge.Mem.Base =3D PcdGet32 (PcdPciReservedMemBase); + UINT8 Index; + PCI_ROOT_BRIDGE *RootBridge; + + Index =3D 0; + RootBridge =3D AllocateZeroPool (sizeof (PCI_ROOT_BRIDGE) * PcdGet8 (Pcd= PciSegmentCount)); + if (RootBridge =3D=3D NULL) { + DEBUG ((EFI_D_ERROR, "PciHostBridge: Out of resource\n")); + *Count =3D 0; + return RootBridge; + } + + mRootBridgeTemplate.Mem.Base =3D PcdGet32 (PcdPciReservedMemBase); if (PcdGet32(PcdPciReservedMemLimit) !=3D 0) { - mRootBridge.Mem.Limit =3D PcdGet32 (PcdPciReservedMemLimit); + mRootBridgeTemplate.Mem.Limit =3D PcdGet32 (PcdPciReservedMemLimit); } else { - mRootBridge.Mem.Limit =3D (UINT32)PcdGet64 (PcdPciExpressBaseAddress); + mRootBridgeTemplate.Mem.Limit =3D (UINT32) PcdGet64 (PcdPciExpressBase= Address); } =20 - mRootBridge.MemAbove4G.Base =3D PcdGet64 (PcdPciReservedMemAbove4GBBase); - mRootBridge.MemAbove4G.Limit =3D PcdGet64 (PcdPciReservedMemAbove4GBLimi= t); + mRootBridgeTemplate.MemAbove4G.Base =3D PcdGet64 (PcdPciReservedMemAbove= 4GBBase); + mRootBridgeTemplate.MemAbove4G.Limit =3D PcdGet64 (PcdPciReservedMemAbov= e4GBLimit); =20 - mRootBridge.PMem.Base =3D PcdGet32 (PcdPciReservedPMemBase); - mRootBridge.PMem.Limit =3D PcdGet32 (PcdPciReservedPMemLimit); - mRootBridge.PMemAbove4G.Base =3D PcdGet64 (PcdPciReservedPMemAbove4GBBas= e); - mRootBridge.PMemAbove4G.Limit =3D PcdGet64 (PcdPciReservedPMemAbove4GBLi= mit); + mRootBridgeTemplate.PMem.Base =3D PcdGet32 (PcdPciReservedPMemBase); + mRootBridgeTemplate.PMem.Limit =3D PcdGet32 (PcdPciReservedPMemLimit); + mRootBridgeTemplate.PMemAbove4G.Base =3D PcdGet64 (PcdPciReservedPMemAbo= ve4GBBase); + mRootBridgeTemplate.PMemAbove4G.Limit =3D PcdGet64 (PcdPciReservedPMemAb= ove4GBLimit); =20 - if (mRootBridge.MemAbove4G.Base < mRootBridge.MemAbove4G.Limit) { - mRootBridge.AllocationAttributes |=3D EFI_PCI_HOST_BRIDGE_MEM64_DECODE; + if (mRootBridgeTemplate.MemAbove4G.Base < mRootBridgeTemplate.MemAbove4G= .Limit) { + mRootBridgeTemplate.AllocationAttributes |=3D EFI_PCI_HOST_BRIDGE_MEM6= 4_DECODE; } =20 - mRootBridge.Io.Base =3D PcdGet16 (PcdPciReservedIobase); - mRootBridge.Io.Limit =3D PcdGet16 (PcdPciReservedIoLimit); + mRootBridgeTemplate.Io.Base =3D PcdGet16 (PcdPciReservedIobase); + mRootBridgeTemplate.Io.Limit =3D PcdGet16 (PcdPciReservedIoLimit); =20 - mRootBridge.DmaAbove4G =3D PcdGetBool (PcdPciDmaAbove4G); - mRootBridge.NoExtendedConfigSpace =3D PcdGetBool (PcdPciNoExtendedConfig= Space); - mRootBridge.ResourceAssigned =3D PcdGetBool (PcdPciResourceAssigned); + mRootBridgeTemplate.DmaAbove4G =3D PcdGetBool (PcdPciDmaAbove4G); + mRootBridgeTemplate.NoExtendedConfigSpace =3D PcdGetBool (PcdPciNoExtend= edConfigSpace); + mRootBridgeTemplate.ResourceAssigned =3D PcdGetBool (PcdPciResourceAssig= ned); + + for (Index =3D 0; Index < PcdGet8 (PcdPciSegmentCount); Index ++) { + mRootBridgeDeviceNodeTemplate.UID =3D Index; + mRootBridgeTemplate.Segment =3D Index; + mRootBridgeTemplate.DevicePath =3D NULL; + mRootBridgeTemplate.DevicePath =3D AppendDevicePathNode (NULL, &mRootB= ridgeDeviceNodeTemplate.Header); + CopyMem (RootBridge + Index, &mRootBridgeTemplate, sizeof (PCI_ROOT_BR= IDGE)); + } =20 - mRootBridge.DevicePath =3D AppendDevicePathNode (NULL, &mRootBridgeDevic= eNode.Header); - *Count =3D 1; - return &mRootBridge; + *Count =3D PcdGet8 (PcdPciSegmentCount); + return RootBridge; } =20 VOID @@ -110,7 +129,7 @@ PciHostBridgeFreeRootBridges ( UINTN Count ) { - ASSERT (Count =3D=3D 1); + ASSERT (Count <=3D PcdGet8 (PcdPciSegmentCount)); FreePool (Bridges->DevicePath); } =20 diff --git a/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimp= le/PciHostBridgeLibSimple.inf b/Platform/Intel/MinPlatformPkg/Pci/Library/P= ciHostBridgeLibSimple/PciHostBridgeLibSimple.inf index f9a769155b..e5c0ca2774 100644 --- a/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciH= ostBridgeLibSimple.inf +++ b/Platform/Intel/MinPlatformPkg/Pci/Library/PciHostBridgeLibSimple/PciH= ostBridgeLibSimple.inf @@ -56,4 +56,4 @@ gMinPlatformPkgTokenSpaceGuid.PcdPciDmaAbove4G gMinPlatformPkgTokenSpaceGuid.PcdPciNoExtendedConfigSpace gMinPlatformPkgTokenSpaceGuid.PcdPciResourceAssigned - + gMinPlatformPkgTokenSpaceGuid.PcdPciSegmentCount --=20 2.16.2.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#40513): https://edk2.groups.io/g/devel/message/40513 Mute This Topic: https://groups.io/mt/31607815/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-