From nobody Mon Feb 9 23:39:34 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+39551+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+39551+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1556195585; cv=none; d=zoho.com; s=zohoarc; b=l6SqkehonZmetTiTb8zIPGCeXRb1j0EUusdlJ4ptk0ry8vot5CzGrVg/4rzPCx39i5Qd3ycRmLixI17NTYST9YYAF5mN+ilrth1xpuONzBBYY8Pwod16JfxampjDe7waUtFx+P3Lhz40/ggzCIC5PpkLTQ3k0Q/QKyUxviBSG6Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1556195585; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=9B6FCF/hjiE7wz/CFSElE9vNJ+Ew9TxzMBkpAqsZoDM=; b=C2EOQSyNpU3Bt3wGIHGNwQlskbXdqxCt+71hFBtsAmQ24lZ6EoE2TNhmWJbZT3gIvzEkjWZF26rFnLoLmMvxsDGpNSllWqPcSBiGsZSL5osO7M2MfTOnG3P7Z9JKKSjBg3Q54wIDmySYBxPKLCfM6CDECXEwbIkIUdNnJt83O2Q= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+39551+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1556195585103117.37188436412009; Thu, 25 Apr 2019 05:33:05 -0700 (PDT) Return-Path: X-Received: from mail-wr1-f47.google.com (mail-wr1-f47.google.com [209.85.221.47]) by groups.io with SMTP; Thu, 25 Apr 2019 05:33:03 -0700 X-Received: by mail-wr1-f47.google.com with SMTP id a12so6834412wrq.10 for ; Thu, 25 Apr 2019 05:33:02 -0700 (PDT) X-Gm-Message-State: APjAAAX1oSmE+RsoRVBevBiKyot1wsb2ereYjeR0T0VuriHl2KE2u68c N8Y82SK0SR4tni4eykGmdXPVdwZver1K3A== X-Google-Smtp-Source: APXvYqw+fAF0VFMh1U9o5LUKangvmuNMMMNhqXBsWwp6IlWytV3dIxJ1QAbhaQBLN3lZQcy85JDAIQ== X-Received: by 2002:a05:6000:104:: with SMTP id o4mr5361405wrx.106.1556195581096; Thu, 25 Apr 2019 05:33:01 -0700 (PDT) X-Received: from sudo.home ([2a01:cb1d:112:6f00:95f:9014:5be9:5288]) by smtp.gmail.com with ESMTPSA id o6sm43753488wre.60.2019.04.25.05.32.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 25 Apr 2019 05:33:00 -0700 (PDT) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: leif.lindholm@linaro.org, graeme.gregory@linaro.org, masahisa.kojima@linaro.org, Ard Biesheuvel Subject: [edk2-devel] [PATCH edk2-platforms 3/3] Platform/Secure96Dxe: add ACPI description of the GPIO LEDs Date: Thu, 25 Apr 2019 14:32:54 +0200 Message-Id: <20190425123254.16396-4-ard.biesheuvel@linaro.org> In-Reply-To: <20190425123254.16396-1-ard.biesheuvel@linaro.org> References: <20190425123254.16396-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ard.biesheuvel@linaro.org Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1556195583; bh=3O47OsHTSt8PiwD+S2ki2t0FB0/RCm6E+uvOqQlYIC4=; h=Cc:Date:From:Reply-To:Subject:To; b=mZdp1eWdEXLNgzKQwjofK+YS3t6Y47IqYznYuWj7lQ9byg+9nQNiskP8itq2KUd+sSQ 5UaxyihOVZd1hF/YMmhkt80SYciQDKebkxwRaXxdtaGZ3umBdTeZQAVUytnpnAa4SYRbP ShY0em+a5uBvsnkmVHHu5Z9s3gXzP5FgBHo= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Wire up the new 96boards mezzanine SSDT loading support, and use it to describe the four GPIO LEDs on the Secure96 mezzanine board. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Platform/96Boards/Secure96Dxe/Secure96.asl | 103 ++++++++++++++++++++ Platform/96Boards/Secure96Dxe/Secure96Dxe.c | 59 ++++++++++- Platform/96Boards/Secure96Dxe/Secure96Dxe.inf | 1 + 3 files changed, 158 insertions(+), 5 deletions(-) diff --git a/Platform/96Boards/Secure96Dxe/Secure96.asl b/Platform/96Boards= /Secure96Dxe/Secure96.asl new file mode 100644 index 000000000000..bb9dac462a33 --- /dev/null +++ b/Platform/96Boards/Secure96Dxe/Secure96.asl @@ -0,0 +1,103 @@ +/** @file + * Copyright (c) 2019, Linaro Limited. All rights reserved. + * + * This program and the accompanying materials are licensed and made + * available under the terms and conditions of the BSD License which + * accompanies this distribution. The full text of the license may be + * found at http://opensource.org/licenses/bsd-license.php + * + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR + * IMPLIED. + */ + +#include "Secure96.h" + +DefinitionBlock ("Secure96.aml", "SSDT", 2, "LINARO", "SECURE96", 1) +{ + External (\_SB.LS96.GPIO) + + Scope (_SB) + { + Device (LD96) + { + Name (_HID, "PRP0001") // _HID: Hardware ID + Name (_UID, 0x00) // _UID: Unique ID + Name (_DSD, Package () { + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () { "compatible", "gpio-leds" }, + } + }) + + Method (_CRS) + { + Return (\_SB.LS96.GPIO) + } + + Device (LDU1) + { + Name (_ADR, 0x1) + Name (_DSD, Package () { + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () { "label", "secure96-u1" }, + Package () { "gpios", + Package () { + ^^LD96, 0, 6, FixedPcdGet32 (PcdGpioPolari= ty) + }, + }, + } + }) + } + + Device (LDU2) + { + Name (_ADR, 0x2) + Name (_DSD, Package () { + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () { "label", "secure96-u2" }, + Package () { "gpios", + Package () { + ^^LD96, 0, 5, FixedPcdGet32 (PcdGpioPolari= ty) + }, + }, + } + }) + } + + Device (LDU3) + { + Name (_ADR, 0x3) + Name (_DSD, Package () { + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () { "label", "secure96-u3" }, + Package () { "gpios", + Package () { + ^^LD96, 0, 8, FixedPcdGet32 (PcdGpioPolari= ty) + }, + }, + } + }) + } + + Device (LDU4) + { + Name (_ADR, 0x4) + Name (_DSD, Package () { + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () { "label", "secure96-u4" }, + Package () { "gpios", + Package () { + ^^LD96, 0, 7, FixedPcdGet32 (PcdGpioPolari= ty) + }, + }, + } + }) + } + } + } +} diff --git a/Platform/96Boards/Secure96Dxe/Secure96Dxe.c b/Platform/96Board= s/Secure96Dxe/Secure96Dxe.c index 6c48d7c0b024..68f8ec812b52 100644 --- a/Platform/96Boards/Secure96Dxe/Secure96Dxe.c +++ b/Platform/96Boards/Secure96Dxe/Secure96Dxe.c @@ -24,6 +24,8 @@ =20 #include "Secure96.h" =20 +#define SECURE96_SSDT_OEM_TABLE_ID SIGNATURE_64('S','E','C','U','R','E','9= ','6') + STATIC CONST UINT32 mI2cAtmelSha204aSlaveAddress[] =3D { ATSHA204A_SLAVE_ADDRESS, =20 @@ -148,15 +150,20 @@ ApplyDeviceTreeOverlay ( UINTN OverlaySize; EFI_STATUS Status; INT32 Err; + UINTN Index; =20 // // Load the raw overlay DTB image from the raw section of this FFS file. // - Status =3D GetSectionFromFv (&gEfiCallerIdGuid, - EFI_SECTION_RAW, 0, &Overlay, &OverlaySize); - ASSERT_EFI_ERROR (Status); - if (EFI_ERROR (Status)) { - return EFI_NOT_FOUND; + for (Index =3D 0;; Index++) { + Status =3D GetSectionFromFv (&gEfiCallerIdGuid, + EFI_SECTION_RAW, Index, &Overlay, &OverlaySize); + if (EFI_ERROR (Status)) { + return EFI_NOT_FOUND; + } + if (!fdt_check_header (Overlay)) { + break; + } } =20 // @@ -177,8 +184,50 @@ ApplyDeviceTreeOverlay ( return EFI_SUCCESS; } =20 +/** + Install the mezzanine's SSDT table + + @param[in] This Pointer to the MEZZANINE_PROTOCOL instance. + @param[in] Dtb Pointer to the device tree blob + + @return EFI_SUCCESS Operation succeeded. + @return other An error has occurred. +**/ +STATIC +EFI_STATUS +EFIAPI +InstallSsdtTable ( + IN MEZZANINE_PROTOCOL *This, + IN EFI_ACPI_TABLE_PROTOCOL *AcpiProtocol + ) +{ + EFI_ACPI_DESCRIPTION_HEADER *Ssdt; + UINTN SsdtSize; + EFI_STATUS Status; + UINTN Index; + UINTN TableKey; + + // + // Load SSDT table from the raw section of this FFS file. + // + for (Index =3D 0;; Index++) { + Status =3D GetSectionFromFv (&gEfiCallerIdGuid, EFI_SECTION_RAW, Index, + (VOID **)&Ssdt, &SsdtSize); + if (EFI_ERROR (Status)) { + return EFI_NOT_FOUND; + } + if (SsdtSize >=3D sizeof (EFI_ACPI_DESCRIPTION_HEADER) && + Ssdt->OemTableId =3D=3D SECURE96_SSDT_OEM_TABLE_ID) { + break; + } + } + return AcpiProtocol->InstallAcpiTable (AcpiProtocol, Ssdt, SsdtSize, + &TableKey); +} + STATIC MEZZANINE_PROTOCOL mMezzanine =3D { ApplyDeviceTreeOverlay, + InstallSsdtTable, ARRAY_SIZE (mI2c0Devices), 0, mI2c0Devices, diff --git a/Platform/96Boards/Secure96Dxe/Secure96Dxe.inf b/Platform/96Boa= rds/Secure96Dxe/Secure96Dxe.inf index 72dbf1314c15..ce4c8b5f8fa5 100644 --- a/Platform/96Boards/Secure96Dxe/Secure96Dxe.inf +++ b/Platform/96Boards/Secure96Dxe/Secure96Dxe.inf @@ -21,6 +21,7 @@ [Defines] ENTRY_POINT =3D Secure96DxeEntryPoint =20 [Sources] + Secure96.asl Secure96.dts Secure96.h Secure96Dxe.c --=20 2.20.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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