From nobody Tue May 7 00:54:32 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1530511279929988.2686442942338; Sun, 1 Jul 2018 23:01:19 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 83DD3203BA4EB; Sun, 1 Jul 2018 23:01:18 -0700 (PDT) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 817A5203B99AD for ; Sun, 1 Jul 2018 23:01:16 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Jul 2018 23:01:15 -0700 Received: from ray-dev.ccr.corp.intel.com ([10.239.9.4]) by orsmga002.jf.intel.com with ESMTP; 01 Jul 2018 23:01:14 -0700 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.100; helo=mga07.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,298,1526367600"; d="scan'208";a="71541079" From: Ruiyu Ni To: edk2-devel@lists.01.org Date: Mon, 2 Jul 2018 14:01:35 +0800 Message-Id: <20180702060135.264676-1-ruiyu.ni@intel.com> X-Mailer: git-send-email 2.16.1.windows.1 Subject: [edk2] [PATCH] UefiCpuPkg/MpInitLib: Avoid calling PEI services from AP X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laszlo Ersek , Jiewen Yao , Eric Dong , Fish Andrew MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Today's MpInitLib PEI implementation directly calls PeiServices->GetHobList() from AP which may cause racing issue. This patch fixes this issue by duplicating IDT for APs. Because CpuMpData structure is stored just after IDT, the CpuMPData address equals to IDTR.BASE + IDTR.LIMIT + 1. v2: 1. Add ALIGN_VALUE() on BufferSize. 2. Add ASSERT() to make sure no memory usage outside of the allocated buf= fer. 3. Add more comments in InitConfig path when restoring CpuData[0].Volatil= eRegisters. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni Cc: Jeff Fan Cc: Eric Dong Cc: Jiewen Yao Cc: Fish Andrew Cc: Laszlo Ersek Acked-by: Laszlo Ersek Reviewed-by: Eric Dong Tested-by: Laszlo Ersek --- UefiCpuPkg/Library/MpInitLib/MpLib.c | 59 +++++++++++++++++++++++++++--= ---- UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 18 +++++++--- 2 files changed, 63 insertions(+), 14 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpIn= itLib/MpLib.c index eb2765910c..108eea0a6f 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -615,7 +615,9 @@ ApWakeupFunction ( // ApInitializeSync (CpuMpData); // - // Sync BSP's Control registers to APs + // CpuMpData->CpuData[0].VolatileRegisters is initialized based on B= SP environment, + // to initialize AP in InitConfig path. + // NOTE: IDTR.BASE stored in CpuMpData->CpuData[0].VolatileRegisters= points to a different IDT shared by all APs. // RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters, = FALSE); InitializeApData (CpuMpData, ProcessorNumber, BistData, ApTopOfStack= ); @@ -1506,6 +1508,7 @@ MpInitLibInitialize ( UINT32 MaxLogicalProcessorNumber; UINT32 ApStackSize; MP_ASSEMBLY_ADDRESS_MAP AddressMap; + CPU_VOLATILE_REGISTERS VolatileRegisters; UINTN BufferSize; UINT32 MonitorFilterSize; VOID *MpBuffer; @@ -1516,6 +1519,7 @@ MpInitLibInitialize ( UINTN Index; UINTN ApResetVectorSize; UINTN BackupBufferAddr; + UINTN ApIdtBase; =20 OldCpuMpData =3D GetCpuMpDataFromGuidedHob (); if (OldCpuMpData =3D=3D NULL) { @@ -1530,19 +1534,48 @@ MpInitLibInitialize ( ApStackSize =3D PcdGet32(PcdCpuApStackSize); ApLoopMode =3D GetApLoopMode (&MonitorFilterSize); =20 + // + // Save BSP's Control registers for APs + // + SaveVolatileRegisters (&VolatileRegisters); + BufferSize =3D ApStackSize * MaxLogicalProcessorNumber; BufferSize +=3D MonitorFilterSize * MaxLogicalProcessorNumber; - BufferSize +=3D sizeof (CPU_MP_DATA); BufferSize +=3D ApResetVectorSize; + BufferSize =3D ALIGN_VALUE (BufferSize, 8); + BufferSize +=3D VolatileRegisters.Idtr.Limit + 1; + BufferSize +=3D sizeof (CPU_MP_DATA); BufferSize +=3D (sizeof (CPU_AP_DATA) + sizeof (CPU_INFO_IN_HOB))* MaxLo= gicalProcessorNumber; MpBuffer =3D AllocatePages (EFI_SIZE_TO_PAGES (BufferSize)); ASSERT (MpBuffer !=3D NULL); ZeroMem (MpBuffer, BufferSize); Buffer =3D (UINTN) MpBuffer; =20 + // + // The layout of the Buffer is as below: + // + // +--------------------+ <-- Buffer + // AP Stacks (N) + // +--------------------+ <-- MonitorBuffer + // AP Monitor Filters (N) + // +--------------------+ <-- BackupBufferAddr (CpuMpData->BackupBuff= er) + // Backup Buffer + // +--------------------+ + // Padding + // +--------------------+ <-- ApIdtBase (8-byte boundary) + // AP IDT All APs share one separate IDT. So AP can g= et address of CPU_MP_DATA from IDT Base. + // +--------------------+ <-- CpuMpData + // CPU_MP_DATA + // +--------------------+ <-- CpuMpData->CpuData + // CPU_AP_DATA (N) + // +--------------------+ <-- CpuMpData->CpuInfoInHob + // CPU_INFO_IN_HOB (N) + // +--------------------+ + // MonitorBuffer =3D (UINT8 *) (Buffer + ApStackSize * MaxLogicalProcess= orNumber); BackupBufferAddr =3D (UINTN) MonitorBuffer + MonitorFilterSize * MaxLogi= calProcessorNumber; - CpuMpData =3D (CPU_MP_DATA *) (BackupBufferAddr + ApResetVectorSize); + ApIdtBase =3D ALIGN_VALUE (BackupBufferAddr + ApResetVectorSize, = 8); + CpuMpData =3D (CPU_MP_DATA *) (ApIdtBase + VolatileRegisters.Idtr= .Limit + 1); CpuMpData->Buffer =3D Buffer; CpuMpData->CpuApStackSize =3D ApStackSize; CpuMpData->BackupBuffer =3D BackupBufferAddr; @@ -1557,10 +1590,20 @@ MpInitLibInitialize ( CpuMpData->MicrocodePatchAddress =3D PcdGet64 (PcdCpuMicrocodePatchAd= dress); CpuMpData->MicrocodePatchRegionSize =3D PcdGet64 (PcdCpuMicrocodePatchRe= gionSize); InitializeSpinLock(&CpuMpData->MpLock); + + // + // Make sure no memory usage outside of the allocated buffer. // - // Save BSP's Control registers to APs + ASSERT ((CpuMpData->CpuInfoInHob + sizeof (CPU_INFO_IN_HOB) * MaxLogical= ProcessorNumber) =3D=3D + Buffer + BufferSize); + + // + // Duplicate BSP's IDT to APs. + // All APs share one separate IDT. So AP can get the address of CpuMpDat= a by using IDTR.BASE + IDTR.LIMIT + 1 // - SaveVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters); + CopyMem ((VOID *)ApIdtBase, (VOID *)VolatileRegisters.Idtr.Base, Volatil= eRegisters.Idtr.Limit + 1); + VolatileRegisters.Idtr.Base =3D ApIdtBase; + CopyMem (&CpuMpData->CpuData[0].VolatileRegisters, &VolatileRegisters, s= izeof (VolatileRegisters)); // // Set BSP basic information // @@ -1618,11 +1661,7 @@ MpInitLibInitialize ( } CpuMpData->CpuData[Index].CpuHealthy =3D (CpuInfoInHob[Index].Health= =3D=3D 0)? TRUE:FALSE; CpuMpData->CpuData[Index].ApFunction =3D 0; - CopyMem ( - &CpuMpData->CpuData[Index].VolatileRegisters, - &CpuMpData->CpuData[0].VolatileRegisters, - sizeof (CPU_VOLATILE_REGISTERS) - ); + CopyMem (&CpuMpData->CpuData[Index].VolatileRegisters, &VolatileRegi= sters, sizeof (CPU_VOLATILE_REGISTERS)); } if (MaxLogicalProcessorNumber > 1) { // diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c b/UefiCpuPkg/Library/M= pInitLib/PeiMpLib.c index 791ae9db6e..92f28681e4 100644 --- a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c @@ -27,6 +27,8 @@ EnableDebugAgent ( =20 /** Get pointer to CPU MP Data structure. + For BSP, the pointer is retrieved from HOB. + For AP, the structure is just after IDT. =20 @return The pointer to CPU MP Data structure. **/ @@ -35,10 +37,18 @@ GetCpuMpData ( VOID ) { - CPU_MP_DATA *CpuMpData; - - CpuMpData =3D GetCpuMpDataFromGuidedHob (); - ASSERT (CpuMpData !=3D NULL); + CPU_MP_DATA *CpuMpData; + MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr; + IA32_DESCRIPTOR Idtr; + + ApicBaseMsr.Uint64 =3D AsmReadMsr64 (MSR_IA32_APIC_BASE); + if (ApicBaseMsr.Bits.BSP =3D=3D 1) { + CpuMpData =3D GetCpuMpDataFromGuidedHob (); + ASSERT (CpuMpData !=3D NULL); + } else { + AsmReadIdtr (&Idtr); + CpuMpData =3D (CPU_MP_DATA *) (Idtr.Base + Idtr.Limit + 1); + } return CpuMpData; } =20 --=20 2.16.1.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel