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[2.15.165.91]) by smtp.gmail.com with ESMTPSA id x130-v6sm892491wme.24.2018.06.07.23.58.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 Jun 2018 23:58:23 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::22d; helo=mail-wr0-x22d.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IDGZTFa44cMq31H+VcVxKIAVLEOpjBlqf99JEjpN1rg=; b=Bk/JhMzZt6iKWXo17lo/y6Yzk3RUlCB2thxBg/pIKRUozLll6Q+0e7Ki8JUKN0EqN9 RtRXNPevpxn4rvfPATJ6tmMUt+ar/vfPf2rZ3o5CIXCegs4ka29ULyurlDsMTbc48znO zWmHGj2wj29hHt5dIpjTB7wXm0KO3GMxDVij8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=IDGZTFa44cMq31H+VcVxKIAVLEOpjBlqf99JEjpN1rg=; b=Cqv9zrCt0bHEzScPoSkF09LXYVwr3GRStgWuvNYzwPBl2JMGsUDTQk6dn3v5BoVLxA Pqtj834b19T/T1TpOZKyHr64LQI9m3KhWO1ZZykQnP+nGUa9ReheOu2hQa8QmOLoghle d/UOGn3yKI+SPuinfE5zMxUbGN0w7jJOGQ3bdd1yAgKGxU+OqU5uFDxttyKnss82hWAO L6XqAMTAnduxy4EcI1eFUa301jNTPrH0dd1j2T0yXXMMU3uOhImWIt1QBTbyD0zhFjUv MHosgRNlngfiHnXPUgadH3mXhiMr9ZucIMWau+0m2Ze8q3+OyUFQQlzknZVrA57l7GrV 0S8Q== X-Gm-Message-State: APt69E0XzTaFqqnZG40aktVFl2lGmgRhFdjt0bgkIxhNOIhOyJZ4Acgu mvDF82O8LDXfj3GW0ww/ko45ODATxBw= X-Google-Smtp-Source: ADUXVKJmxRhwsMEGoGK9wxecbTXNeWfT+5uceZIvTmzNQLWxQJlZduzxWuVqkiUbuJlRcYOqtD+34Q== X-Received: by 2002:adf:d204:: with SMTP id g4-v6mr3955569wri.229.1528441104542; Thu, 07 Jun 2018 23:58:24 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Fri, 8 Jun 2018 08:58:11 +0200 Message-Id: <20180608065811.2065-6-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180608065811.2065-1-ard.biesheuvel@linaro.org> References: <20180608065811.2065-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH v2 5/5] ArmPkg/ArmSmcPsciResetSystemLib: implement fallback for warm reboot X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: michael.d.kinney@intel.com, jiewen.yao@intel.com, star.zeng@intel.com, leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Implement ResetSystemLib's EnterS3WithImmediateWake() routine using a jump back to the PEI entry point with interrupts and MMU+caches disabled. This is only possible at boot time, when we are sure that the current CPU is the only one up and running. Also, it depends on the platform whether the PEI code is preserved in memory (it may be copied to DRAM rather than execute in place), so also add a feature PCD to selectively enable this feature. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- ArmPkg/ArmPkg.dec | 4 = ++++ ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c | 21 = ++++++++++++++++++-- ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf | 9 = +++++++++ 3 files changed, 32 insertions(+), 2 deletions(-) diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec index debe066b6f7b..3aa229fe2ec9 100644 --- a/ArmPkg/ArmPkg.dec +++ b/ArmPkg/ArmPkg.dec @@ -85,6 +85,10 @@ [PcdsFeatureFlag.common] # Define if the GICv3 controller should use the GICv2 legacy gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x00000042 =20 + # Whether to implement warm reboot for capsule update using a jump back = to the + # PEI entry point with caches and interrupts disabled. + gArmTokenSpaceGuid.PcdArmReenterPeiForCapsuleWarmReboot|FALSE|BOOLEAN|0x= 0000001F + [PcdsFeatureFlag.ARM] # Whether to map normal memory as non-shareable. FALSE is the safe choic= e, but # TRUE may be appropriate to fix performance problems if you don't care = about diff --git a/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemL= ib.c b/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c index d6d26bce5009..10ceafd14d5d 100644 --- a/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c +++ b/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c @@ -15,10 +15,13 @@ =20 #include =20 +#include +#include #include #include #include -#include +#include +#include =20 #include =20 @@ -89,7 +92,21 @@ EnterS3WithImmediateWake ( VOID ) { - // Not implemented + VOID (*Reset)(VOID); + + if (FeaturePcdGet (PcdArmReenterPeiForCapsuleWarmReboot) && + !EfiAtRuntime ()) { + // + // At boot time, we are the only core running, so we can implement the + // immediate wake (which is used by capsule update) by disabling the M= MU + // and interrupts, and jumping to the PEI entry point. + // + Reset =3D (VOID (*)(VOID))(UINTN)FixedPcdGet64 (PcdFvBaseAddress); + + gBS->RaiseTPL (TPL_HIGH_LEVEL); + ArmDisableMmu (); + Reset (); + } } =20 /** diff --git a/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemL= ib.inf b/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.i= nf index 5a1ee976e5bc..19021cd1e8b6 100644 --- a/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf +++ b/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf @@ -30,6 +30,15 @@ [Packages] MdePkg/MdePkg.dec =20 [LibraryClasses] + ArmMmuLib ArmSmcLib BaseLib DebugLib + UefiBootServicesTableLib + UefiRuntimeLib + +[FeaturePcd] + gArmTokenSpaceGuid.PcdArmReenterPeiForCapsuleWarmReboot + +[FixedPcd] + gArmTokenSpaceGuid.PcdFvBaseAddress --=20 2.17.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel