From nobody Fri Mar 29 07:28:22 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1528281784183985.1743055399999; Wed, 6 Jun 2018 03:43:04 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id B11B5211CAC9A; Wed, 6 Jun 2018 03:43:02 -0700 (PDT) Received: from mail-wr0-x241.google.com (mail-wr0-x241.google.com [IPv6:2a00:1450:400c:c0c::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id F3E10211C64BE for ; Wed, 6 Jun 2018 03:43:00 -0700 (PDT) Received: by mail-wr0-x241.google.com with SMTP id f16-v6so5755607wrm.3 for ; Wed, 06 Jun 2018 03:43:00 -0700 (PDT) Received: from dogfood.home ([2a01:cb1d:112:6f00:e8af:f8ab:ef29:1cd5]) by smtp.gmail.com with ESMTPSA id 194-v6sm4984884wml.20.2018.06.06.03.42.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Jun 2018 03:42:57 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::241; helo=mail-wr0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=TRyu2HE1iOx1xEk7KWK2hSO7dZnqm8zy9jQCL0ow65s=; b=Y1PCt9/o3FG3LbUGhzEeYUy3RMPCNl/XZDmKCuxlCcCfDucVZhl83XkcUVEVyyu9Pq 3aNWXEIDx4EtaNkfxgQoLGezuHe7/rB0vTnKvq+Xpjcsb9wsfagSVSsn8G2XbVo/8mX5 JzdyyDMvpSvMRE7OYb5Kd+1LEvEDzmay38leQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=TRyu2HE1iOx1xEk7KWK2hSO7dZnqm8zy9jQCL0ow65s=; b=KMCZ9z/XpHDeJ0nqQj6gKubgCe22fxkxoAWcgCY5R6z11w7uToJr/CifLiX+yyEMHh zGYWvcFOWPWuaX+DHgz8EHze5MgrnQXt5YOkbAUsVwsPL+1eciEe3eIcL9Lza3SRnqUu jGztQHQsVEG3jiiK/Wg7fgYQUDWmd7HOrIbSVhzHmpUqpZqlIGeLaZ3fYu7rXpkXxtD3 StyisjDE/jpQLvPd5WraYpDTLMZHwnlbP5ulNieITVmvI8dEIhmZ1qTvWqs0Vp0o+WOr 2NWZVndFlpXyHl6Qow5Eu8bAw5kI0W8Ecxqzqe8NxJyz89b4eu2WJ9l6Hg7TOa+GclH/ 3JPg== X-Gm-Message-State: APt69E07lBURngCG+TejwnWixNGIiglCmufn4TTvdPTwqC7jodByg2SE 6ocSH9/lBco6r800zkWMiR7RzXY3A34= X-Google-Smtp-Source: ADUXVKLOf7PMg0XC2NIOc4IJR1/ssW2PPHUwL3+Mn/+LkFV5yxwTH8b+fFvwKYoXshfguvaRfpLwhw== X-Received: by 2002:adf:b94e:: with SMTP id b14-v6mr2017391wrg.265.1528281778236; Wed, 06 Jun 2018 03:42:58 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Wed, 6 Jun 2018 12:42:55 +0200 Message-Id: <20180606104255.22129-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.0 Subject: [edk2] [RFC PATCH edk2-platforms] Silicon/SynQuacer: add special ResetSystemLib that implements warm reboot X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" This is a clone of the generic PSCI/SMC based ResetSystemLib from ArmPkg, with an implementation of EnterS3WithImmediateWake () added that simply disables interrupts, disables the MMU and jumps back to the PEI entry point when called at boot time. This is sufficiently close to an architected warm reboot to support capsules that persist across reset, but is otherwise a bit of a hack. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/Library/SynQuacerResetSystemLib/SynQuacerReset= SystemLib.c | 132 ++++++++++++++++++++ Silicon/Socionext/SynQuacer/Library/SynQuacerResetSystemLib/SynQuacerReset= SystemLib.inf | 41 ++++++ 2 files changed, 173 insertions(+) diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerResetSystemLib/Sy= nQuacerResetSystemLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerRese= tSystemLib/SynQuacerResetSystemLib.c new file mode 100644 index 000000000000..a4c0c18abd76 --- /dev/null +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerResetSystemLib/SynQuacer= ResetSystemLib.c @@ -0,0 +1,132 @@ +/** @file + ResetSystemLib implementation for SynQuacer using PSCI calls + + Copyright (c) 2018, Linaro Ltd. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may be= found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include + +/** + This function causes a system-wide reset (cold reset), in which + all circuitry within the system returns to its initial state. This type = of reset + is asynchronous to system operation and operates without regard to + cycle boundaries. + + If this function returns, it means that the system does not support cold= reset. +**/ +VOID +EFIAPI +ResetCold ( + VOID + ) +{ + ARM_SMC_ARGS ArmSmcArgs; + + // Send a PSCI 0.2 SYSTEM_RESET command + ArmSmcArgs.Arg0 =3D ARM_SMC_ID_PSCI_SYSTEM_RESET; + ArmCallSmc (&ArmSmcArgs); +} + +/** + This function causes a system-wide initialization (warm reset), in which= all processors + are set to their initial state. Pending cycles are not corrupted. + + If this function returns, it means that the system does not support warm= reset. +**/ +VOID +EFIAPI +ResetWarm ( + VOID + ) +{ + // Map a warm reset into a cold reset + ResetCold (); +} + +/** + This function causes the system to enter a power state equivalent + to the ACPI G2/S5 or G3 states. + + If this function returns, it means that the system does not support shut= down reset. +**/ +VOID +EFIAPI +ResetShutdown ( + VOID + ) +{ + ARM_SMC_ARGS ArmSmcArgs; + + // Send a PSCI 0.2 SYSTEM_OFF command + ArmSmcArgs.Arg0 =3D ARM_SMC_ID_PSCI_SYSTEM_OFF; + ArmCallSmc (&ArmSmcArgs); +} + +/** + This function causes the system to enter S3 and then wake up immediately. + + If this function returns, it means that the system does not support S3 f= eature. +**/ +VOID +EFIAPI +EnterS3WithImmediateWake ( + VOID + ) +{ + VOID (*Reset)(VOID); + + if (!EfiAtRuntime ()) { + // + // At boot time, we are the only core running, so we can implement the + // immediate wake (which is used by capsule update) by disabling the M= MU + // and interrupts, and jumping to the PEI entry point. + // + Reset =3D (VOID *)(UINTN)FixedPcdGet64 (PcdFvBaseAddress); + + gBS->RaiseTPL (TPL_HIGH_LEVEL); + ArmDisableMmu (); + Reset (); + } + ResetWarm (); +} + +/** + This function causes a systemwide reset. The exact type of the reset is + defined by the EFI_GUID that follows the Null-terminated Unicode string = passed + into ResetData. If the platform does not recognize the EFI_GUID in Reset= Data + the platform must pick a supported reset type to perform.The platform may + optionally log the parameters from any non-normal reset that occurs. + + @param[in] DataSize The size, in bytes, of ResetData. + @param[in] ResetData The data buffer starts with a Null-terminated str= ing, + followed by the EFI_GUID. +**/ +VOID +EFIAPI +ResetPlatformSpecific ( + IN UINTN DataSize, + IN VOID *ResetData + ) +{ + // Map the platform specific reset as reboot + ResetCold (); +} diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerResetSystemLib/Sy= nQuacerResetSystemLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerRe= setSystemLib/SynQuacerResetSystemLib.inf new file mode 100644 index 000000000000..0952f6a8f108 --- /dev/null +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerResetSystemLib/SynQuacer= ResetSystemLib.inf @@ -0,0 +1,41 @@ +#/** @file +# ResetSystemLib implementation for SynQuacer using PSCI calls +# +# Copyright (c) 2018, Linaro Ltd. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may b= e found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# +#**/ + +[Defines] + INF_VERSION =3D 0x0001001A + BASE_NAME =3D SynQuacerResetSystemLib + FILE_GUID =3D 6dd8d2f7-08b2-439b-99dd-28247ecd831c + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D ResetSystemLib|DXE_RUNTIME_DRIVER + +[Sources] + SynQuacerResetSystemLib.c + +[Packages] + ArmPkg/ArmPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + +[LibraryClasses] + ArmMmuLib + ArmSmcLib + BaseLib + DebugLib + UefiBootServicesTableLib + UefiRuntimeLib + +[FixedPcd] + gArmTokenSpaceGuid.PcdFvBaseAddress --=20 2.17.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel