From nobody Fri Nov 1 03:48:44 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1522951725737730.7928905301544; Thu, 5 Apr 2018 11:08:45 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 0734722685258; Thu, 5 Apr 2018 11:08:16 -0700 (PDT) Received: from cam-smtp0.cambridge.arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 39EE122146740 for ; Thu, 5 Apr 2018 11:08:12 -0700 (PDT) Received: from E107875.Emea.Arm.com (e107875.emea.arm.com [10.10.1.104]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id w35I88qp027787; Thu, 5 Apr 2018 19:08:10 +0100 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=217.140.96.140; helo=cam-smtp0.cambridge.arm.com; envelope-from=girish.pathak@arm.com; receiver=edk2-devel@lists.01.org From: Girish Pathak To: edk2-devel@lists.01.org Date: Thu, 5 Apr 2018 19:07:59 +0100 Message-Id: <20180405180803.33684-14-girish.pathak@arm.com> X-Mailer: git-send-email 2.13.3.windows.1 In-Reply-To: <20180405180803.33684-1-girish.pathak@arm.com> References: <20180405180803.33684-1-girish.pathak@arm.com> Subject: [edk2] [PATCH edk2-platforms v4 13/17] ARM/VExpressPkg: Reserving framebuffer at build X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nd@arm.com, ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, Stephanie.Hughes-Fitt@arm.com, Arvind.Chauhan@arm.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Girish Pathak This change uses two PCDs, PcdArmLcdFrameBufferBase and PcdArmLcdFrameBufferSize introduced in correspondiong EDK2 patch to reserve framebuffer in DRAM if these values are defined in platform specific DSC file, avoiding the need to allocate dynamically. This allows the framebuffer to appear as "I/O memory" outside of the normal RAM map, which is similar to the "VRAM" case. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Girish Pathak Signed-off-by: Evan Lloyd --- Notes: v3: - Move PcdArmLcdDdrFrameBufferBase and PcdArmLcdDdrFrameBufferSize to VExpressPkg. [Ard] =20 These PCDs are also used for the Juno platform hence these PCDs are defined for the ArmPlatformPkg so that both platform can use it. [Girish] =20 - Could you please add an ASSERT() so that System Memory and PcdArmLcdDdrFrameBufferBase do not overlap [Ard] =20 Done [Girish] Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf | = 4 +- Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c | 4= 1 ++++++++++++++------ 2 files changed, 32 insertions(+), 13 deletions(-) diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpres= sLib.inf b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressL= ib.inf index 8c6291c42f8a599591d00d7afcb2ff3399417034..b025abd98b5e654323b7821ac35= 3ad920e2e6421 100644 --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf @@ -1,5 +1,5 @@ #/* @file -# Copyright (c) 2011-2014, ARM Limited. All rights reserved. +# Copyright (c) 2011-2018, ARM Limited. All rights reserved. # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License @@ -54,6 +54,8 @@ [FixedPcd] gArmTokenSpaceGuid.PcdArmPrimaryCore =20 gArmPlatformTokenSpaceGuid.PcdCoreCount + gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferBase + gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferSize =20 [Ppis] gArmMpCoreInfoPpiGuid diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c = b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c index 9fb0803d31ad0dbab59875bae99fd8a381d484b7..1d5fefc21726ba1b05d90e0e476= 77575d7fa2034 100644 --- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c +++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2011-2016, ARM Limited. All rights reserved. +* Copyright (c) 2011-2018, ARM Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the B= SD License @@ -128,17 +128,34 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[Index].Length =3D 2 * ARM_VE_SMB_PERIPH_SZ; VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUTE_DEV= ICE; =20 - // VRAM - VirtualMemoryTable[++Index].PhysicalBase =3D PL111_CLCD_VRAM_MOTHERBOARD= _BASE; - VirtualMemoryTable[Index].VirtualBase =3D PL111_CLCD_VRAM_MOTHERBOARD_BA= SE; - VirtualMemoryTable[Index].Length =3D PL111_CLCD_VRAM_MOTHERBOARD_SIZE; - // - // Map the VRAM region as Normal Non-Cacheable memory and not device mem= ory, - // so that we can use the accelerated string routines that may use unali= gned - // accesses or DC ZVA instructions. The enum identifier is slightly awkw= ard - // here, but it maps to a memory type that allows buffering and reorderi= ng. - // - VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUTE_UNC= ACHED_UNBUFFERED; + // Map region for the framebuffer in the system RAM if no VRAM present + if (FixedPcdGet32 (PcdArmLcdDdrFrameBufferBase) =3D=3D 0) { + // VRAM + VirtualMemoryTable[++Index].PhysicalBase =3D PL111_CLCD_VRAM_MOTHERBOA= RD_BASE; + VirtualMemoryTable[Index].VirtualBase =3D PL111_CLCD_VRAM_MOTHERBOARD_= BASE; + VirtualMemoryTable[Index].Length =3D PL111_CLCD_VRAM_MOTHERBOARD_SIZE; + // + // Map the VRAM region as Normal Non-Cacheable memory and not device m= emory, + // so that we can use the accelerated string routines that may use una= ligned + // accesses or DC ZVA instructions. The enum identifier is slightly aw= kward + // here, but it maps to a memory type that allows buffering and reorde= ring. + // + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUTE_U= NCACHED_UNBUFFERED; + + } else { + ASSERT ((ARM_VE_DRAM_BASE + ARM_VE_DRAM_SZ - 1) < + FixedPcdGet64 (PcdArmLcdDdrFrameBufferBase)); + VirtualMemoryTable[++Index].PhysicalBase =3D FixedPcdGet64 (PcdArmLcdD= drFrameBufferBase); + VirtualMemoryTable[Index].VirtualBase =3D FixedPcdGet64 (PcdArmLcdDdrF= rameBufferBase); + VirtualMemoryTable[Index].Length =3D FixedPcdGet32 (PcdArmLcdDdrFrameB= ufferSize); + // Map as Normal Non-Cacheable memory, so that we can use the accelera= ted + // SetMem/CopyMem routines that may use unaligned accesses or + // DC ZVA instructions. If mapped as device memory, these routine may = cause + // alignment faults. + // NOTE: The attribute value is misleading, it indicates memory map ty= pe as + // an un-cached, un-buffered but allows buffering and reordering. + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUTE_U= NCACHED_UNBUFFERED; + } =20 // Map sparse memory region if present if (HasSparseMemory) { --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel