From nobody Tue Feb 10 17:08:30 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 152156235152989.6462811496325; Tue, 20 Mar 2018 09:12:31 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id CF04922631488; Tue, 20 Mar 2018 09:05:55 -0700 (PDT) Received: from cam-smtp0.cambridge.arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 89C3F2253FB79 for ; Tue, 20 Mar 2018 09:05:52 -0700 (PDT) Received: from E107875.Emea.Arm.com (e107875.emea.arm.com [10.10.1.104]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id w2KGCHLv016075; Tue, 20 Mar 2018 16:12:20 GMT X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=217.140.96.140; helo=cam-smtp0.cambridge.arm.com; envelope-from=girish.pathak@arm.com; receiver=edk2-devel@lists.01.org From: Girish Pathak To: edk2-devel@lists.01.org Date: Tue, 20 Mar 2018 16:12:03 +0000 Message-Id: <20180320161212.79120-8-girish.pathak@arm.com> X-Mailer: git-send-email 2.13.3.windows.1 In-Reply-To: <20180320161212.79120-1-girish.pathak@arm.com> References: <20180320161212.79120-1-girish.pathak@arm.com> Subject: [edk2] [PATCH v3 07/16] ArmPlatformPkg: PL111Lcd: Combine two writes to LCDControl X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nd@arm.com, Stephanie.Hughes-Fitt@arm.com, leif.lindholm@linaro.org, ard.biesheuvel@linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Currenty bit LcdPwr of the LCDControl register is enabled immediately after setting other bits of the LCDControl register. This two write sequence is unnecessary. This change removes this extra write by setting LcdPwr bit along with other bits of the LcdControl register. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Girish Pathak Signed-off-by: Evan Lloyd Reviewed-by: Evan Lloyd --- ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c b/ArmPlatformPkg/Li= brary/PL111Lcd/PL111Lcd.c index 287e3ca272c0c19f8045a3bf4e69a092d8da6fd8..465cb6845437f57d15f05a271d1= b01f634e11b56 100644 --- a/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c +++ b/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c @@ -137,11 +137,7 @@ LcdSetMode ( =20 // PL111_REG_LCD_CONTROL LcdControl =3D PL111_CTRL_LCD_EN | PL111_CTRL_LCD_BPP (LcdBpp) | - PL111_CTRL_LCD_TFT | PL111_CTRL_BGR; - MmioWrite32 (PL111_REG_LCD_CONTROL, LcdControl); - - // Turn on power to the LCD Panel - LcdControl |=3D PL111_CTRL_LCD_PWR; + PL111_CTRL_LCD_TFT | PL111_CTRL_LCD_PWR | PL111_CTRL_BGR; MmioWrite32 (PL111_REG_LCD_CONTROL, LcdControl); =20 return EFI_SUCCESS; --=20 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel