From nobody Fri Nov 1 12:34:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1517582409339636.2352726291908; Fri, 2 Feb 2018 06:40:09 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 223592239364B; Fri, 2 Feb 2018 06:34:29 -0800 (PST) Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 54CE62239364B for ; Fri, 2 Feb 2018 06:34:27 -0800 (PST) Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4FA51C03674E; Fri, 2 Feb 2018 14:40:05 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-121-50.rdu2.redhat.com [10.10.121.50]) by smtp.corp.redhat.com (Postfix) with ESMTP id CBD3E6764F; Fri, 2 Feb 2018 14:40:02 +0000 (UTC) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.132.183.28; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org From: Laszlo Ersek To: edk2-devel-01 Date: Fri, 2 Feb 2018 15:39:42 +0100 Message-Id: <20180202143954.7357-3-lersek@redhat.com> In-Reply-To: <20180202143954.7357-1-lersek@redhat.com> References: <20180202143954.7357-1-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Fri, 02 Feb 2018 14:40:05 +0000 (UTC) Subject: [edk2] [PATCH 02/14] MdePkg/BaseLib: add PatchInstructionX86() X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ruiyu Ni , Eric Dong , Ard Biesheuvel , Liming Gao , Jiewen Yao , Leif Lindholm , Michael D Kinney MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Some edk2 modules generate X86 machine code at module execution time by: - compiling "template" code with NASM at module build time, - linking the object code into the module, - and patching the immediate (constant) operands of some instructions when the module is executed. Add a helper function to BaseLib so that the C code performing the patching is easier to read and maintain. The implementation in this patch is taken mainly from Mike Kinney's mailing list message at . Cc: Ard Biesheuvel Cc: Eric Dong Cc: Jiewen Yao Cc: Leif Lindholm Cc: Liming Gao Cc: Michael D Kinney Cc: Ruiyu Ni Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D866 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek --- MdePkg/Library/BaseLib/BaseLib.inf | 2 + MdePkg/Include/Library/BaseLib.h | 42 +++++++++ MdePkg/Library/BaseLib/X86PatchInstruction.c | 89 ++++++++++++++++++++ 3 files changed, 133 insertions(+) diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/Ba= seLib.inf index fbfb0063b75f..4353e242f458 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -431,6 +431,7 @@ [Sources.Ia32] X86DisablePaging64.c X86DisablePaging32.c X86RdRand.c + X86PatchInstruction.c =20 [Sources.X64] X64/Thunk16.nasm @@ -757,6 +758,7 @@ [Sources.X64] X86DisablePaging64.c X86DisablePaging32.c X86RdRand.c + X86PatchInstruction.c X64/GccInline.c | GCC X64/Thunk16.S | XCODE=20 X64/SwitchStack.nasm| GCC diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/Base= Lib.h index e4455e71d5c3..0dcb394c9280 100644 --- a/MdePkg/Include/Library/BaseLib.h +++ b/MdePkg/Include/Library/BaseLib.h @@ -9068,5 +9068,47 @@ AsmWriteTr ( IN UINT16 Selector ); =20 +/** + Patch the immediate operand of an IA32 or X64 instruction such that the = byte, + word, dword or qword operand is encoded at the end of the instruction's + binary representation. + + This function should be used to update object code that was compiled with + NASM from assembly source code. Example: + + NASM source code: + + mov eax, strict dword 0 ; the imm32 zero operand will be patch= ed + ASM_PFX(gPatchCr3): + mov cr3, eax + + C source code: + + extern UINT8 gPatchCr3; + PatchInstructionX86 (&gPatchCr3, AsmReadCr3 (), 4); + + @param[out] InstructionEnd Pointer to the byte one past the instruction= to + patch. The immediate operand to patch is exp= ected + to comprise the trailing bytes of the + instruction. If InstructionEnd is closer to + address 0 than ValueSize permits, then ASSER= T(). + + @param[in] PatchValue The constant to write to the immediate opera= nd. + The caller is responsible for ensuring that + PatchValue can be represented in the byte, w= ord, + dword or qword operand (as indicated through + ValueSize); otherwise ASSERT(). + + @param[in] ValueSize The size of the operand in bytes; must be 1,= 2, + 4, or 8. ASSERT() otherwise. +**/ +VOID +EFIAPI +PatchInstructionX86 ( + OUT VOID *InstructionEnd, + IN UINT64 PatchValue, + IN UINTN ValueSize + ); + #endif // defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) #endif // !defined (__BASE_LIB__) diff --git a/MdePkg/Library/BaseLib/X86PatchInstruction.c b/MdePkg/Library/= BaseLib/X86PatchInstruction.c new file mode 100644 index 000000000000..82c86244c9c0 --- /dev/null +++ b/MdePkg/Library/BaseLib/X86PatchInstruction.c @@ -0,0 +1,89 @@ +/** @file + IA-32/x64 PatchInstructionX86() + + Copyright (C) 2018, Intel Corporation. All rights reserved.
+ Copyright (C) 2018, Red Hat, Inc. + + This program and the accompanying materials are licensed and made availa= ble + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WI= THOUT + WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +**/ + +#include "BaseLibInternals.h" + +/** + Patch the immediate operand of an IA32 or X64 instruction such that the = byte, + word, dword or qword operand is encoded at the end of the instruction's + binary representation. + + This function should be used to update object code that was compiled with + NASM from assembly source code. Example: + + NASM source code: + + mov eax, strict dword 0 ; the imm32 zero operand will be patch= ed + ASM_PFX(gPatchCr3): + mov cr3, eax + + C source code: + + extern UINT8 gPatchCr3; + PatchInstructionX86 (&gPatchCr3, AsmReadCr3 (), 4); + + @param[out] InstructionEnd Pointer to the byte one past the instruction= to + patch. The immediate operand to patch is exp= ected + to comprise the trailing bytes of the + instruction. If InstructionEnd is closer to + address 0 than ValueSize permits, then ASSER= T(). + + @param[in] PatchValue The constant to write to the immediate opera= nd. + The caller is responsible for ensuring that + PatchValue can be represented in the byte, w= ord, + dword or qword operand (as indicated through + ValueSize); otherwise ASSERT(). + + @param[in] ValueSize The size of the operand in bytes; must be 1,= 2, + 4, or 8. ASSERT() otherwise. +**/ +VOID +EFIAPI +PatchInstructionX86 ( + OUT VOID *InstructionEnd, + IN UINT64 PatchValue, + IN UINTN ValueSize + ) +{ + // + // The equality ((UINTN)InstructionEnd =3D=3D ValueSize) would assume a = zero-size + // instruction at address 0; forbid it. + // + ASSERT ((UINTN)InstructionEnd > ValueSize); + + switch (ValueSize) { + case 1: + ASSERT (PatchValue <=3D MAX_UINT8); + *((UINT8 *)InstructionEnd - 1) =3D (UINT8)PatchValue; + break; + + case 2: + ASSERT (PatchValue <=3D MAX_UINT16); + WriteUnaligned16 ((UINT16 *)InstructionEnd - 1, (UINT16)PatchValue); + break; + + case 4: + ASSERT (PatchValue <=3D MAX_UINT32); + WriteUnaligned32 ((UINT32 *)InstructionEnd - 1, (UINT32)PatchValue); + break; + + case 8: + WriteUnaligned64 ((UINT64 *)InstructionEnd - 1, PatchValue); + break; + + default: + ASSERT (FALSE); + } +} --=20 2.14.1.3.gb7cf6e02401b _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel