From nobody Sat Apr 27 09:20:10 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1514389818207513.8196079928222; Wed, 27 Dec 2017 07:50:18 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 6D92522280C3B; Wed, 27 Dec 2017 07:45:21 -0800 (PST) Received: from mail-wr0-x243.google.com (mail-wr0-x243.google.com [IPv6:2a00:1450:400c:c0c::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 34AEE22280C23 for ; Wed, 27 Dec 2017 07:45:18 -0800 (PST) Received: by mail-wr0-x243.google.com with SMTP id v21so26329257wrc.0 for ; Wed, 27 Dec 2017 07:50:13 -0800 (PST) Received: from localhost.localdomain ([105.137.110.132]) by smtp.gmail.com with ESMTPSA id i17sm20840876wrf.71.2017.12.27.07.50.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 27 Dec 2017 07:50:11 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::243; helo=mail-wr0-x243.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=k0wbVGLYY4HN9+L0ra084kQmTeTi4EYAgHcPZu26Qhs=; b=NrHZd+ZKGqeAznx7ecw97BRVGl5Gha/jRMS19+aCFLLoJAWpTERWt7RutErmwdMPRF 8TpQQzli3brOPmedGaE0zX5sDZKMuh/OrAw3qwJmCNHQ8UsZ4gKm/PqM99Bs6XoottZ9 Iiyhs0XXxoW28OHp002xw2qPEQvq3R5fGFdag= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=k0wbVGLYY4HN9+L0ra084kQmTeTi4EYAgHcPZu26Qhs=; b=CynKkrftLQgkCKA7OxlqBniWpQ50jRV1TpdDgg1T6nr8foIv0GQ8kGPddK0RIau8pR zMoIGGMbQrh00Sy2hvV+zRvTftOQ7DkD3BXKJotJRnYMWgrYksz2SqVdfFQZGVJYov2g fAq/TBbYTl+ejtJEffZI5sFocXYGMRYAZuRMMnrWzp+u1XrN4kjH91et5GxtKQQ16sXy 1oT5LnqBjWehGs4JCgEwM30ykPOyBwACkF5R2BAoz8rYEJtEmJ2WFhXPZAGNn2MX9+na ulzGEe4D7+SXgc8UjdaGGieWJpteCZkG14D1R3YWBFd4KBDezc3rXjYW1+RBgpvzP7O3 dkPw== X-Gm-Message-State: AKGB3mJoudCiM3Z+8P08Y4meLhfzCumhpccEv6w6/Q19cQrZWvEL3HRP hOJWQpKQuJPfLznkZaVrXpzwgtJxdT8= X-Google-Smtp-Source: ACJfBos1QqKMw7eLZFORrSyB1nCXIbvofjjX1bvRzLAwcIXAX0qa+bdFYq+/7i/xHJgZ8OcfPp29gg== X-Received: by 10.223.179.77 with SMTP id k13mr29390370wrd.116.1514389812313; Wed, 27 Dec 2017 07:50:12 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Wed, 27 Dec 2017 15:49:56 +0000 Message-Id: <20171227155001.25886-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171227155001.25886-1-ard.biesheuvel@linaro.org> References: <20171227155001.25886-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH edk2-platforms 1/6] Silicon: fix typo in gPcf8563RealTimeClockLibI2cMasterProtocolGuid X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Do a global replace of gPcf8563RealTimeClockLibI2cMasterProtolGuid with gPcf8563RealTimeClockLibI2cMasterProtocolGuid. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c | = 2 +- Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.dec | = 2 +- Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf | = 4 ++-- Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c | = 2 +- Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | = 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClo= ckLib.c b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockL= ib.c index 67f8e7de4025..6bc4aef28849 100644 --- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c +++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c @@ -373,7 +373,7 @@ LibRtcInitialize ( // BufferSize =3D sizeof (EFI_HANDLE); Status =3D gBS->LocateHandle (ByProtocol, - &gPcf8563RealTimeClockLibI2cMasterProtolGuid, NULL, + &gPcf8563RealTimeClockLibI2cMasterProtocolGuid, NULL, &BufferSize, &mI2cMasterHandle); ASSERT_EFI_ERROR (Status); =20 diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClo= ckLib.dec b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeCloc= kLib.dec index 3849056f164a..94c4a3f1ef4c 100644 --- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.d= ec +++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.d= ec @@ -22,7 +22,7 @@ [Guids] gPcf8563RealTimeClockLibTokenSpaceGuid =3D { 0xaaf5b169, 0x93a0, 0x4d60,= { 0xba, 0xe4, 0x06, 0x07, 0x92, 0x8e, 0x63, 0xdd }} =20 [Protocols] - gPcf8563RealTimeClockLibI2cMasterProtolGuid =3D { 0xa6af18ae, 0x3bd5, 0x= 4af9, { 0xbb, 0x6a, 0xdb, 0x85, 0x07, 0x62, 0x81, 0x38 }} + gPcf8563RealTimeClockLibI2cMasterProtocolGuid =3D { 0xa6af18ae, 0x3bd5, = 0x4af9, { 0xbb, 0x6a, 0xdb, 0x85, 0x07, 0x62, 0x81, 0x38 }} =20 [PcdsFixedAtBuild] gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress|0x51|UINT8|0x0= 0000001 diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClo= ckLib.inf b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeCloc= kLib.inf index 9907e343ba78..1a9a6f6c9cf3 100644 --- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.i= nf +++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.i= nf @@ -42,11 +42,11 @@ [Guids] [Protocols] gEfiDriverBindingProtocolGuid ## CONSUMES gEfiI2cMasterProtocolGuid ## CONSUMES - gPcf8563RealTimeClockLibI2cMasterProtolGuid ## CONSUMES + gPcf8563RealTimeClockLibI2cMasterProtocolGuid ## CONSUMES =20 [FixedPcd] gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cSlaveAddress gPcf8563RealTimeClockLibTokenSpaceGuid.PcdI2cBusFrequency =20 [Depex] - gPcf8563RealTimeClockLibI2cMasterProtolGuid + gPcf8563RealTimeClockLibI2cMasterProtocolGuid diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c = b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c index 098a4dbd324e..91c1b66ea1f8 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c @@ -183,7 +183,7 @@ PlatformDxeEntryPoint ( // through the I2C driver stack (which cannot be used at runtime) // Status =3D gBS->InstallProtocolInterface (&Handle, - &gPcf8563RealTimeClockLibI2cMasterProtolGuid, + &gPcf8563RealTimeClockLibI2cMasterProtocolGuid, EFI_NATIVE_INTERFACE, NULL); ASSERT_EFI_ERROR (Status); =20 diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.in= f b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf index 7d3b88a5b52e..9778574be1bf 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf @@ -53,7 +53,7 @@ [Guids] [Protocols] gEdkiiNonDiscoverableDeviceProtocolGuid ## PRODUCES gEfiPciIoProtocolGuid ## CONSUMES - gPcf8563RealTimeClockLibI2cMasterProtolGuid ## PRODUCES + gPcf8563RealTimeClockLibI2cMasterProtocolGuid ## PRODUCES =20 [FixedPcd] gSynQuacerTokenSpaceGuid.PcdNetsecEepromBase --=20 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sat Apr 27 09:20:10 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1514389820135428.0407715238166; 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Wed, 27 Dec 2017 07:50:13 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Wed, 27 Dec 2017 15:49:57 +0000 Message-Id: <20171227155001.25886-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171227155001.25886-1-ard.biesheuvel@linaro.org> References: <20171227155001.25886-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH edk2-platforms 2/6] Silicon/NXP/Pcf8563RealTimeClockLib: avoid driver binding protocol X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Instead of registering a notification callback on the driver binding protocol, and attempting to connect our I2C master handle each time a new driver is registered, switch to the more obvious approach of registering a notification callback on the I2C master protocol directly. The original code was written under the assumption that it would make the RTC available at an earlier time, but given that all handles that are created during the execution of a driver entry point are connected by DXE core right away (i.e., before StartImage() returns), this is not really necessary, and in fact, may result in the driver already having been connected by the time we attempt to connect it. Note that it is now up to the platform to ensure that ConnectController() is called for the handle if DXE core does not call it by itself, or does call it but at a time when no I2C master protocol driver is available yet. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c | = 31 ++++++++------------ Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.inf | = 1 - 2 files changed, 13 insertions(+), 19 deletions(-) diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClo= ckLib.c b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockL= ib.c index 6bc4aef28849..fb58e1feb424 100644 --- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c +++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.c @@ -41,7 +41,7 @@ #define EPOCH_BASE 2000 =20 STATIC EFI_HANDLE mI2cMasterHandle; -STATIC VOID *mDriverEventRegistration; +STATIC VOID *mI2cMasterEventRegistration; STATIC EFI_I2C_MASTER_PROTOCOL *mI2cMaster; STATIC EFI_EVENT mRtcVirtualAddrChangeEvent; =20 @@ -263,12 +263,12 @@ LibSetWakeupTime ( =20 STATIC VOID -DriverRegistrationEvent ( +I2cMasterRegistrationEvent ( IN EFI_EVENT Event, IN VOID *Context ) { - EFI_HANDLE Handle[2]; + EFI_HANDLE Handle; UINTN BufferSize; EFI_STATUS Status; EFI_I2C_MASTER_PROTOCOL *I2cMaster; @@ -280,10 +280,10 @@ DriverRegistrationEvent ( do { BufferSize =3D sizeof (EFI_HANDLE); Status =3D gBS->LocateHandle (ByRegisterNotify, - &gEfiDriverBindingProtocolGuid, - mDriverEventRegistration, + &gEfiI2cMasterProtocolGuid, + mI2cMasterEventRegistration, &BufferSize, - Handle); + &Handle); if (EFI_ERROR (Status)) { if (Status !=3D EFI_NOT_FOUND) { DEBUG ((DEBUG_WARN, "%a: gBS->LocateHandle () returned %r\n", @@ -292,12 +292,7 @@ DriverRegistrationEvent ( break; } =20 - // - // Check if we can connect our handle to this driver. - // - Handle[1] =3D NULL; - Status =3D gBS->ConnectController (mI2cMasterHandle, Handle, NULL, FAL= SE); - if (EFI_ERROR (Status)) { + if (Handle !=3D mI2cMasterHandle) { continue; } =20 @@ -378,16 +373,16 @@ LibRtcInitialize ( ASSERT_EFI_ERROR (Status); =20 // - // Register a protocol registration notification callback on the driver - // binding protocol so we can attempt to connect our I2C master to it - // as soon as it appears. + // Register a protocol registration notification callback on the I2C mas= ter + // protocol. This will notify us even if the protocol instance we are lo= oking + // for has already been installed. // EfiCreateProtocolNotifyEvent ( - &gEfiDriverBindingProtocolGuid, + &gEfiI2cMasterProtocolGuid, TPL_CALLBACK, - DriverRegistrationEvent, + I2cMasterRegistrationEvent, NULL, - &mDriverEventRegistration); + &mI2cMasterEventRegistration); =20 // // Register for the virtual address change event diff --git a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClo= ckLib.inf b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeCloc= kLib.inf index 1a9a6f6c9cf3..e232902c6b5d 100644 --- a/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.i= nf +++ b/Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.i= nf @@ -40,7 +40,6 @@ [Guids] gEfiEventVirtualAddressChangeGuid =20 [Protocols] - gEfiDriverBindingProtocolGuid ## CONSUMES gEfiI2cMasterProtocolGuid ## CONSUMES gPcf8563RealTimeClockLibI2cMasterProtocolGuid ## CONSUMES =20 --=20 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sat Apr 27 09:20:10 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" Remove a %r without an associated parameter. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c | 2 = +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI= 2cDxe.c b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cD= xe.c index c3703dfb6c33..46c512a20151 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c +++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.c @@ -335,7 +335,7 @@ SynQuacerI2cStartRequest ( } =20 if (MmioRead8 (I2c->MmioBase + F_I2C_REG_BSR) & F_I2C_BSR_LRB) { - BOOTTIME_DEBUG ((DEBUG_WARN, "%a: No ack received - %r\n", __FUNCTIO= N__)); + BOOTTIME_DEBUG ((DEBUG_WARN, "%a: No ack received\n", __FUNCTION__)); Status =3D EFI_DEVICE_ERROR; break; } --=20 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sat Apr 27 09:20:10 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Wed, 27 Dec 2017 07:50:16 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::244; helo=mail-wr0-x244.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=KD0d8WFpK7lu5CpOnB36A4OmThKNNcOm2YfqjLjgaVo=; b=ZZwhkn2O0VpmdlLNh4x4KbZXUFbrX5zmWnlYfJEF4m4tJCbz5KihYicvWwpVBgnZwe 1d5DGfSnhr5uJeugKIlODoQzxOulf5T+IUonpZU3IBJaLbvwqTgRT1U+yclFUcgjjUTb DXdomU8nB4AG523gTP0dkSjPe1ZtyMaCOLPjs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=KD0d8WFpK7lu5CpOnB36A4OmThKNNcOm2YfqjLjgaVo=; b=EKbx6+Jf37D0YN35KM9i5WNBuWIGSOKgtOTZS9w9+ES0DBYnltwd7EbdzcNhYUHsXE zezgaR7NlzwebHlt36JkDi2Gi7QH4wvjHri1PLjslkKQve3T3TNSYZJPEh/2s31tr7Z3 MV7VENfTOIVBosw3RcK5E+xOC8xdy34q3Sr/mBBL8U0qDA4J953Yc0wc4bGD2+AcUM0z 01gis2fE4Xr255OYcVEPMP5+VDKjzxILAZp6thGfaATZLe1n6tty6paZ90/IOylF93tl TJMPOgfnK/JeBFE9SxRImQ9/xLC+ISAv9MRD+2A8u+cB60GV8bA8hOFqlplMjtYq0suV dIKQ== X-Gm-Message-State: AKGB3mLPOS8kAx3uJckk3IVcUnlw9aIIGkhevkb3iosv2izTU1kq5on1 6EmZVIVEJ2GFH2qq5z+jGk1Oa+uq+ho= X-Google-Smtp-Source: ACJfBou/WLxPOF0TLPav5quEwvprpa83s2b15sdGyQhqLhNdTE+53R7jlXr7eiMtqR8I1SjKPmUqBg== X-Received: by 10.223.135.39 with SMTP id a36mr13397044wra.50.1514389817224; Wed, 27 Dec 2017 07:50:17 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Wed, 27 Dec 2017 15:49:59 +0000 Message-Id: <20171227155001.25886-5-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171227155001.25886-1-ard.biesheuvel@linaro.org> References: <20171227155001.25886-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH edk2-platforms 4/6] Silicon/SynQuacer: load I2C driver before platform DXE driver X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" To ensure that the I2C master protocol is installed immediately onto the handles created by PlatformDxe in its entry point, force the SynQuacerI2cDxe driver to be loaded before PlatformDxe. These handles are recursively connected by the DXE core as soon as they appear, and so ensuring that the I2C master protocol driver is available at this time will ensure that these handles will be connected to it right away. This is useful when implementations of architectural protocols such as RTC or the EFI variable store, which should become available long before the ordinary dispatch of UEFI driver model drivers is started at the end of DXE, are based on I2C. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | = 2 +- Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf | = 2 +- Silicon/Socionext/SynQuacer/SynQuacer.dec | = 2 ++ 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.in= f b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf index 9778574be1bf..587dc111e75b 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf @@ -17,7 +17,7 @@ [Defines] INF_VERSION =3D 0x0001001A BASE_NAME =3D PlatformDxe - FILE_GUID =3D ac422cc1-d916-489a-b165-536fdfc633c2 + FILE_GUID =3D ac422cc1-d916-489a-b165-536fdfc633c2 = # gSynQuacerPlatformDxeFileGuid MODULE_TYPE =3D DXE_DRIVER VERSION_STRING =3D 1.0 ENTRY_POINT =3D PlatformDxeEntryPoint diff --git a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI= 2cDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2= cDxe.inf index fa715366878c..325816ba0b88 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.i= nf +++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.i= nf @@ -56,4 +56,4 @@ [FixedPcd] gSynQuacerTokenSpaceGuid.PcdI2cReferenceClock =20 [Depex] - TRUE + BEFORE gSynQuacerPlatformDxeFileGuid diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/= SynQuacer/SynQuacer.dec index a21f12b5bc32..76529e3c2164 100644 --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec @@ -25,6 +25,8 @@ [Guids] gSynQuacerNonDiscoverableI2cMasterGuid =3D { 0x364ee675, 0x9e44, 0x42b7,= { 0xa5, 0xe4, 0x92, 0x84, 0xdb, 0x85, 0xda, 0x09 } } gSynQuacerNonDiscoverableRuntimeI2cMasterGuid =3D { 0x5f35aa9b, 0x8c6f, = 0x4828, { 0xbd, 0x44, 0x7c, 0xc0, 0xeb, 0x2d, 0xfe, 0xb9 } } =20 + gSynQuacerPlatformDxeFileGuid =3D { 0xac422cc1, 0xd916, 0x489a, { 0xb1, = 0x65, 0x53, 0x6f, 0xdf, 0xc6, 0x33, 0xc2 } } + [Ppis] gSynQuacerDramInfoPpiGuid =3D { 0x3e1d7356, 0xdda4, 0x4b1a, { 0x93, 0x46= , 0xbf, 0x89, 0x1c, 0x86, 0x46, 0xcc } } =20 --=20 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sat Apr 27 09:20:10 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Wed, 27 Dec 2017 07:50:17 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::241; helo=mail-wr0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YwXCUsXGEZG7l0j2D4LD5Utf9ZA5PX8svNffjnw+wBc=; b=PkYoYD4q4yt5EKGxpmWIWWjRh0e6JZvyW8CwE6SVU2Jbz5PkV4nDGEAfS3xKzZgysg hvU8djf7u71dMQUU1ZOQoWDPDSI1Veb+P+t1EZOGQINSOjc/W1fqyOzclu6IxUh6yhfJ zLXPFsqlebHTaLY7Ege3VsP/8IA3tehEzTQps= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; 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charset="utf-8" Align the UART DT nodes: - use 'uart' not 'fuart' as node name for the second serial port - create an alias 'serial1' for the second serial port - use UART clock reference instead of hardcoded frequency - split 'clocks' property into 1 cell per phandle Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silico= n/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi index 37a3981f0360..7c3518facb98 100644 --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi @@ -32,6 +32,7 @@ =20 aliases { serial0 =3D &soc_uart0; + serial1 =3D &fuart; }; =20 chosen { @@ -436,15 +437,16 @@ compatible =3D "arm,pl011", "arm,primecell"; reg =3D <0x0 0x2a400000 0x0 0x1000>; interrupts =3D ; - clocks =3D <&clk_uart &clk_apb>; + clocks =3D <&clk_uart>, <&clk_apb>; clock-names =3D "uartclk", "apb_pclk"; }; =20 - fuart: fuart@51040000 { + fuart: uart@51040000 { compatible =3D "snps,dw-apb-uart"; reg =3D <0x0 0x51040000 0x0 0x1000>; interrupts =3D ; - clock-frequency =3D <62500000>; + clocks =3D <&clk_uart>, <&clk_apb>; + clock-names =3D "baudclk", "apb_pclk"; reg-io-width =3D <4>; reg-shift =3D <2>; }; --=20 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sat Apr 27 09:20:10 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1514389830169878.9303670720082; Wed, 27 Dec 2017 07:50:30 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 4027622280C39; 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Wed, 27 Dec 2017 07:50:20 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Wed, 27 Dec 2017 15:50:01 +0000 Message-Id: <20171227155001.25886-7-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171227155001.25886-1-ard.biesheuvel@linaro.org> References: <20171227155001.25886-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH edk2-platforms 6/6] Silicon/SynQuacer/DeviceTree: update NETSEC DT node to latest binding X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The upstream version of the Linux NETSEC driver expects the PHY DT node to appear under a MDIO subnode, so fix this in the device tree. Fix the node name as well, this should be 'ethernet' not 'netsec' Also, move the PHY subnode into the per-platform .dts file so we can set the unit address in the node name. This is necessary because recent versions of the DT compiler are more finicky about this. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts | 7 +++++ Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 29 +++++++= ++----------- Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts | 7 +++++ 3 files changed, 27 insertions(+), 16 deletions(-) diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts b/Sili= con/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts index d2cd7ef90e6f..77b7b1b118a6 100644 --- a/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts +++ b/Silicon/Socionext/SynQuacer/DeviceTree/DeveloperBox.dts @@ -44,3 +44,10 @@ "GPIO-K", "GPIO-L", "PEC-PD26", "PEC-PD2= 7", "PEC-PD28", "PEC-PD29", "PEC-PD30", "PEC-PD3= 1"; }; + +&mdio_netsec { + phy_netsec: ethernet-phy@7 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <7>; + }; +}; diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silico= n/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi index 7c3518facb98..8817ec0f150e 100644 --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi @@ -457,25 +457,22 @@ #clock-cells =3D <0>; }; =20 - eth0: netsec@522D0000 { - compatible =3D "socionext,synquacer-netsec"; - reg =3D <0 0x522d0000 0x0 0x10000>, - <0 FixedPcdGet32 (PcdNetsecEepromBase) 0x0 0x10000>; - interrupts =3D ; - clocks =3D <&clk_netsec>; - phy-mode =3D "rgmii"; - max-speed =3D <1000>; - max-frame-size =3D <9000>; - phy-handle =3D <ðphy0>; - dma-coherent; + ethernet@522D0000 { + compatible =3D "socionext,synquacer-netsec"; + reg =3D <0 0x522d0000 0x0 0x10000>, + <0 FixedPcdGet32 (PcdNetsecEepromBase) 0x0 0x10000>; + interrupts =3D ; + clocks =3D <&clk_netsec>; + phy-mode =3D "rgmii"; + max-speed =3D <1000>; + max-frame-size =3D <9000>; + phy-handle =3D <&phy_netsec>; + dma-coherent; =20 + mdio_netsec: mdio { #address-cells =3D <1>; #size-cells =3D <0>; - - ethphy0: ethernet-phy { - compatible =3D "ethernet-phy-ieee802.3-c22"; - reg =3D ; - }; + }; }; =20 smmu: iommu@582c0000 { diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts = b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts index 132fd370a71b..5873e415c246 100644 --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.dts @@ -34,3 +34,10 @@ &sdhci { status =3D "okay"; }; + +&mdio_netsec { + phy_netsec: ethernet-phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <1>; + }; +}; --=20 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel