From nobody Tue Feb 10 05:10:35 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1512550215823561.8958299367621; Wed, 6 Dec 2017 00:50:15 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id AF0B52217CE2D; Wed, 6 Dec 2017 00:45:41 -0800 (PST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 52D782217CE24 for ; Wed, 6 Dec 2017 00:45:38 -0800 (PST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Dec 2017 00:50:10 -0800 Received: from jwang36-mobl2.ccr.corp.intel.com ([10.239.192.49]) by orsmga003.jf.intel.com with ESMTP; 06 Dec 2017 00:50:08 -0800 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.88; helo=mga01.intel.com; envelope-from=jian.j.wang@intel.com; receiver=edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,367,1508828400"; d="scan'208";a="10010769" From: Jian J Wang To: edk2-devel@lists.01.org Date: Wed, 6 Dec 2017 16:49:56 +0800 Message-Id: <20171206085005.14552-3-jian.j.wang@intel.com> X-Mailer: git-send-email 2.15.1.windows.2 In-Reply-To: <20171206085005.14552-1-jian.j.wang@intel.com> References: <20171206085005.14552-1-jian.j.wang@intel.com> Subject: [edk2] [PATCH v4 02/11] UefiCpuPkg/UefiCpuPkg.dec: Add two new PCDs for stack switch X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jiewen Yao , Laszlo Ersek , Eric Dong MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" > v2/v3/v4: > Stack switch is required by Stack Guard feature. Following two PCDs are introduced to simplify the resource allocation for initializing stack switc= h. gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize PcdCpuStackSwitchExceptionList is used to specify which exception will have separate stack for its handler. For Stack Guard feature, #PF must be specified at least. PcdCpuKnownGoodStackSize is used to specify the size of knwon good stack fo= r an exception handler. Cpu driver or other drivers should use this PCD to reser= ve new stack memory for exceptions specified by above PCD. Cc: Eric Dong Cc: Laszlo Ersek Cc: Jiewen Yao Suggested-by: Ayellet Wolman Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang --- UefiCpuPkg/UefiCpuPkg.dec | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index d2965ba14c..83eb6eed40 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -137,6 +137,18 @@ # @Prompt Lock SMM Feature Control MSR. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock|TRUE|BOOLEAN|0x= 3213210B =20 +[PcdsFixedAtBuild] + ## List of exception vectors which need switching stack. + # This PCD will only take into effect if PcdCpuStackGuard is enabled. + # By default exception #DD(8), #PF(14) are supported. + # @Prompt Specify exception vectors which need switching stack. + gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList|{0x08, 0x0E}|VO= ID*|0x30002000 + + ## Size of good stack for an exception. + # This PCD will only take into effect if PcdCpuStackGuard is enabled. + # @Prompt Specify size of good stack of exception which need switching s= tack. + gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize|2048|UINT32|0x30002001 + [PcdsFixedAtBuild, PcdsPatchableInModule] ## This value is the CPU Local APIC base address, which aligns the addre= ss on a 4-KByte boundary. # @Prompt Configure base address of CPU Local APIC --=20 2.15.1.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel