From nobody Thu May 2 23:54:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 151150561370863.59142465355956; Thu, 23 Nov 2017 22:40:13 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id A1DC3220F3C27; Thu, 23 Nov 2017 22:35:53 -0800 (PST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 71E42220F3C25 for ; Thu, 23 Nov 2017 22:35:52 -0800 (PST) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 Nov 2017 22:40:10 -0800 Received: from zwei4-mobl1.ccr.corp.intel.com ([10.239.193.136]) by FMSMGA003.fm.intel.com with ESMTP; 23 Nov 2017 22:40:08 -0800 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.24; helo=mga09.intel.com; envelope-from=david.wei@intel.com; receiver=edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,445,1505804400"; d="scan'208";a="5232833" From: zwei4 To: edk2-devel@lists.01.org Date: Fri, 24 Nov 2017 14:40:06 +0800 Message-Id: <20171124064006.12824-1-david.wei@intel.com> X-Mailer: git-send-email 2.14.1.windows.1 Subject: [edk2] [Patch][edk2-platforms/devel-MinnowBoard3-UDK2017] Minnowboard3 Next Pre-production. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Add code for Minnowboard3 Next pre-production board. Build Command: BuildBios /vs13 /MX /A Broxton Release. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 CC: mike.wu@intel.com CC: mang.guo@intel.com --- BuildBIOS.bat | 3 +- .../MinnowBoard3Next/BoardInitPreMem/BoardInit.c | 1 - Platform/BroxtonPlatformPkg/BuildBxtBios.bat | 17 ++++++- Platform/BroxtonPlatformPkg/BuildIFWI.bat | 59 ++++++++++++------= ---- .../LpssUartSerialDxe/LpssUartSerialDxe.inf | 2 + .../Common/Console/LpssUartSerialDxe/Serial.c | 4 +- .../BaseFspWrapperPlatformLibSample.inf | 1 + .../FspPlatformInfoLibSample.c | 2 +- .../Common/Include/BoardFunctionsPei.h | 7 +++ .../Common/Include/Guid/PlatformInfo.h | 1 + .../Common/Include/Guid/PlatformInfo_Aplk.h | 1 + .../Library/BaseSerialPortLib/BaseSerialPortLib.c | 7 ++- .../BaseSerialPortLib/BaseSerialPortLib.inf | 2 +- .../BaseSerialPortLib/BaseSerialPortLibNoInit.inf | 2 +- .../PlatformPreMemPei/BoardGpiosPreMem.c | 25 +++++++-- .../Common/Tools/Stitch/IFWIStitch_Simple.bat | 9 ++++ .../PlatformDsc/Components.IA32.dsc | 2 + .../BroxtonPlatformPkg/PlatformDsc/Components.dsc | 3 ++ Platform/BroxtonPlatformPkg/PlatformPkg.dec | 7 +++ Platform/BroxtonPlatformPkg/PlatformPkg.fdf | 6 +++ Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec | 3 -- .../PeiDxeSmmPchSerialIoUartLib.inf | 3 -- 22 files changed, 121 insertions(+), 46 deletions(-) diff --git a/BuildBIOS.bat b/BuildBIOS.bat index 7b2394f3b..2cec70f7c 100644 --- a/BuildBIOS.bat +++ b/BuildBIOS.bat @@ -56,7 +56,8 @@ echo /x64 Set Arch to X64 (default: X64) echo /IA32 Set Arch to IA32 (default: X64) echo /A Set FabId to A (default: FAB_B) echo /B Set FabId to B (default: FAB_B) -echo /MN Minnow3 Board (default: MN) +echo /MN MinnowBoard 3(default: MN) +echo /MX MinnowBoard 3 Next echo /BG Benson Glacier Board echo PlatformName: Broxton echo BuildTargets: Release, Debug diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Next/BoardInitPr= eMem/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Next/Board= InitPreMem/BoardInit.c index 7df8fd1c0..a3a0cd857 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Next/BoardInitPreMem/Bo= ardInit.c +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Next/BoardInitPreMem/Bo= ardInit.c @@ -68,7 +68,6 @@ MinnowBoard3NextPreMemInit ( &Instance ); if (!EFI_ERROR (Status)) { - DEBUG ((EFI_D_INFO, "Minnow Board 3 Next Pre Mem Init: Skip\n")); return EFI_SUCCESS; } =20 diff --git a/Platform/BroxtonPlatformPkg/BuildBxtBios.bat b/Platform/Broxto= nPlatformPkg/BuildBxtBios.bat index e08f5d10b..ede285e38 100644 --- a/Platform/BroxtonPlatformPkg/BuildBxtBios.bat +++ b/Platform/BroxtonPlatformPkg/BuildBxtBios.bat @@ -177,7 +177,12 @@ if /i "%~1"=3D=3D"/BG" ( shift goto OptLoop ) - +if /i "%~1"=3D=3D"/MX" ( + set BoardId=3DMX + echo. + shift + goto OptLoop +) if /i "%~1"=3D=3D"/m" ( if defined NUMBER_OF_PROCESSORS ( set /a build_threads=3D%NUMBER_OF_PROCESSORS% @@ -202,6 +207,8 @@ if /i "%~1" =3D=3D "%Minnow_RVP%" ( set BOARD_ID=3DMINNOW3 ) else if %BoardId%=3D=3DBG ( set BOARD_ID=3DBENSONV + ) else if %BoardId%=3D=3DMX ( + set BOARD_ID=3DMINNEXT ) set ENBDT_PF_BUILD=3DTRUE set PLATFORM_NAME=3DBroxtonPlatformPkg @@ -270,6 +277,14 @@ if %BoardId%=3D=3DMN ( ) ) =20 +if %BoardId%=3D=3DMX ( + if %FabId%=3D=3DB ( + echo BOARD_REV =3D B >> Conf\BiosId.env + ) else ( + echo BOARD_REV =3D A >> Conf\BiosId.env + ) +) + :: Set the Build_Type, Version_Major, and Version_Minor environment variab= les find /v "#" Conf\BiosId.env > ver_strings for /f "tokens=3D1,3" %%i in (ver_strings) do set %%i=3D%%j diff --git a/Platform/BroxtonPlatformPkg/BuildIFWI.bat b/Platform/BroxtonPl= atformPkg/BuildIFWI.bat index a27362ae0..556bd4abb 100644 --- a/Platform/BroxtonPlatformPkg/BuildIFWI.bat +++ b/Platform/BroxtonPlatformPkg/BuildIFWI.bat @@ -2,13 +2,13 @@ SetLocal EnableDelayedExpansion EnableExtensions =20 :: Assign initial values -set thisscript=3D%0 +set thisscript=3D%0 set exitCode=3D0 set "Build_Flags=3D " set Arch=3DX64 set SkipUsageFlag=3DFALSE -set FabId=3DB -set BoardId=3DMN +set FabId=3DB +set BoardId=3DMN set buildthread=3D set WORKSPACE=3D%CD% if %WORKSPACE:~-1%=3D=3D\ ( @@ -82,29 +82,36 @@ if /i "%~1"=3D=3D"/FspW" ( goto OptLoop ) if /i "%~1"=3D=3D"/A" ( - set FabId=3DA + set FabId=3DA set Build_Flags=3D%Build_Flags% /A shift goto OptLoop ) if /i "%~1"=3D=3D"/B" ( - set FabId=3DB + set FabId=3DB set Build_Flags=3D%Build_Flags% /B shift goto OptLoop ) -if /i "%~1"=3D=3D"/MN" ( - set BoardId=3DMN - set Build_Flags=3D%Build_Flags% /MN - shift - goto OptLoop -) -if /i "%~1"=3D=3D"/BG" ( - set BoardId=3DBG - set Build_Flags=3D%Build_Flags% /BG - shift - goto OptLoop -) +if /i "%~1"=3D=3D"/MN" ( + set BoardId=3DMN + set Build_Flags=3D%Build_Flags% /MN + shift + goto OptLoop +) +if /i "%~1"=3D=3D"/BG" ( + set BoardId=3DBG + set Build_Flags=3D%Build_Flags% /BG + shift + goto OptLoop +) + +if /i "%~1"=3D=3D"/MX" ( + set BoardId=3DMX + set Build_Flags=3D%Build_Flags% /MX + shift + goto OptLoop +) =20 if /i "%~1"=3D=3D"/m" ( set buildthread=3D/m @@ -117,7 +124,7 @@ if /i "%~1"=3D=3D"/m" ( :: Require 2 input parameters if "%~2"=3D=3D"" ( echo. & echo -- ERROR: Not Enough Arguments Provided - echo -- Please review the Help screen %thisscript% "/?" -- & echo. + echo -- Please review the Help screen %thisscript% "/?" -- & echo. goto exit ) =20 @@ -130,8 +137,8 @@ echo =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D echo Build_IFWI: Calling BIOS build Script... echo. =20 -echo - call BuildBxtBios.bat %buildthread% %Build_Flags% %Platform_Type% %= Build_Target% -call %WORKSPACE%\%PLATFORM_PATH%\BuildBxtBios.bat %buildthread% %Build_Fla= gs% %Platform_Type% %Build_Target% +echo - call BuildBxtBios.bat %buildthread% %Build_Flags% %Platform_Type% %= Build_Target% +call %WORKSPACE%\%PLATFORM_PATH%\BuildBxtBios.bat %buildthread% %Build_Fla= gs% %Platform_Type% %Build_Target% if ErrorLevel 1 ( echo echo -- Error Building BIOS & echo. set exitCode=3D1 @@ -152,7 +159,7 @@ del /f/q ver_strings >nul :: Translate Release Build Type if "%BUILD_TYPE%"=3D=3D"R" set BUILD_TYPE=3DR =20 -set BIOS_Name=3D%BOARD_ID%%BOARD_REV%_%Arch%_%BUILD_TYPE%_%VERSION_MAJOR%_= %VERSION_MINOR% +set BIOS_Name=3D%BOARD_ID%%BOARD_REV%_%Arch%_%BUILD_TYPE%_%VERSION_MAJOR%_= %VERSION_MINOR% =20 :: Start Integration process echo =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D @@ -161,8 +168,8 @@ echo. echo BIOS ROM input: %BIOS_Name% echo. pushd %STITCH_PATH% - echo - call IFWIStitch_Simple.bat %STITCH_PATH%\%BIOS_Name% %FabId% %B= oardId% - call %STITCH_PATH%\IFWIStitch_Simple.bat %STITCH_PATH%\%BIOS_Name% %Fab= Id% %BoardId% + echo - call IFWIStitch_Simple.bat %STITCH_PATH%\%BIOS_Name% %FabId% %B= oardId% + call %STITCH_PATH%\IFWIStitch_Simple.bat %STITCH_PATH%\%BIOS_Name% %Fab= Id% %BoardId% @echo off popd if ErrorLevel 1 ( @@ -171,7 +178,7 @@ if ErrorLevel 1 ( ) echo. echo Build_IFWI is finished. -echo The final IFWI file is located in %WORKSPACE%\%PLATFORM_PATH%\Common\= Tools\Stitch\ +echo The final IFWI file is located in %WORKSPACE%\%PLATFORM_PATH%\Common\= Tools\Stitch\ echo =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 =20 @@ -181,12 +188,12 @@ goto Exit if /i "%SkipUsageFlag%" =3D=3D "TRUE" goto Exit echo Script to build BIOS firmware and stitch the entire IFWI. echo. -echo Usage: %thisscript% [options] ^ ^ +echo Usage: %thisscript% [options] ^ ^ echo. echo. /? Display this help text echo /l Log a copy of the build output to EDK2.log echo /c CleanAll before building -echo /m Set the build thread count to number of processors +echo /m Set the build thread count to number of processors echo /FspW Build FSP and FSP Wrapper echo /x64 Set Arch to X64 (default) echo /vs08 Set compiler to VisualStudio 2008 diff --git a/Platform/BroxtonPlatformPkg/Common/Console/LpssUartSerialDxe/L= pssUartSerialDxe.inf b/Platform/BroxtonPlatformPkg/Common/Console/LpssUartS= erialDxe/LpssUartSerialDxe.inf index 138cf7310..4509ec118 100644 --- a/Platform/BroxtonPlatformPkg/Common/Console/LpssUartSerialDxe/LpssUart= SerialDxe.inf +++ b/Platform/BroxtonPlatformPkg/Common/Console/LpssUartSerialDxe/LpssUart= SerialDxe.inf @@ -45,6 +45,7 @@ IntelFrameworkPkg/IntelFrameworkPkg.dec IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec BroxtonSiPkg/BroxtonSiPkg.dec + BroxtonPlatformPkg/PlatformPkg.dec =20 [LibraryClasses] PcdLib @@ -78,6 +79,7 @@ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits|8 ## CONSUMES gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity|1 ## CONSUMES gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits|1 ## CONSUMES + gPlatformModuleTokenSpaceGuid.PcdSerialIoUartNumber ## CONSUMES =20 [UserExtensions.TianoCore."ExtraFiles"] IsaSerialDxeExtra.uni diff --git a/Platform/BroxtonPlatformPkg/Common/Console/LpssUartSerialDxe/S= erial.c b/Platform/BroxtonPlatformPkg/Common/Console/LpssUartSerialDxe/Seri= al.c index fa6a2667e..c273d78f8 100644 --- a/Platform/BroxtonPlatformPkg/Common/Console/LpssUartSerialDxe/Serial.c +++ b/Platform/BroxtonPlatformPkg/Common/Console/LpssUartSerialDxe/Serial.c @@ -1652,7 +1652,7 @@ IsaSerialWrite ( =20 CharBuffer =3D (UINT8 *) Buffer; =20 - PchSerialIoUartOut (Uart2, CharBuffer, *BufferSize); + PchSerialIoUartOut (PcdGet8 (PcdSerialIoUartNumber), CharBuffer, *Buffer= Size); =20 gBS->RestoreTPL (Tpl); =20 @@ -1696,7 +1696,7 @@ IsaSerialRead ( =20 Tpl =3D gBS->RaiseTPL (TPL_NOTIFY); =20 - *BufferSize =3D PchSerialIoUartIn(Uart2, Buffer, *BufferSize, FALSE); + *BufferSize =3D PchSerialIoUartIn(PcdGet8 (PcdSerialIoUartNumber), Buffe= r, *BufferSize, FALSE); =20 gBS->RestoreTPL (Tpl); =20 diff --git a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspP= latformInfoLibSample/BaseFspWrapperPlatformLibSample.inf b/Platform/Broxton= PlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/BaseFspW= rapperPlatformLibSample.inf index e9b20a452..d12dccd97 100644 --- a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatform= InfoLibSample/BaseFspWrapperPlatformLibSample.inf +++ b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatform= InfoLibSample/BaseFspWrapperPlatformLibSample.inf @@ -88,4 +88,5 @@ gIntelFsp2WrapperTokenSpaceGuid.PcdFspStackSize ## CONSUMES gPlatformModuleTokenSpaceGuid.PcdFlashFvIBBLSize ## CONSUMES gPlatformModuleTokenSpaceGuid.PcdUpdateFspmUpdFunc + gPlatformModuleTokenSpaceGuid.PcdSerialIoUartNumber =20 diff --git a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspP= latformInfoLibSample/FspPlatformInfoLibSample.c b/Platform/BroxtonPlatformP= kg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/FspPlatformInfoLi= bSample.c index 5eae2165d..d085f265b 100644 --- a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatform= InfoLibSample/FspPlatformInfoLibSample.c +++ b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatform= InfoLibSample/FspPlatformInfoLibSample.c @@ -126,7 +126,7 @@ UpdateFspUpdConfigs ( FspmUpd =3D (FSPM_UPD *)FspUpdRgnPtr; DEBUG ((DEBUG_INFO, "GetFspFspmUpdDataPointer - 0x%x\n", FspmUpd)); =20 - FspmUpd->FspmConfig.SerialDebugPortDevice =3D 2; + FspmUpd->FspmConfig.SerialDebugPortDevice =3D PcdGet8(PcdSerialIoUar= tNumber); FspmUpd->FspmConfig.SerialDebugPortType =3D 2;// Skip the serial p= ort init since we already did it FspmUpd->FspmConfig.SerialDebugPortStrideSize =3D 2; FspmUpd->FspmConfig.SerialDebugPortAddress =3D 0; diff --git a/Platform/BroxtonPlatformPkg/Common/Include/BoardFunctionsPei.h= b/Platform/BroxtonPlatformPkg/Common/Include/BoardFunctionsPei.h index 366b275e3..92e10b3ba 100644 --- a/Platform/BroxtonPlatformPkg/Common/Include/BoardFunctionsPei.h +++ b/Platform/BroxtonPlatformPkg/Common/Include/BoardFunctionsPei.h @@ -36,6 +36,7 @@ #include #include #include +#include =20 typedef EFI_STATUS @@ -55,5 +56,11 @@ EFI_STATUS IN UINT8 BoardId ); =20 +typedef +EFI_STATUS +(EFIAPI *UPDATE_PCIE_CONFIG_FUNC) ( + IN SC_PCIE_PREMEM_CONFIG *PciePreMemConfig + ); + #endif =20 diff --git a/Platform/BroxtonPlatformPkg/Common/Include/Guid/PlatformInfo.h= b/Platform/BroxtonPlatformPkg/Common/Include/Guid/PlatformInfo.h index 455c6833e..b2fbd0bd2 100644 --- a/Platform/BroxtonPlatformPkg/Common/Include/Guid/PlatformInfo.h +++ b/Platform/BroxtonPlatformPkg/Common/Include/Guid/PlatformInfo.h @@ -165,6 +165,7 @@ typedef enum { BOARD_ID_LFH_CRB =3D 0x07, // Leaf Hill BOARD_ID_MINNOW =3D 0x0F, // Minnow Board BOARD_ID_BENSON =3D 0x0C, // Benson Glacier + BOARD_ID_MINNOW_NEXT =3D 0x03, // Minnow Board Next BOARD_ID_APL_UNKNOWN =3D 0xFF } APL_BOARD_ID_LIST; =20 diff --git a/Platform/BroxtonPlatformPkg/Common/Include/Guid/PlatformInfo_A= plk.h b/Platform/BroxtonPlatformPkg/Common/Include/Guid/PlatformInfo_Aplk.h index b29bd62e8..0bf9fb6eb 100644 --- a/Platform/BroxtonPlatformPkg/Common/Include/Guid/PlatformInfo_Aplk.h +++ b/Platform/BroxtonPlatformPkg/Common/Include/Guid/PlatformInfo_Aplk.h @@ -150,6 +150,7 @@ typedef struct { typedef enum { BOARD_ID_LFH_CRB =3D 0x07, // Leaf Hill BOARD_ID_MINNOW =3D 0x0F, // Minnow Board + BOARD_ID_MINNOW_NEXT =3D 0x03, // Minnow Board Next BOARD_ID_BENSON =3D 0x0C, // Benson Glacier BOARD_ID_APL_UNKNOWN =3D 0xFF } APL_BOARD_ID_LIST; diff --git a/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/B= aseSerialPortLib.c b/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialP= ortLib/BaseSerialPortLib.c index 2c63f9878..7770619f9 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSeri= alPortLib.c +++ b/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSeri= alPortLib.c @@ -171,8 +171,11 @@ SerialPortInitialize ( VOID ) { - - PchSerialIoUartInit (PcdGet8 (PcdSerialIoUartNumber), TRUE, 115200, 3, F= ALSE); + // + //PchSerialIoUartInit (PcdGet8 (PcdSerialIoUartNumber), TRUE, 115200, 3,= FALSE); + // + PchSerialIoUartInit (0, TRUE, 115200, 3, FALSE); + PchSerialIoUartInit (2, TRUE, 115200, 3, FALSE); =20 return RETURN_SUCCESS; } diff --git a/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/B= aseSerialPortLib.inf b/Platform/BroxtonPlatformPkg/Common/Library/BaseSeria= lPortLib/BaseSerialPortLib.inf index 5ea0c4657..d98646227 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSeri= alPortLib.inf +++ b/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSeri= alPortLib.inf @@ -54,7 +54,7 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase gClientCommonModuleTokenSpaceGuid.PcdStatusCodeFlagsCmosIndex - gBxtRefCodePkgTokenSpaceGuid.PcdSerialIoUartNumber + gPlatformModuleTokenSpaceGuid.PcdSerialIoUartNumber =20 [Sources] BaseSerialPortLib.c diff --git a/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/B= aseSerialPortLibNoInit.inf b/Platform/BroxtonPlatformPkg/Common/Library/Bas= eSerialPortLib/BaseSerialPortLibNoInit.inf index 6a9cf86b2..38964c4a3 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSeri= alPortLibNoInit.inf +++ b/Platform/BroxtonPlatformPkg/Common/Library/BaseSerialPortLib/BaseSeri= alPortLibNoInit.inf @@ -54,7 +54,7 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase gClientCommonModuleTokenSpaceGuid.PcdStatusCodeFlagsCmosIndex - gBxtRefCodePkgTokenSpaceGuid.PcdSerialIoUartNumber + gPlatformModuleTokenSpaceGuid.PcdSerialIoUartNumber =20 [Sources] BaseSerialPortLibNoInit.c diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPr= eMemPei/BoardGpiosPreMem.c b/Platform/BroxtonPlatformPkg/Common/PlatformSet= tings/PlatformPreMemPei/BoardGpiosPreMem.c index 7116ba19b..b95e907b6 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPreMemPei= /BoardGpiosPreMem.c +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPreMemPei= /BoardGpiosPreMem.c @@ -70,6 +70,17 @@ BXT_GPIO_PAD_INIT IshI2cGpio[] =3D BXT_GPIO_PAD_CONF(L"GPIO_137 LPSS_I2C6_SCL", M2 , NA , NA , = NA , NA , Wake_Disabled, P_1K_H, NA , NA, IOS_Masked, = EnPu, GPIO_PADBAR+0x0068, WEST), }; =20 +// +// Turn on an LED so we know there is life in this board +// +BXT_GPIO_PAD_INIT SignsOfLifeGpio[] =3D +{ + // + // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,G= PO_STATE,INT_Trigger, Wake_Enabled ,Term_H_L,Inverted, GPI_ROUT, IOSstae, = IOSTerm, MMIO_Offset, Community + // + BXT_GPIO_PAD_CONF(L"GPIO_26", M0 , GPO , GPIO_D,= LO , NA , Wake_Disabled, P_NONE , NA , NA, NA ,D= isPuPd, GPIO_PADBAR+0x00D0, NORTH), // MB3N - SATA_LED +}; + // // North Peak GPIO settings before memory initialization, as it needs to b= e enabled before memory init // @@ -162,8 +173,14 @@ BXT_GPIO_PAD_INIT UartGpio [] =3D // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,= GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L, Inverted,GPI_ROUT,IOSstae, IO= STerm, MMIO_Offset, Community // - BXT_GPIO_PAD_CONF(L"GPIO_46 LPSS_UART2_RXD", M1 , NA , NA ,= NA , NA , Wake_Disabled, P_20K_H, NA , NA, NA , = NA, GPIO_PADBAR+0x0170, NORTH), - BXT_GPIO_PAD_CONF(L"GPIO_47 LPSS_UART2_TXD", M1 , NA , NA ,= NA , NA , Wake_Disabled, P_20K_H, NA , NA, NA , = NA, GPIO_PADBAR+0x0178, NORTH), + BXT_GPIO_PAD_CONF(L"GPIO_38 LPSS_UART0_RXD", M1 , NA , NA ,= NA , NA , Wake_Disabled, P_20K_H, NA , NA, NA , = NA, GPIO_PADBAR+0x0130, NORTH), // SOC_UART1_TXD + BXT_GPIO_PAD_CONF(L"GPIO_39 LPSS_UART0_TXD", M1 , NA , NA ,= NA , NA , Wake_Disabled, P_20K_H, NA , NA, NA , = NA, GPIO_PADBAR+0x0138, NORTH), // SOC_UART1_RXD + BXT_GPIO_PAD_CONF(L"GPIO_42 LPSS_UART1_RXD", M1 , NA , NA ,= NA , NA , Wake_Disabled, P_20K_H, NA , NA, NA , = NA, GPIO_PADBAR+0x0150, NORTH), // SOC_UART1_TXD + BXT_GPIO_PAD_CONF(L"GPIO_43 LPSS_UART1_TXD", M1 , NA , NA ,= NA , NA , Wake_Disabled, P_20K_H, NA , NA, NA , = NA, GPIO_PADBAR+0x0158, NORTH), // SOC_UART1_RXD + BXT_GPIO_PAD_CONF(L"GPIO_46 LPSS_UART2_RXD", M1 , NA , NA ,= NA , NA , Wake_Disabled, P_20K_H, NA , NA, NA , = NA, GPIO_PADBAR+0x0170, NORTH), // SOC_UART2_TXD + BXT_GPIO_PAD_CONF(L"GPIO_47 LPSS_UART2_TXD", M1 , NA , NA ,= NA , NA , Wake_Disabled, P_20K_H, NA , NA, NA , = NA, GPIO_PADBAR+0x0178, NORTH), // SOC_UART2_RXD + BXT_GPIO_PAD_CONF(L"GPIO_112 GP_SSP_1_FS0", M2 , NA , NA ,= NA , NA , Wake_Disabled, P_20K_H, NA , NA, NA , = NA, GPIO_PADBAR+0x0218, NORTHWEST), // SOC_UART3_RXD + BXT_GPIO_PAD_CONF(L"GPIO_113 GP_SSP_1_FS1", M2 , NA , NA ,= NA , NA , Wake_Disabled, P_20K_H, NA , NA, NA , = NA, GPIO_PADBAR+0x0220, NORTHWEST), // SOC_UART3_TXD }; =20 =20 @@ -214,16 +231,16 @@ MultiPlatformGpioProgramPreMem ( ) { // PAD programming + GpioPadConfigTable (sizeof (SignsOfLifeGpio) / sizeof (SignsOfLifeGpio[0= ]), SignsOfLifeGpio); GpioPadConfigTable (sizeof (IshI2cGpio) / sizeof (IshI2cGpio[0]), IshI2c= Gpio); GpioPadConfigTable (sizeof (NorthPeakGpio) / sizeof (NorthPeakGpio[0]), = NorthPeakGpio); GpioPadConfigTable (sizeof (LpssSpi1Gpio) / sizeof (LpssSpi1Gpio[0]), Lp= ssSpi1Gpio); =20 GpioPadConfigTable (sizeof (PcieGpio) / sizeof (PcieGpio[0]), PcieGpio); *StartTimerTick =3D GetPerformanceCounter (); - GpioPadConfigTable (sizeof (SataGpio) / sizeof (SataGpio[0]), SataGpio); GpioPadConfigTable (sizeof (LpcGpio) / sizeof (LpcGpio[0]), LpcGpio); GpioPadConfigTable (sizeof (SmbusGpio) / sizeof (SmbusGpio[0]), SmbusGpi= o); - GpioPadConfigTable (sizeof (UartGpio) / sizeof (UartGpio[0]), UartGpio); + GpioPadConfigTable (sizeof (UartGpio)/sizeof (UartGpio[0]), UartGpio); =20 return EFI_SUCCESS; } diff --git a/Platform/BroxtonPlatformPkg/Common/Tools/Stitch/IFWIStitch_Sim= ple.bat b/Platform/BroxtonPlatformPkg/Common/Tools/Stitch/IFWIStitch_Simple= .bat index 42375ce87..134807ead 100644 --- a/Platform/BroxtonPlatformPkg/Common/Tools/Stitch/IFWIStitch_Simple.bat +++ b/Platform/BroxtonPlatformPkg/Common/Tools/Stitch/IFWIStitch_Simple.bat @@ -48,6 +48,10 @@ if /i "%~3"=3D=3D"BG" ( set BoardId=3DBG ) =20 +if /i "%~3"=3D=3D"MX" ( + set BoardId=3DMX +) + :OptLoop1 =20 if /i "%~1"=3D=3D"/FspW" ( @@ -154,6 +158,11 @@ if %BoardId%=3D=3DBG ( copy /y /b ..\..\Binaries\IFWI\MinnowBoard3\FAB_A\SpiChunk3.bin= . copy /y /b SpiChunk1.bin+.\BIOS_COMPONENTS\IBBL.Fv+.\BIOS_COMPO= NENTS\IBB.Fv+SpiChunk2.bin+.\BIOS_COMPONENTS\OBB.Fv+.\BIOS_COMPONENTS\NvSto= rage.Fv+SpiChunk3.bin spi_out.bin ) +) else if %BoardId%=3D=3DMX ( + copy /y /b ..\..\Binaries\IFWI\MinnowBoard3Next\FAB_A\SpiChunk1= .bin . + copy /y /b ..\..\Binaries\IFWI\MinnowBoard3Next\FAB_A\SpiChunk2= .bin . + copy /y /b ..\..\Binaries\IFWI\MinnowBoard3Next\FAB_A\SpiChunk3= .bin . + copy /y /b SpiChunk1.bin+.\BIOS_COMPONENTS\IBBL.Fv+.\BIOS_COMPO= NENTS\IBB.Fv+SpiChunk2.bin+.\BIOS_COMPONENTS\OBB.Fv+.\BIOS_COMPONENTS\NvSto= rage.Fv+SpiChunk3.bin spi_out.bin ) move /y spi_out.bin %BIOS_ID%.bin >> Stitching.log =20 diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/Components.IA32.dsc b/= Platform/BroxtonPlatformPkg/PlatformDsc/Components.IA32.dsc index cdbba2aff..2bdc3d09d 100644 --- a/Platform/BroxtonPlatformPkg/PlatformDsc/Components.IA32.dsc +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/Components.IA32.dsc @@ -81,6 +81,7 @@ NULL|$(PLATFORM_NAME)/Board/MinnowBoard3/BoardInitPreMem/BoardInitPr= eMem.inf NULL|$(PLATFORM_NAME)/Board/LeafHill/BoardInitPreMem/BoardInitPreMem= .inf NULL|$(PLATFORM_NAME)/Board/BensonGlacier/BoardInitPreMem/BoardInitP= reMem.inf + NULL|$(PLATFORM_NAME)/Board/MinnowBoard3Next/BoardInitPreMem/BoardIn= itPreMem.inf BaseCryptLib|CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf CpuPolicyLib|$(PLATFORM_SI_PACKAGE)/Cpu/Library/PeiCpuPolicyLibPreMe= m/PeiCpuPolicyLibPreMem.inf @@ -116,6 +117,7 @@ NULL|$(PLATFORM_NAME)/Board/MinnowBoard3/BoardInitPostMem/BoardInit= PostMem.inf NULL|$(PLATFORM_NAME)/Board/LeafHill/BoardInitPostMem/BoardInitPost= Mem.inf NULL|$(PLATFORM_NAME)/Board/BensonGlacier/BoardInitPostMem/BoardIni= tPostMem.inf + NULL|$(PLATFORM_NAME)/Board/MinnowBoard3Next/BoardInitPostMem/Board= InitPostMem.inf I2cLibPei|$(PLATFORM_SI_PACKAGE)/SouthCluster/Library/I2CLibPei/I2C= LibPei.inf gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x803805c6 diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc b/Platf= orm/BroxtonPlatformPkg/PlatformDsc/Components.dsc index 94c8fbb7b..d56911a0c 100644 --- a/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc @@ -26,10 +26,12 @@ !if $(LZMA_ENABLE) =3D=3D TRUE NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCus= tomDecompressLib.inf !endif + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf=20 } MdeModulePkg/Universal/PCD/Dxe/Pcd.inf { PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf=20 } =20 !if $(SOURCE_DEBUG_ENABLE) =3D=3D TRUE @@ -175,6 +177,7 @@ NULL|$(PLATFORM_NAME)/Board/MinnowBoard3/BoardInitDxe/BoardInitDxe.i= nf NULL|$(PLATFORM_NAME)/Board/LeafHill/BoardInitDxe/BoardInitDxe.inf NULL|$(PLATFORM_NAME)/Board/BensonGlacier/BoardInitDxe/BoardInitDxe.= inf + NULL|$(PLATFORM_NAME)/Board/MinnowBoard3Next/BoardInitDxe/BoardInitD= xe.inf } =20 !if $(DATAHUB_ENABLE) =3D=3D TRUE diff --git a/Platform/BroxtonPlatformPkg/PlatformPkg.dec b/Platform/Broxton= PlatformPkg/PlatformPkg.dec index 1de762f79..7c189a92f 100644 --- a/Platform/BroxtonPlatformPkg/PlatformPkg.dec +++ b/Platform/BroxtonPlatformPkg/PlatformPkg.dec @@ -61,6 +61,7 @@ gPeiLeafHillVbtGuid =3D { 0x6ae80680, 0x5e3f, 0x4e63= , { 0xa5, 0xf5, 0x78, 0xe5, 0x21, 0x4f, 0x13, 0xfe } } gPeiMinnowBoard3VbtGuid =3D { 0xE08CA6D5, 0x8D02, 0x43ae= , { 0xAB, 0xB1, 0x95, 0x2C, 0xC7, 0x87, 0xC9, 0x33 } } gPeiBensonGlacierVbtGuid =3D { 0xbfde308e, 0x2d5a, 0x4ca7= , { 0xaa, 0x76, 0x19, 0x93, 0x8a, 0xaa, 0xe4, 0xda } } + gPeiMinnow3NextVbtGuid =3D { 0x1f9cbb42, 0x107e, 0x46a4= , { 0xa2, 0xcb, 0x92, 0xf5, 0x86, 0xf9, 0xfb, 0x31 } } gPeiLogoGuid =3D { 0x7BB28B99, 0x61BB, 0x11d5= , { 0x9A, 0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D } } gPlatformEmmcHs400TuningInfoGuid =3D { 0xb0ae3e81, 0xc6b0, 0x4d35= , { 0xad, 0x51, 0x91, 0x17, 0xe0, 0x65, 0x1e, 0xa3 } } gEfiTraceHubDebugLibIa32Guid =3D { 0x23a3e7ba, 0x75d1, 0x4cb9= , { 0x9c, 0x8f, 0x56, 0xfa, 0x4e, 0x48, 0xd9, 0x9e } } @@ -192,6 +193,10 @@ gPlatformModuleTokenSpaceGuid.PcdMaxPkgCState|0x00|UINT8|0x80000018 ## This PCD used to select TI3100 Audio Codec gPlatformModuleTokenSpaceGuid.PcdTi3100AudioCodecEnable|FALSE|BOOLEAN|0x= 80000019 + ## + gPlatformModuleTokenSpaceGuid.PcdUpdatePcieConfigFunc|2|UINT64|0x8000001A + ## SerialIo Uart Configuration + #gPlatformModuleTokenSpaceGuid.PcdSerialIoUartNumber|2|UINT8|0x8000001B ## MemoryCheck value for checking memory before boot OS. ## To save the boot performance, the default MemoryCheck is set to 0. gClientCommonModuleTokenSpaceGuid.PcdPlatformMemoryCheck|0|UINT8|0x40000= 005 @@ -332,3 +337,5 @@ ## Specifies maximum number of PPIs provided by SecCore. # @Prompt Maximum number of PPIs provided by SecCore. gPlatformModuleTokenSpaceGuid.PcdSecCoreMaxPpiSupported|0x6|UINT32|0x100= 01010 + ## SerialIo Uart Configuration + gPlatformModuleTokenSpaceGuid.PcdSerialIoUartNumber|2|UINT8|0x10001011 diff --git a/Platform/BroxtonPlatformPkg/PlatformPkg.fdf b/Platform/Broxton= PlatformPkg/PlatformPkg.fdf index 216cdea6b..c07b65ee5 100644 --- a/Platform/BroxtonPlatformPkg/PlatformPkg.fdf +++ b/Platform/BroxtonPlatformPkg/PlatformPkg.fdf @@ -259,6 +259,12 @@ SECTION RAW =3D $(PLATFORM_NAME)/Board/MinnowBoard3/Vbt/VbtBxtMipi.bin SECTION UI =3D "IntelGopVbt1" } + =20 + # VBT For Minnowboard 3 Next (File Guid is gPeiMinnow3NextVbtGuid) + FILE FREEFORM =3D 1F9CBB42-107E-46A4-A2CB-92F586F9FB31 { + SECTION RAW =3D $(PLATFORM_NAME)/Board/MinnowBoard3Next/Vbt/VbtBxtMipi= .bin + SECTION UI =3D "IntelGopVbt1" + } =20 # VBT For Benson Glacier (File Guid is gPeiBensonGlacierVbtGuid) FILE FREEFORM =3D BFDE308E-2D5A-4CA7-AA76-19938AAAE4DA { diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec b/Silicon/Bro= xtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec index f17a3e0e5..c06b4e131 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec @@ -338,9 +338,6 @@ gBxtRefCodePkgTokenSpaceGuid.PcdMmcSdMultiBlockSupport|TRUE|BOOLEAN|0x13 =20 [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] - ## - ## SerialIo Uart Configuration - gBxtRefCodePkgTokenSpaceGuid.PcdSerialIoUartNumber|2|UINT8|0x00100002 gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|"INTEL "|VOID*|0x3000= 1034 gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x20202020324B44= 45|UINT64|0x30001035 gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision|0x00000002|UINT= 32|0x30001036 diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/PeiDxeSmm= PchSerialIoUartLib/PeiDxeSmmPchSerialIoUartLib.inf b/Silicon/BroxtonSoC/Bro= xtonSiPkg/SouthCluster/Library/PeiDxeSmmPchSerialIoUartLib/PeiDxeSmmPchSeri= alIoUartLib.inf index 18ae56799..c19cb9eb9 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/PeiDxeSmmPchSeri= alIoUartLib/PeiDxeSmmPchSerialIoUartLib.inf +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/PeiDxeSmmPchSeri= alIoUartLib/PeiDxeSmmPchSerialIoUartLib.inf @@ -35,6 +35,3 @@ MmPciLib PchSerialIoLib TimerLib - -[Pcd] - gBxtRefCodePkgTokenSpaceGuid.PcdSerialIoUartNumber --=20 2.14.1.windows.1 _______________________________________________ edk2-devel mailing list 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