From nobody Sat Nov 2 08:24:01 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1494483379138914.6595548064308; Wed, 10 May 2017 23:16:19 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id A8B7C21A13489; Wed, 10 May 2017 23:16:16 -0700 (PDT) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A32CC21A16E3A for ; Wed, 10 May 2017 23:16:15 -0700 (PDT) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga105.jf.intel.com with ESMTP; 10 May 2017 23:16:15 -0700 Received: from zwei4-mobl.ccr.corp.intel.com ([10.239.197.159]) by orsmga004.jf.intel.com with ESMTP; 10 May 2017 23:15:59 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,322,1491289200"; d="scan'208";a="86306388" From: zwei4 To: edk2-devel@lists.01.org Date: Thu, 11 May 2017 14:15:55 +0800 Message-Id: <20170511061555.27812-1-david.wei@intel.com> X-Mailer: git-send-email 2.11.0.windows.1 Subject: [edk2] [Patch][edk2-platforms/devel-MinnowBoard3] Fix some GCC build errors. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 --- .../Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c | 5 +- .../Common/Acpi/AcpiPlatformDxe/AcpiPlatform.h | 9 +- .../Acpi/AcpiPlatformDxe/AcpiPlatformHooks.c | 7 +- .../Acpi/AcpiTablesPCAT/DptfAcpiTable/Dptf.asl | 6 +- .../Common/Acpi/AcpiTablesPCAT/Facp/Facp.aslc | 4 +- .../Common/Acpi/AcpiTablesPCAT/Lpit/Lpit.aslc | 51 ++-- .../Common/Acpi/AcpiTablesPCAT/Mcfg/Mcfg.aslc | 72 +++--- .../Common/Acpi/AcpiTablesPCAT/ScAudio.asl | 26 +- .../Common/Acpi/AcpiTablesPCAT/Wsmt/Wsmt.act | 10 +- .../Common/Acpi/UsbTypeCDxe/UsbTypeC.c | 7 +- .../PlatformGopPolicyDxe/PlatformGopPolicy.c | 8 +- .../SmramSaveInfoHandlerSmm.c | 4 +- .../MiscNumberOfInstallableLanguagesFunction.c | 2 +- .../Smbios/SmBiosMiscDxe/MiscOemType0x94Function.c | 6 +- .../Common/Features/UsbDeviceDxe/UsbDeviceDxe.c | 2 +- .../Common/Features/UsbDeviceDxe/UsbFuncIo.c | 4 +- .../Common/Features/UsbDeviceDxe/XdciDWC.c | 7 +- .../Common/Features/UsbDeviceDxe/XdciInterface.h | 2 +- .../FspPlatformInfoLibSample.c | 5 +- .../Library/PeiFspHobProcessLib/FspHobProcessLib.c | 13 +- .../Common/Include/Guid/SetupVariable.h | 15 +- .../Library/DxePolicyUpdateLib/DxeSaPolicyUpdate.c | 4 +- .../PeiPolicyUpdateLib/PeiCpuPolicyUpdate.c | 4 +- .../Common/Library/PlatformBdsLib/BdsPlatform.c | 6 +- .../Common/Library/PlatformBdsLib/BdsPlatform.h | 31 ++- .../Common/Library/PlatformBdsLib/PlatformData.c | 30 ++- .../Library/PlatformSecLib/Ia32/Chipset_S.inc | 29 +-- .../Common/Library/PlatformSecLib/Ia32/Ia32_S.inc | 27 +- .../Library/PlatformSecLib/Ia32/Platform_S.inc | 28 +-- .../Library/PlatformSecLib/Ia32/SecCore_S.inc | 28 +-- .../Common/Library/PlatformSecLib/Ia32/SecEntry.S | 8 +- .../Common/PlatformSettings/PlatformDxe/Platform.c | 18 +- .../PlatformSettings/PlatformDxe/PlatformDxe.h | 4 +- .../PlatformPostMemPei/PlatformInit.c | 8 +- .../PlatformPreMemPei/PlatformInitPreMem.c | 4 +- .../PlatformSetupDxe/PlatformSetupDxe.c | 2 +- .../PlatformSetupDxe/SetupInfoRecords.c | 2 +- .../PlatformSettings/PlatformSetupDxe/Vfr.vfr | 6 +- .../Common/PlatformSmm/Platform.c | 19 +- .../Common/PnpDxe/AunitBiosSettings.h | 230 ++++++++--------- .../Common/PnpDxe/BunitBiosSettings.h | 206 +++++++-------- .../Common/PnpDxe/TunitBiosSettings.h | 278 ++++++++++-------= ---- .../FspmWrapperPeim/FspmWrapperPeim.inf | 8 +- .../FspsWrapperPeim/FspsWrapperPeim.inf | 8 +- .../MemoryTest/NullMemoryTestDxe/NullMemoryTest.c | 2 +- 45 files changed, 638 insertions(+), 617 deletions(-) diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPl= atform.c b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlat= form.c index 854bd48a2..b5cd9f7fe 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c @@ -1,7 +1,7 @@ /** @file ACPI Platform Driver. =20 - Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -64,6 +64,7 @@ CHAR16 gACPIOSFRModelStringVariableName[] =3D ACPI_OS= FR_MODEL_STRING_VARIABLE_ CHAR16 gACPIOSFRRefDataBlockVariableName[] =3D ACPI_OSFR_REF_DATA_BLOCK= _VARIABLE_NAME; CHAR16 gACPIOSFRMfgStringVariableName[] =3D ACPI_OSFR_MFG_STRING_VAR= IABLE_NAME; =20 +EFI_GLOBAL_NVS_AREA_PROTOCOL mGlobalNvsArea; EFI_CPU_IO2_PROTOCOL *mCpuIo; =20 BOOLEAN mFirstNotify; @@ -280,7 +281,7 @@ InstallAcpiTableForPlatformSsdt ( &gPlatformSsdtImageGuid, EFI_SECTION_RAW, Instance, - &CurrentTable, + (VOID **)&CurrentTable, (UINTN *) &Size, &FvStatus ); diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPl= atform.h b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlat= form.h index 727cf0b56..97e9daaab 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.h +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.h @@ -3,7 +3,7 @@ this driver are defined in the Tiano ACPI External Product Specification, revision 0.3.6. =20 - Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -53,7 +53,12 @@ // // Global variables // -EFI_GLOBAL_NVS_AREA_PROTOCOL mGlobalNvsArea; +extern EFI_GLOBAL_NVS_AREA_PROTOCOL mGlobalNvsArea; + +// +// Global for the CPU I/O Protocol that is consumed by this driver +// +extern EFI_CPU_IO2_PROTOCOL *mCpuIo; =20 // // ACPI table information used to initialize tables. diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPl= atformHooks.c b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/Acp= iPlatformHooks.c index 7ad46fe1a..ff7410c71 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatformH= ooks.c +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatformH= ooks.c @@ -1,7 +1,7 @@ /** @file ACPI Platform Driver Hooks. =20 - Copyright (c) 1996 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 1996 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -33,11 +33,6 @@ extern SYSTEM_CONFIGURATION mSystemConfigura= tion; ENHANCED_SPEEDSTEP_PROTOCOL *mEistProtocol =3D NULL; =20 =20 -// -// Global for the CPU I/O Protocol that is consumed by this driver -// -EFI_CPU_IO2_PROTOCOL *mCpuIo; - EFI_CPU_ID_MAP mCpuApicIdAcpiIdMapTable[MAX_CPU_NUM]; =20 EFI_STATUS diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/DptfAcp= iTable/Dptf.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Dp= tfAcpiTable/Dptf.asl index 6cedff40e..27308d60c 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/DptfAcpiTable/= Dptf.asl +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/DptfAcpiTable/= Dptf.asl @@ -1,5 +1,5 @@ /** @file - Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -572,7 +572,7 @@ Scope(\_SB) // // CPU Participant // -Include("TCPUParticipant.asl") +Include("TcpuParticipant.asl") =20 Include("DPLYParticipant.asl") =20 @@ -589,7 +589,7 @@ Include("TFN1Participant.asl") // // Participants using device sensors. // -Include("TPWRParticipant.asl") +Include("TPwrParticipant.asl") =20 // // Participants using motherboard thermistors. diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Facp/Fa= cp.aslc b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Facp/Facp.= aslc index 3123cd16e..cbc04b65b 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Facp/Facp.aslc +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Facp/Facp.aslc @@ -1,7 +1,7 @@ /** @file Fixed ACPI Description Table =20 - Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -136,7 +136,7 @@ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE FACP =3D { // X_General Purpose Event 0 Register Block // EFI_ACPI_5_0_SYSTEM_IO, - 0x100, + 0x80, 0x00, EFI_ACPI_5_0_BYTE, GPE0_BLK, diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Lpit/Lp= it.aslc b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Lpit/Lpit.= aslc index c018f57ca..286271505 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Lpit/Lpit.aslc +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Lpit/Lpit.aslc @@ -131,32 +131,31 @@ typedef struct _EFI_ACPI_LOW_POWER_IDLE_TABLE { #pragma pack() =20 EFI_ACPI_LOW_POWER_IDLE_TABLE Lpit =3D { - - // - // Header - // - - - EFI_ACPI_LOW_POWER_IDLE_TABLE_SIGNATURE, - sizeof (EFI_ACPI_LOW_POWER_IDLE_TABLE), - EFI_ACPI_LOW_POWER_IDLE_TABLE_REVISION , - - // - // Checksum will be updated at runtime - // - 0x00, - - // - // It is expected that these values will be updated at runtime - // - ' ', ' ', ' ', ' ', ' ', ' ', - - 0, - EFI_ACPI_OEM_LPIT_REVISION, - 0, - 0, - - + { + // + // Header + // + + + EFI_ACPI_LOW_POWER_IDLE_TABLE_SIGNATURE, + sizeof (EFI_ACPI_LOW_POWER_IDLE_TABLE), + EFI_ACPI_LOW_POWER_IDLE_TABLE_REVISION , + + // + // Checksum will be updated at runtime + // + 0x00, + + // + // It is expected that these values will be updated at runtime + // + {' ', ' ', ' ', ' ', ' ', ' '}, + + 0, + EFI_ACPI_OEM_LPIT_REVISION, + 0, + 0 + }, =20 // // Descriptor diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Mcfg/Mc= fg.aslc b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Mcfg/Mcfg.= aslc index e3120e83f..b8fb8cae8 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Mcfg/Mcfg.aslc +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Mcfg/Mcfg.aslc @@ -1,7 +1,7 @@ /** @file ACPI Memory mapped configuration space base address Description Table =20 - Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -22,31 +22,37 @@ // MCFG Table definition // EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE MCFG =3D { - EFI_ACPI_3_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE, - sizeof (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE), - EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_REVISION, - // - // Checksum will be updated at runtime - // - 0x00, - // - // It is expected that these values will be programmed at runtime - // - ' ', - ' ', - ' ', - ' ', - ' ', - ' ', - - 0, - EFI_ACPI_OEM_MCFG_REVISION, - 0, - 0, - // - // Beginning of MCFG specific fields - // - EFI_ACPI_RESERVED_QWORD, + { +=20 + { + EFI_ACPI_3_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATUR= E, + sizeof (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE), + EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_REVISION, + // + // Checksum will be updated at runtime + // + 0x00, + // + // It is expected that these values will be programmed at runtime + // + { + ' ', + ' ', + ' ', + ' ', + ' ', + ' ', + }, + 0, + EFI_ACPI_OEM_MCFG_REVISION, + 0, + 0, + }, + // + // Beginning of MCFG specific fields + // + EFI_ACPI_RESERVED_QWORD + }, // // Sample Memory Mapped Configuration Space Base Address Structure // @@ -58,11 +64,15 @@ EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE= MCFG =3D { // // Memory Mapped Configuration Space Base Address Structure for BNB // - 0x0, // Base Address, will be updated by AcpiPlatfo= rm - 0x0, // PCI Segment Group Number - 0x0, // Start Bus Number - PLATFORM_MAX_BUS_NUM, // End Bus Number - EFI_ACPI_RESERVED_DWORD, // Reserved + { + { + 0x0, // Base Address, will be updated by AcpiPla= tform + 0x0, // PCI Segment Group Number + 0x0, // Start Bus Number + PLATFORM_MAX_BUS_NUM, // End Bus Number + EFI_ACPI_RESERVED_DWORD + } // Reserved + } }; =20 VOID* diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/ScAudio= .asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/ScAudio.asl index 80da490ce..d16bc4e95 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/ScAudio.asl +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/ScAudio.asl @@ -1,5 +1,5 @@ /** @file - Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -161,73 +161,73 @@ // PP Module Waves (module XAMAXXAU) // Check PP module with GUID B489C2DE-0F96-42E1-8A2D-C25B5091E= E49 If (LEqual(Arg3, ToUUID ("B489C2DE-0F96-42E1-8A2D-C25B5091EE49= "))) { - Return(And(ADPM, BIT0)) // ADPM[BIT0] set - supported (retur= n true) + Return(And(ADPM, 0x01)) // ADPM[BIT0] set - supported (retur= n true) } =20 // PP Module DTS (module PRMSND) // Check PP module with GUID E1284052-8664-4FE4-A353-3878F7270= 4C3 If (LEqual(Arg3, ToUUID ("E1284052-8664-4FE4-A353-3878F72704C3= "))) { - Return(And(ADPM, BIT1)) // ADPM[BIT1] set - supported (retur= n true) + Return(And(ADPM, 0x02)) // ADPM[BIT1] set - supported (retur= n true) } =20 // PP Module IntelSst Speech // Check PP module with GUID 7C708106-3AFF-40FE-88BE-8C999B3F7= 445 If (LEqual(Arg3, ToUUID ("7C708106-3AFF-40FE-88BE-8C999B3F7445= "))) { - Return(And(ADPM, BIT2)) // ADPM[BIT2] set - supported (retur= n true) + Return(And(ADPM, 0x04)) // ADPM[BIT2] set - supported (retur= n true) } =20 // PP Module Dolby // Check PP module with GUID E0E018A8-3550-4B54-A8D0-A8E05D0FC= BA2 If (LEqual(Arg3, ToUUID ("E0E018A8-3550-4B54-A8D0-A8E05D0FCBA2= "))) { - Return(And(ADPM, BIT3)) // ADPM[BIT3] set - supported (retur= n true) + Return(And(ADPM, 0x08)) // ADPM[BIT3] set - supported (retur= n true) } =20 // PP Module Samsung SoundAlive // Check PP module with GUID 202BADB5-8870-4290-B536-F2380C63F= 55D If (LEqual(Arg3, ToUUID ("202BADB5-8870-4290-B536-F2380C63F55D= "))) { - Return(And(ADPM, BIT4)) // ADPM[BIT4] set - supported (retur= n true) + Return(And(ADPM, 0x10)) // ADPM[BIT4] set - supported (retur= n true) } =20 // PP Module Samsung SoundBooster // Check PP module with GUID EB3FEA76-394B-495D-A14D-8425092D5= CB7 If (LEqual(Arg3, ToUUID ("EB3FEA76-394B-495D-A14D-8425092D5CB7= "))) { - Return(And(ADPM, BIT5)) // ADPM[BIT5] set - supported (retur= n true) + Return(And(ADPM, 0x20)) // ADPM[BIT5] set - supported (retur= n true) } =20 // PP Module Samsung EQ/DRC // Check PP module with GUID F1C69181-329A-45F0-8EEF-D8BDDF81E= 036 If (LEqual(Arg3, ToUUID ("F1C69181-329A-45F0-8EEF-D8BDDF81E036= "))) { - Return(And(ADPM, BIT6)) // ADPM[BIT6] set - supported (retur= n true) + Return(And(ADPM, 0x40)) // ADPM[BIT6] set - supported (retur= n true) } =20 // PP Module ForteMedia SAMSoft // Check PP module with GUID B3573EFF-6441-4A75-91F7-4281EEC45= 97D If (LEqual(Arg3, ToUUID ("B3573EFF-6441-4A75-91F7-4281EEC4597D= "))) { - Return(And(ADPM, BIT7)) // ADPM[BIT7] set - supported (retur= n true) + Return(And(ADPM, 0x80)) // ADPM[BIT7] set - supported (retur= n true) } =20 // PP Module WoV Intel // Check PP module with GUID EC774FA9-28D3-424A-90E4-69F984F1E= EB7 If (LEqual(Arg3, ToUUID ("EC774FA9-28D3-424A-90E4-69F984F1EEB7= "))) { - Return(And(ADPM, BIT8)) // ADPM[BIT8] set - supported (retur= n true) + Return(And(ADPM, 0x100)) // ADPM[BIT8] set - supported (retu= rn true) } =20 // PP Module WoV Sensory // Check PP module with GUID F101FEF0-FF5A-4AD4-8710-43592A6F7= 948 If (LEqual(Arg3, ToUUID ("F101FEF0-FF5A-4AD4-8710-43592A6F7948= "))) { - Return(And(ADPM, BIT9)) // ADPM[BIT9] set - supported (retur= n true) + Return(And(ADPM, 0x200)) // ADPM[BIT9] set - supported (retu= rn true) } =20 // PP Module Conexant // Check PP module with GUID F3578986-4400-4ADF-AE7E-CD433CD3F= 26E If (LEqual(Arg3, ToUUID ("F3578986-4400-4ADF-AE7E-CD433CD3F26E= "))) { - Return(And(ADPM, BIT10)) // ADPM[BIT10] set - supported (ret= urn true) + Return(And(ADPM, 0x0400)) // ADPM[BIT10] set - supported (re= turn true) } =20 // PP Module Aware // Check PP module with GUID 13B5E4D7-A91A-4059-8290-605B01CCB= 650 If (LEqual(Arg3, ToUUID ("13B5E4D7-A91A-4059-8290-605B01CCB650= "))) { - Return(And(ADPM, BIT11)) // ADPM[BIT11] set - supported (ret= urn true) + Return(And(ADPM, 0x0800)) // ADPM[BIT11] set - supported (re= turn true) } =20 Return(0) // Is not supported diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Wsmt/Ws= mt.act b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Wsmt/Wsmt.a= ct index 334c58df3..b5d0a3263 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Wsmt/Wsmt.act +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Wsmt/Wsmt.act @@ -1,7 +1,7 @@ /** @file ACPI WSMT table =20 - Copyright (c) 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -27,14 +27,17 @@ ACPI_WINDOWS_SMM_SECURITY_MITIGATIONS_STRUCTURE Wsmt = =3D { 0x00, =20 //OEMID + { 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, + 0x00 + }, =20 //OEMTableID + { 0x00, 0x00, 0x00, @@ -42,7 +45,8 @@ ACPI_WINDOWS_SMM_SECURITY_MITIGATIONS_STRUCTURE Wsmt =3D { 0x00, 0x00, 0x00, - 0x00, + 0x00 + }, =20 //OEMRevision 0x00000000, diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/UsbTypeCDxe/UsbTypeC.c= b/Platform/BroxtonPlatformPkg/Common/Acpi/UsbTypeCDxe/UsbTypeC.c index e2a5ac612..f07161388 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/UsbTypeCDxe/UsbTypeC.c +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/UsbTypeCDxe/UsbTypeC.c @@ -1,7 +1,7 @@ /** @file Implements Overclocking Interface for OS Application ie Iron city. =20 - Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -85,6 +85,7 @@ static UINT16 GetUcsiRev(VOID) =20 **/ EFI_STATUS +EFIAPI UsbTypeCEntryPoint ( IN EFI_HANDLE ImageHandle, IN EFI_SYSTEM_TABLE *SystemTable @@ -95,7 +96,7 @@ UsbTypeCEntryPoint ( =20 DEBUG ((DEBUG_INFO, "UsbTypeC entrypoint.\n")); =20 - Status =3D gBS->LocateProtocol (&gEfiGlobalNvsAreaProtocolGuid, NULL, &G= lobalNvsAreaProtocol); + Status =3D gBS->LocateProtocol (&gEfiGlobalNvsAreaProtocolGuid, NULL, (V= OID **)&GlobalNvsAreaProtocol); ASSERT_EFI_ERROR (Status); if (EFI_ERROR (Status)) { return Status; @@ -106,7 +107,7 @@ UsbTypeCEntryPoint ( // // Allocate memory in ACPI NVS // - Status =3D AllocateMemoryBelow4G (EfiACPIMemoryNVS, 0x1000, &OpmBuffer); + Status =3D AllocateMemoryBelow4G (EfiACPIMemoryNVS, 0x1000, (VOID **)&Op= mBuffer); ASSERT_EFI_ERROR (Status); =20 if (EFI_ERROR (Status)) { diff --git a/Platform/BroxtonPlatformPkg/Common/Console/PlatformGopPolicyDx= e/PlatformGopPolicy.c b/Platform/BroxtonPlatformPkg/Common/Console/Platform= GopPolicyDxe/PlatformGopPolicy.c index 26dc95c77..8f3bc4428 100644 --- a/Platform/BroxtonPlatformPkg/Common/Console/PlatformGopPolicyDxe/Platf= ormGopPolicy.c +++ b/Platform/BroxtonPlatformPkg/Common/Console/PlatformGopPolicyDxe/Platf= ormGopPolicy.c @@ -1,7 +1,7 @@ /** @file Platform GOP Driver Policy. =20 - Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -23,7 +23,7 @@ #include #include =20 -EFI_BOOT_SERVICES *gBS; +extern EFI_BOOT_SERVICES *gBS; =20 PLATFORM_GOP_POLICY_PROTOCOL mPlatformGOPPolicy; =20 @@ -82,7 +82,7 @@ GetVbtData ( SYSTEM_CONFIGURATION SystemConfiguration; UINTN VarSize; EFI_STATUS Status; - EFI_GUID BmpImageGuid =3D { 0xE08CA6D5, 0x8D02, 0x43ae, 0xAB, 0xB1, 0x9= 5, 0x2C, 0xC7, 0x87, 0xC9, 0x33 }; + EFI_GUID BmpImageGuid =3D { 0xE08CA6D5, 0x8D02, 0x43ae, {0xAB, 0xB1, 0x= 95, 0x2C, 0xC7, 0x87, 0xC9, 0x33} }; UINTN FvProtocolCount; EFI_HANDLE *FvHandles; EFI_FIRMWARE_VOLUME2_PROTOCOL *Fv; @@ -130,7 +130,7 @@ GetVbtData ( &BmpImageGuid, EFI_SECTION_RAW, 0, - &Buffer, + (VOID **)&Buffer, &VbtBufferSize, &AuthenticationStatus ); diff --git a/Platform/BroxtonPlatformPkg/Common/Features/S3/SmramSaveInfoHa= ndlerSmm/SmramSaveInfoHandlerSmm.c b/Platform/BroxtonPlatformPkg/Common/Fea= tures/S3/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.c index 82efcfe36..ef45fdb6b 100644 --- a/Platform/BroxtonPlatformPkg/Common/Features/S3/SmramSaveInfoHandlerSm= m/SmramSaveInfoHandlerSmm.c +++ b/Platform/BroxtonPlatformPkg/Common/Features/S3/SmramSaveInfoHandlerSm= m/SmramSaveInfoHandlerSmm.c @@ -1,7 +1,7 @@ /** @file A helper driver to save information to SMRAM after SMRR is enabled. =20 - Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -19,7 +19,7 @@ =20 #define EFI_SMRAM_CPU_NVS_HEADER_GUID \ { \ - 0x429501d9, 0xe447, 0x40f4, 0x86, 0x7b, 0x75, 0xc9, 0x3a, 0x1d, 0xb5, = 0x4e \ + 0x429501d9, 0xe447, 0x40f4, {0x86, 0x7b, 0x75, 0xc9, 0x3a, 0x1d, 0xb5,= 0x4e} \ } =20 GLOBAL_REMOVE_IF_UNREFERENCED UINT8 mSmiDataRegister; diff --git a/Platform/BroxtonPlatformPkg/Common/Features/Smbios/SmBiosMiscD= xe/MiscNumberOfInstallableLanguagesFunction.c b/Platform/BroxtonPlatformPkg= /Common/Features/Smbios/SmBiosMiscDxe/MiscNumberOfInstallableLanguagesFunct= ion.c index f52cad23f..b511e96cc 100644 --- a/Platform/BroxtonPlatformPkg/Common/Features/Smbios/SmBiosMiscDxe/Misc= NumberOfInstallableLanguagesFunction.c +++ b/Platform/BroxtonPlatformPkg/Common/Features/Smbios/SmBiosMiscDxe/Misc= NumberOfInstallableLanguagesFunction.c @@ -48,7 +48,7 @@ CurrentLanguageMatch ( return; } =20 - GetEfiGlobalVariable2 (L"PlatformLang", &CurrentLang, NULL); + GetEfiGlobalVariable2 (L"PlatformLang", (VOID **)&CurrentLang, NULL); DefaultLang =3D (CHAR8 *) PcdGetPtr (PcdUefiVariableDefaultPlatformLang= ); BestLanguage =3D GetBestLanguage ( Languages, diff --git a/Platform/BroxtonPlatformPkg/Common/Features/Smbios/SmBiosMiscD= xe/MiscOemType0x94Function.c b/Platform/BroxtonPlatformPkg/Common/Features/= Smbios/SmBiosMiscDxe/MiscOemType0x94Function.c index 0382858fe..68d68d327 100644 --- a/Platform/BroxtonPlatformPkg/Common/Features/Smbios/SmBiosMiscDxe/Misc= OemType0x94Function.c +++ b/Platform/BroxtonPlatformPkg/Common/Features/Smbios/SmBiosMiscDxe/Misc= OemType0x94Function.c @@ -1,7 +1,7 @@ /** @file The function that processes the Smbios data type 0x94. =20 - Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -30,7 +30,7 @@ #include #include #include -#include +#include #include #include #include @@ -1576,7 +1576,7 @@ MISC_SMBIOS_TABLE_FUNCTION(MiscOemType0x94) =20 Status =3D EfiCreateEventReadyToBootEx ( TPL_CALLBACK, - AddSmbiosT0x94Callback, + (EFI_EVENT_NOTIFY)AddSmbiosT0x94Callback, RecordData, &AddSmbiosT0x94CallbackEvent ); diff --git a/Platform/BroxtonPlatformPkg/Common/Features/UsbDeviceDxe/UsbDe= viceDxe.c b/Platform/BroxtonPlatformPkg/Common/Features/UsbDeviceDxe/UsbDev= iceDxe.c index 03bf27d6e..06705c8b6 100644 --- a/Platform/BroxtonPlatformPkg/Common/Features/UsbDeviceDxe/UsbDeviceDxe= .c +++ b/Platform/BroxtonPlatformPkg/Common/Features/UsbDeviceDxe/UsbDeviceDxe= .c @@ -342,7 +342,7 @@ UsbDeviceDxeDriverStop ( Status =3D gBS->OpenProtocol ( Controller, &gEfiUsbFnIoProtocolGuid, - &UsbFunIoProtocol, + (VOID **)&UsbFunIoProtocol, This->DriverBindingHandle, Controller, EFI_OPEN_PROTOCOL_GET_PROTOCOL diff --git a/Platform/BroxtonPlatformPkg/Common/Features/UsbDeviceDxe/UsbFu= ncIo.c b/Platform/BroxtonPlatformPkg/Common/Features/UsbDeviceDxe/UsbFuncIo= .c index 9a156ba9b..e1027d248 100644 --- a/Platform/BroxtonPlatformPkg/Common/Features/UsbDeviceDxe/UsbFuncIo.c +++ b/Platform/BroxtonPlatformPkg/Common/Features/UsbDeviceDxe/UsbFuncIo.c @@ -1901,7 +1901,7 @@ StartXdciController ( UsbFuncIoDevPtr->DeviceId =3D USBFU_PID; UsbFuncIoDevPtr->StartUpController =3D TRUE; =20 - Status =3D UsbDeviceInit (&ConfigParams, &UsbFuncIoDevPtr->DrvCore); + Status =3D UsbDeviceInit (&ConfigParams, (VOID **)&UsbFuncIoDevPtr->DrvC= ore); if (Status !=3D EFI_SUCCESS) { Status =3D EFI_DEVICE_ERROR; goto EXIT_START_CONTROLLER; @@ -2166,6 +2166,7 @@ DEV_INIT_EXIT: } =20 EFI_STATUS +EFIAPI StartController ( IN EFI_USBFN_IO_PROTOCOL *This ) @@ -2210,6 +2211,7 @@ DEV_DEINIT_EXIT: } =20 EFI_STATUS +EFIAPI StopController ( IN EFI_USBFN_IO_PROTOCOL *This ) diff --git a/Platform/BroxtonPlatformPkg/Common/Features/UsbDeviceDxe/XdciD= WC.c b/Platform/BroxtonPlatformPkg/Common/Features/UsbDeviceDxe/XdciDWC.c index 47c5b80bd..2c1e929ab 100644 --- a/Platform/BroxtonPlatformPkg/Common/Features/UsbDeviceDxe/XdciDWC.c +++ b/Platform/BroxtonPlatformPkg/Common/Features/UsbDeviceDxe/XdciDWC.c @@ -15,7 +15,6 @@ #include "XdciInterface.h" #include "XdciDWC.h" =20 -#pragma optimize ("", off) =20 UINT32 UsbRegRead ( @@ -3628,8 +3627,8 @@ UsbXdciCoreReinit ( DWC_XDCI_DCTL_REG, UsbRegRead (BaseAddr, DWC_XDCI_DCTL_REG) & (~DWC_XDCI_DCTL_KEEP_CONNECT_MASK) & - (~DWC_XDCI_DCTL_STATE_CHANGE_REQ_MASK) | - (DWC_XDCI_DCTL_STATE_CHANGE_REQ_RX_DETECT << DWC_XDCI_DCTL_STATE_CHANG= E_REQ_BIT_POS) + ((~DWC_XDCI_DCTL_STATE_CHANGE_REQ_MASK) | + (DWC_XDCI_DCTL_STATE_CHANGE_REQ_RX_DETECT << DWC_XDCI_DCTL_STATE_CHANG= E_REQ_BIT_POS)) ); =20 DEBUG ((DEBUG_INFO, "Device controller Synopsys ID: %x\n", UsbRegRead (B= aseAddr, DWC_XDCI_GSNPSID_REG))); @@ -4029,5 +4028,3 @@ UsbXdciCoreFlushEpFifo ( =20 return Status; } -#pragma optimize ("", on) - diff --git a/Platform/BroxtonPlatformPkg/Common/Features/UsbDeviceDxe/XdciI= nterface.h b/Platform/BroxtonPlatformPkg/Common/Features/UsbDeviceDxe/XdciI= nterface.h index 90264e84f..93eb77367 100644 --- a/Platform/BroxtonPlatformPkg/Common/Features/UsbDeviceDxe/XdciInterfac= e.h +++ b/Platform/BroxtonPlatformPkg/Common/Features/UsbDeviceDxe/XdciInterfac= e.h @@ -65,7 +65,7 @@ EFI_STATUS (EFIAPI *DEV_CORE_REG_CALLBACK) ( IN VOID *CoreHandle, IN USB_DEVICE_EVENT_ID Event, - IN EFI_STATUS (*callbackFn)(IN USB_DEVICE_CALLBACK_PARAM = *CbEventParams) + IN USB_DEVICE_CALLBACK_FUNC CallbackFn ); =20 typedef diff --git a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspP= latformInfoLibSample/FspPlatformInfoLibSample.c b/Platform/BroxtonPlatformP= kg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/FspPlatformInfoLi= bSample.c index ac8e42e6d..077266ace 100644 --- a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatform= InfoLibSample/FspPlatformInfoLibSample.c +++ b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatform= InfoLibSample/FspPlatformInfoLibSample.c @@ -1,7 +1,7 @@ /** @file Sample to provide FSP platform information related function. =20 - Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -230,16 +230,13 @@ GetS3MemoryInfo ( ACPI_VARIABLE_SET *AcpiVariableSet; EFI_PEI_HOB_POINTERS GuidHob; EFI_PHYSICAL_ADDRESS *AcpiVariableAddress; - UINTN AcpiVarHobSize; =20 GuidHob.Raw =3D GetHobList (); AcpiVariableAddress =3D NULL; - AcpiVarHobSize =3D 0; =20 if (GuidHob.Raw !=3D NULL) { if ((GuidHob.Raw =3D GetNextGuidHob (&gEfiAcpiVariableCompatiblityGuid= , GuidHob.Raw)) !=3D NULL) { AcpiVariableAddress =3D GET_GUID_HOB_DATA (GuidHob.Guid); - AcpiVarHobSize =3D GET_GUID_HOB_DATA_SIZE (GuidHob.Guid); } } =20 diff --git a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspHo= bProcessLib/FspHobProcessLib.c b/Platform/BroxtonPlatformPkg/Common/FspSupp= ort/Library/PeiFspHobProcessLib/FspHobProcessLib.c index 499e5fc05..ec3ea8dcf 100644 --- a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspHobProces= sLib/FspHobProcessLib.c +++ b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspHobProces= sLib/FspHobProcessLib.c @@ -1,7 +1,7 @@ /** @file Null instance of Platform Sec Lib. =20 - Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -64,14 +64,13 @@ GetMemorySizeInMemoryTypeInformation ( IN EFI_PEI_SERVICES **PeiServices ) { - EFI_STATUS Status; EFI_PEI_HOB_POINTERS Hob; EFI_MEMORY_TYPE_INFORMATION *MemoryData; UINT8 Index; UINTN TempPageNum; =20 MemoryData =3D NULL; - Status =3D (*PeiServices)->GetHobList (PeiServices, (VOID **) &Hob.R= aw); + (*PeiServices)->GetHobList ((CONST EFI_PEI_SERVICES **)PeiServices, (VOI= D **) &Hob.Raw); while (!END_OF_HOB_LIST (Hob)) { if (Hob.Header->HobType =3D=3D EFI_HOB_TYPE_GUID_EXTENSION && CompareGuid (&Hob.Guid->Name, &gEfiMemoryTypeInformationGuid)) { @@ -181,10 +180,6 @@ FspHobProcessForMemoryResource ( BOOLEAN FoundFspMemHob; EFI_STATUS Status; EFI_BOOT_MODE BootMode; - EFI_PEI_SERVICES **PeiServices; - FSPM_UPD *FspmUpd; - - PeiServices =3D (EFI_PEI_SERVICES **) GetPeiServicesTablePointer (); =20 PeiServicesGetBootMode (&BootMode); =20 @@ -195,7 +190,6 @@ FspHobProcessForMemoryResource ( FspMemoryBase =3D 0; FoundFspMemHob =3D FALSE; =20 - FspmUpd =3D (FSPM_UPD *) GetFspMemoryInitUpdDataPointer (); =20 // // Parse the hob list from fsp @@ -352,7 +346,6 @@ ProcessFspHobList ( ) { EFI_PEI_HOB_POINTERS FspHob; - EFI_PEI_HOB_POINTERS DxeHob; BOOLEAN TransferFlag; =20 // @@ -400,7 +393,7 @@ ProcessFspHobList ( =20 if (TransferFlag) { DEBUG ((DEBUG_INFO, "FSP Extended GUID HOB: {%g} HobLength =3D %= x\n", &(FspHob.Guid->Name), FspHob.Header->HobLength)); - DxeHob.Raw =3D BuildGuidDataHob(&FspHob.Guid->Name, GET_GUID_HOB_DAT= A(FspHob.Raw), GET_GUID_HOB_DATA_SIZE(FspHob.Raw)); + BuildGuidDataHob(&FspHob.Guid->Name, GET_GUID_HOB_DATA(FspHob.Raw), = GET_GUID_HOB_DATA_SIZE(FspHob.Raw)); } FspHob.Raw =3D GET_NEXT_HOB (FspHob); } diff --git a/Platform/BroxtonPlatformPkg/Common/Include/Guid/SetupVariable.= h b/Platform/BroxtonPlatformPkg/Common/Include/Guid/SetupVariable.h index fe95ee7c9..c6ced4616 100644 --- a/Platform/BroxtonPlatformPkg/Common/Include/Guid/SetupVariable.h +++ b/Platform/BroxtonPlatformPkg/Common/Include/Guid/SetupVariable.h @@ -1,7 +1,7 @@ /** @file Header file for Setup Variable. =20 - Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -21,29 +21,29 @@ // // {EC87D643-EBA4-4bb5-A1E5-3F3E36B20DA9} // -#define SYSTEM_CONFIGURATION_GUID { 0xec87d643, 0xeba4, 0x4bb5, 0xa1, 0xe= 5, 0x3f, 0x3e, 0x36, 0xb2, 0xd, 0xa9 } +#define SYSTEM_CONFIGURATION_GUID { 0xec87d643, 0xeba4, 0x4bb5, {0xa1, 0x= e5, 0x3f, 0x3e, 0x36, 0xb2, 0xd, 0xa9 }} =20 -#define ROOT_SECURITY_GUID { 0xd387d688, 0xeba4, 0x45b5, 0xa1, 0xe5, 0x3f= , 0x3e, 0x36, 0xb2, 0xd, 0x37 } +#define ROOT_SECURITY_GUID { 0xd387d688, 0xeba4, 0x45b5, {0xa1, 0xe5, 0x3= f, 0x3e, 0x36, 0xb2, 0xd, 0x37} } =20 // // {6936B3BD-4350-46d9-8940-1FA20961AEB1} // -#define SYSTEM_ROOT_MAIN_GUID { 0x6936b3bd, 0x4350, 0x46d9, 0x89, 0x40, 0= x1f, 0xa2, 0x9, 0x61, 0xae, 0xb1 } +#define SYSTEM_ROOT_MAIN_GUID { 0x6936b3bd, 0x4350, 0x46d9, {0x89, 0x40, = 0x1f, 0xa2, 0x9, 0x61, 0xae, 0xb1} } =20 // // {21FEE8DB-0D29-477e-B5A9-96EB343BA99C} // -#define ADDITIONAL_SYSTEM_INFO_GUID { 0x21fee8db, 0xd29, 0x477e, 0xb5, 0= xa9, 0x96, 0xeb, 0x34, 0x3b, 0xa9, 0x9c } +#define ADDITIONAL_SYSTEM_INFO_GUID { 0x21fee8db, 0xd29, 0x477e, {0xb5, = 0xa9, 0x96, 0xeb, 0x34, 0x3b, 0xa9, 0x9c }} =20 // // {EC87D643-EBA4-4BB5-A1E5-3F3E36B20DA9} // -#define SETUP_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, = 0x36, 0xB2, 0x0D, 0xA9 } +#define SETUP_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, {0xA1, 0xE5, 0x3F, 0x3E,= 0x36, 0xB2, 0x0D, 0xA9 }} =20 // // {1B838190-4625-4ead-ABC9-CD5E6AF18FE0} // -#define EFI_HII_EXPORT_DATABASE_GUID { 0x1b838190, 0x4625, 0x4ead, 0xab, 0= xc9, 0xcd, 0x5e, 0x6a, 0xf1, 0x8f, 0xe0 } +#define EFI_HII_EXPORT_DATABASE_GUID { 0x1b838190, 0x4625, 0x4ead, {0xab, = 0xc9, 0xcd, 0x5e, 0x6a, 0xf1, 0x8f, 0xe0} } =20 #define PASSWORD_MAX_SIZE 20 #define MAX_CUSTOM_VID_TABLE_STATES 6 @@ -80,7 +80,6 @@ #define EFI_HDD_WARNING_OFF 0x00 #define EFI_CD_WARNING_OFF 0x00 #define EFI_SMART_WARNING_OFF 0x00 -#define OFFSET_0 0x00 =20 #ifndef VFRCOMPILE extern EFI_GUID gEfiSetupVariableGuid; diff --git a/Platform/BroxtonPlatformPkg/Common/Library/DxePolicyUpdateLib/= DxeSaPolicyUpdate.c b/Platform/BroxtonPlatformPkg/Common/Library/DxePolicyU= pdateLib/DxeSaPolicyUpdate.c index 4fa42747e..2b24a9a3b 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/DxePolicyUpdateLib/DxeSaPo= licyUpdate.c +++ b/Platform/BroxtonPlatformPkg/Common/Library/DxePolicyUpdateLib/DxeSaPo= licyUpdate.c @@ -1,7 +1,7 @@ /** @file This file is the library for SA DXE Policy initialzation. =20 - Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2004 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -60,7 +60,7 @@ UpdateDxeSaPolicy ( Status =3D gBS->LocateProtocol ( &gPlatformGOPPolicyGuid, NULL, - &GopPolicy + (VOID **)&GopPolicy ); =20 if (EFI_ERROR (Status) || (GopPolicy =3D=3D NULL)) { diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PeiPolicyUpdateLib/= PeiCpuPolicyUpdate.c b/Platform/BroxtonPlatformPkg/Common/Library/PeiPolicy= UpdateLib/PeiCpuPolicyUpdate.c index dbb2bc53d..27c4dfc71 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/PeiPolicyUpdateLib/PeiCpuP= olicyUpdate.c +++ b/Platform/BroxtonPlatformPkg/Common/Library/PeiPolicyUpdateLib/PeiCpuP= olicyUpdate.c @@ -1,7 +1,7 @@ /** @file This file is SampleCode of the library for Intel CPU PEI Policy Update i= nitialization. =20 - Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -43,7 +43,6 @@ UpdatePeiCpuPolicy ( CPU_CONFIG *CpuConfig; POWER_MGMT_CONFIG *PowerMgmtConfig; EFI_PEI_HOB_POINTERS Hob; - EFI_PLATFORM_INFO_HOB *PlatformInfo; =20 Status =3D GetConfigBlock ((CONFIG_BLOCK_TABLE_HEADER *) SiCpuPolicyPpi,= &gCpuConfigGuid, (VOID *) &CpuConfig); ASSERT_EFI_ERROR (Status); @@ -55,7 +54,6 @@ UpdatePeiCpuPolicy ( =20 Hob.Raw =3D GetFirstGuidHob (&gEfiPlatformInfoGuid); ASSERT (Hob.Raw !=3D NULL); - PlatformInfo =3D GET_GUID_HOB_DATA (Hob.Raw); =20 CpuConfig->ActiveProcessorCores =3D SystemConfiguration->ActivePr= ocessorCores; CpuConfig->DisableCore1 =3D SystemConfiguration->Core1; diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/BdsP= latform.c b/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/BdsPl= atform.c index 53a5ee7e2..fa0f0212b 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/BdsPlatform= .c +++ b/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/BdsPlatform= .c @@ -1,7 +1,7 @@ /** @file This file include all platform action which can be customized by IBV/OEM. =20 - Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -34,7 +34,7 @@ =20 extern EFI_GUID gUndiDriverImageGuid; =20 -EFI_GUID gUefiShellFileGuid =3D { 0x7C04A583, 0x9E3E, 0x4f1c, 0xAD, 0x65, = 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }; +EFI_GUID gUefiShellFileGuid =3D { 0x7C04A583, 0x9E3E, 0x4f1c, {0xAD, 0x65,= 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }}; =20 EFI_USER_PROFILE_HANDLE mCurrentUser =3D NULL; EFI_EVENT mHotKeyTimerEvent =3D NU= LL; @@ -443,7 +443,7 @@ FastBootUpdateConInVarByConInBehavior ( EfiCreateProtocolNotifyEvent ( &gSetupEnterGuid, TPL_CALLBACK, - ConnectAllConsolesForSetupMenu, + (EFI_EVENT_NOTIFY)ConnectAllConsolesForSetupMenu, NULL, &SetupRegistration ); diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/BdsP= latform.h b/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/BdsPl= atform.h index 18c5f8877..55f237c6b 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/BdsPlatform= .h +++ b/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/BdsPlatform= .h @@ -1,7 +1,7 @@ /** @file Header file for BDS Platform specific code. =20 - Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -71,16 +71,25 @@ extern EFI_DEVICE_PATH_PROTOCOL *gSerialIoConnect[]; #define SUBCLASS_BOOT 1 #define PROTOCOL_KEYBOARD 1 =20 +// +// the short form device path for Usb keyboard +// +#define CLASS_HID 3 +#define SUBCLASS_BOOT 1 +#define PROTOCOL_KEYBOARD 1 + #define PCI_DEVICE_PATH_NODE(Func, Dev) \ { \ - HARDWARE_DEVICE_PATH, \ - HW_PCI_DP, \ { \ - (UINT8) (sizeof (PCI_DEVICE_PATH)), \ - (UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8) \ - }, \ - (Func), \ - (Dev) \ + HARDWARE_DEVICE_PATH, \ + HW_PCI_DP, \ + { \ + (UINT8) (sizeof (PCI_DEVICE_PATH)), \ + (UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8) \ + } \ + }, \ + (Func), \ + (Dev) \ } =20 #define PNPID_DEVICE_PATH_NODE(PnpId) \ @@ -132,8 +141,10 @@ extern EFI_DEVICE_PATH_PROTOCOL *gSerialIoConnect[]; { \ MESSAGING_DEVICE_PATH, \ MSG_USB_CLASS_DP, \ - (UINT8) (sizeof (USB_CLASS_DEVICE_PATH)), \ - (UINT8) ((sizeof (USB_CLASS_DEVICE_PATH)) >> 8) \ + {\ + (UINT8) (sizeof (USB_CLASS_DEVICE_PATH)), \ + (UINT8) ((sizeof (USB_CLASS_DEVICE_PATH)) >> 8) \ + }\ }, \ 0xffff, \ 0xffff, \ diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/Plat= formData.c b/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/Plat= formData.c index 8f619da55..dd9808c0b 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/PlatformDat= a.c +++ b/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/PlatformDat= a.c @@ -2,7 +2,7 @@ Defined the platform specific device path which will be used by platform Bbd to perform the platform policy connect. =20 - Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -117,13 +117,17 @@ EFI_DEVICE_PATH_PROTOCOL* gPlatformAllPossiblePciVgaC= onsole [] =3D { // LEGACY_HD_DEVICE_PATH gLegacyHd =3D { { - BBS_DEVICE_PATH, - BBS_BBS_DP, - (UINT8) (sizeof (BBS_BBS_DEVICE_PATH)), - (UINT8) ((sizeof (BBS_BBS_DEVICE_PATH)) >> 8), + { + BBS_DEVICE_PATH, + BBS_BBS_DP, + { + (UINT8) (sizeof (BBS_BBS_DEVICE_PATH)), + (UINT8) ((sizeof (BBS_BBS_DEVICE_PATH)) >> 8) + } + }, BBS_TYPE_HARDDRIVE, 0, - 0 + {0} }, gEndEntire }; @@ -133,13 +137,17 @@ LEGACY_HD_DEVICE_PATH gLegacyHd =3D { // LEGACY_HD_DEVICE_PATH gLegacyCdrom =3D { { - BBS_DEVICE_PATH, - BBS_BBS_DP, - (UINT8) (sizeof (BBS_BBS_DEVICE_PATH)), - (UINT8) ((sizeof (BBS_BBS_DEVICE_PATH)) >> 8), + { + BBS_DEVICE_PATH, + BBS_BBS_DP, + { + (UINT8) (sizeof (BBS_BBS_DEVICE_PATH)), + (UINT8) ((sizeof (BBS_BBS_DEVICE_PATH)) >> 8), + }=20 + }, BBS_TYPE_CDROM, 0, - 0 + {0} }, gEndEntire }; diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32= /Chipset_S.inc b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/= Ia32/Chipset_S.inc index 067ddf6c5..3d735fd81 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Chipse= t_S.inc +++ b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Chipse= t_S.inc @@ -1,17 +1,17 @@ -;; @file -; Chipset constants and macros. -; -; Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.
-; -; This program and the accompanying materials -; are licensed and made available under the terms and conditions of the B= SD License -; which accompanies this distribution. The full text of the license may = be found at -; http://opensource.org/licenses/bsd-license.php. -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED -; -;; +# @file +# Chipset constants and macros. +# +# Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may = be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED +# +# =20 # # APIC register @@ -92,6 +92,7 @@ =20 .equ R_PMC_MMIO_BAR0, ((0x0D * 8 + 0x01) * 0x1000 + 0x0010 += CPU_HEC_BASE) #BAR0 IO config register. B0:D13:F1 0x10 .equ R_PMC_MMIO_BAR1, ((0x0D * 8 + 0x01) * 0x1000 + 0x0018 += CPU_HEC_BASE) #BAR1 IO config register. B0:D13:F1 0x18 +.equ R_PMC_MMIO_BAR1_OFFSET_4, 0x04=20 .equ SYRE_CPURST, 14 =20 # diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32= /Ia32_S.inc b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia3= 2/Ia32_S.inc index 3279f074a..cad7daea9 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Ia32_S= .inc +++ b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Ia32_S= .inc @@ -1,17 +1,16 @@ -;; @file -; IA32 architecture MSRs. -; -; Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.
-; -; This program and the accompanying materials -; are licensed and made available under the terms and conditions of the B= SD License -; which accompanies this distribution. The full text of the license may = be found at -; http://opensource.org/licenses/bsd-license.php. -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED -; -;; +# @file +# IA32 architecture MSRs. +# +# Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may = be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED +# =20 .equ IA32_MTRR_CAP, 0xFE .equ MTRR_PHYS_BASE_0, 0x200 diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32= /Platform_S.inc b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib= /Ia32/Platform_S.inc index a50fc4aac..4bba49b6b 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Platfo= rm_S.inc +++ b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Platfo= rm_S.inc @@ -1,17 +1,17 @@ -;; @file -; Platform Specific Definitions. -; -; Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.
-; -; This program and the accompanying materials -; are licensed and made available under the terms and conditions of the B= SD License -; which accompanies this distribution. The full text of the license may = be found at -; http://opensource.org/licenses/bsd-license.php. -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED -; -;; +# @file +# Platform Specific Definitions. +# +# Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may = be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED +# +# =20 #INCLUDE FlashMap.inc #ECP porting =20 diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32= /SecCore_S.inc b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/= Ia32/SecCore_S.inc index 3a9126fcb..def9014c2 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/SecCor= e_S.inc +++ b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/SecCor= e_S.inc @@ -1,17 +1,17 @@ -;; @file -; SecCore constants and macros. -; -; Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.
-; -; This program and the accompanying materials -; are licensed and made available under the terms and conditions of the B= SD License -; which accompanies this distribution. The full text of the license may = be found at -; http://opensource.org/licenses/bsd-license.php. -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED -; -;; +# @file +# SecCore constants and macros. +# +# Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may = be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED +# +# =20 # # Set to 1 to enable debug diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32= /SecEntry.S b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia3= 2/SecEntry.S index 534c62c73..03467674b 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/SecEnt= ry.S +++ b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/SecEnt= ry.S @@ -2,7 +2,7 @@ # This is the code that goes from real-mode to protected mode. # It consumes the reset vector. # -# Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License @@ -187,13 +187,13 @@ ASM_PFX (PlatformInitialization): movl $R_PMC_MMIO_BAR0, %edi movl $IPC1_BASE_ADDRESS, (%edi) =20 - movl $(R_PMC_MMIO_BAR0 + $4), %edi + movl $(R_PMC_MMIO_BAR0 + R_PMC_MMIO_BAR1_OFFSET_4), %edi movl $0x00, (%edi) =20 movl $R_PMC_MMIO_BAR1, %edi movl $SSRAM_BASE_ADDRESS, (%edi) =20 - movl $( R_PMC_MMIO_BAR1 + $4), %edi + movl $( R_PMC_MMIO_BAR1 + R_PMC_MMIO_BAR1_OFFSET_4), %edi movl $0x00, (%edi) =20 # @@ -333,7 +333,7 @@ no_RTC_pwr_failure: outw %ax, %dx =20 .if 1 - ; Do nothing + # Do nothing .else # # Clear the Second Timeout Status bit by writing 1 diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformDx= e/Platform.c b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/Platform= Dxe/Platform.c index d27569a05..e5e9c9319 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformDxe/Platf= orm.c +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformDxe/Platf= orm.c @@ -631,15 +631,15 @@ InitPlatformResolution ( ) { PANEL_RESOLUTION PanelResolution[] =3D { - 0, 0, 0, // Native Mode, Find the highest resolution which GOP= supports. - 1, 640, 480, - 2, 800, 600, - 3, 1024, 768, - 4, 1280, 1024, - 5, 1366, 768, - 6, 1680, 1050, - 7, 1920, 1200, - 8, 1280, 800, + {0, 0, 0}, // Native Mode, Find the highest resolution which G= OP supports. + {1, 640, 480}, + {2, 800, 600}, + {3, 1024, 768}, + {4, 1280, 1024}, + {5, 1366, 768}, + {6, 1680, 1050}, + {7, 1920, 1200}, + {8, 1280, 800} }; =20 // diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformDx= e/PlatformDxe.h b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/Platf= ormDxe/PlatformDxe.h index 843d912bc..1475c4cab 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformDxe/Platf= ormDxe.h +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformDxe/Platf= ormDxe.h @@ -1,7 +1,7 @@ /** @file Header file for Platform Initialization Driver. =20 - Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -69,7 +69,7 @@ // Platform driver GUID // #define EFI_PLATFORM_DRIVER_GUID \ - { 0x056E7324, 0xA718, 0x465b, 0x9A, 0x84, 0x22, 0x8F, 0x06, 0x64, 0x2B, = 0x4F } + { 0x056E7324, 0xA718, 0x465b, {0x9A, 0x84, 0x22, 0x8F, 0x06, 0x64, 0x2B,= 0x4F }} =20 #define EFI_SECTION_STRING 0x1C #define EFI_FORWARD_DECLARATION(x) typedef struct _##x x diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPo= stMemPei/PlatformInit.c b/Platform/BroxtonPlatformPkg/Common/PlatformSettin= gs/PlatformPostMemPei/PlatformInit.c index 0853f8fbb..91334f9e7 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPe= i/PlatformInit.c +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPe= i/PlatformInit.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include =20 #ifdef __GNUC__ #pragma GCC push_options @@ -281,8 +281,8 @@ BXTPolicyInit ( { VOID* Buffer; UINT32 Size; - EFI_GUID PeiLogoGuid =3D { 0x7BB28B99, 0x6= 1BB, 0x11D5, 0x9A, 0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D }; - EFI_GUID TianmaVbtGuid =3D { 0xE08CA6D5, 0x8= D02, 0x43ae, 0xAB, 0xB1, 0x95, 0x2C, 0xC7, 0x87, 0xC9, 0x33 }; + EFI_GUID PeiLogoGuid =3D { 0x7BB28B99, 0x6= 1BB, 0x11D5, {0x9A, 0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D} }; + EFI_GUID TianmaVbtGuid =3D { 0xE08CA6D5, 0x8= D02, 0x43ae, {0xAB, 0xB1, 0x95, 0x2C, 0xC7, 0x87, 0xC9, 0x33} }; VBT_INFO VbtInfo; =20 =20 @@ -307,7 +307,7 @@ BXTPolicyInit ( // // Build the VBT data into HOB for DXE GOP // - VbtInfo.VbtAddress =3D (EFI_PHYSICAL_ADDRESS) Buffer; + VbtInfo.VbtAddress =3D (EFI_PHYSICAL_ADDRESS)(UINTN)Buffer; VbtInfo.VbtSize =3D Size; DEBUG ((DEBUG_INFO, "VbtInfo VbtAddress is 0x%x\n", Buffer)); DEBUG ((DEBUG_INFO, "VbtInfo VbtSize is 0x%x\n", Size)); diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPr= eMemPei/PlatformInitPreMem.c b/Platform/BroxtonPlatformPkg/Common/PlatformS= ettings/PlatformPreMemPei/PlatformInitPreMem.c index 854d737c2..630c2c1d1 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPreMemPei= /PlatformInitPreMem.c +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPreMemPei= /PlatformInitPreMem.c @@ -24,7 +24,7 @@ #include #include #include -#include +#include #include #include #include @@ -53,7 +53,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSe= tupDxe/PlatformSetupDxe.c b/Platform/BroxtonPlatformPkg/Common/PlatformSett= ings/PlatformSetupDxe/PlatformSetupDxe.c index 5cbe13605..e6df76e8f 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/= PlatformSetupDxe.c +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/= PlatformSetupDxe.c @@ -69,7 +69,7 @@ EFI_HANDLE mImageHandle; // module global data // #define EFI_NORMAL_SETUP_GUID \ - { 0xec87d643, 0xeba4, 0x4bb5, 0xa1, 0xe5, 0x3f, 0x3e, 0x36, 0xb2, 0xd, 0= xa9 } + { 0xec87d643, 0xeba4, 0x4bb5, {0xa1, 0xe5, 0x3f, 0x3e, 0x36, 0xb2, 0xd, = 0xa9} } =20 EFI_GUID mNormalSetupGuid =3D EFI_NORMAL_SETUP_GUID; =20 diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSe= tupDxe/SetupInfoRecords.c b/Platform/BroxtonPlatformPkg/Common/PlatformSett= ings/PlatformSetupDxe/SetupInfoRecords.c index 768893ea4..c3fd787c7 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/= SetupInfoRecords.c +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/= SetupInfoRecords.c @@ -1101,7 +1101,7 @@ UpdatePlatformInformation ( // // Update VBIOS version in Setup // - Status =3D gBS->LocateProtocol (&gEfiLegacyBiosProtocolGuid, NULL, &Lega= cyBios); + Status =3D gBS->LocateProtocol (&gEfiLegacyBiosProtocolGuid, NULL, (VOID= **)&LegacyBios); if (!EFI_ERROR (Status)) { RegSet.X.AX =3D 0x5f01; Status =3D LegacyBios->Int86 (LegacyBios, 0x10, &RegSet); diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSe= tupDxe/Vfr.vfr b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/Platfo= rmSetupDxe/Vfr.vfr index 63d5e7f23..4b10a49bf 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/= Vfr.vfr +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/= Vfr.vfr @@ -1,6 +1,6 @@ // /** @file // -// Copyright (c) 2016, Intel Corporation. All rights reserved.
+// Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
// // This program and the accompanying materials // are licensed and made available under the terms and conditions of the = BSD License @@ -115,7 +115,7 @@ formset #include "Thermal.vfi" #include "SystemComponent.vfi" #include "DebugConfig.vfi" - #include "AcpiSetup.Vfi" - #include "RTD3.Vfi" + #include "AcpiSetup.vfi" + #include "RtD3.vfi" =20 endformset; diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSmm/Platform.c b/Pl= atform/BroxtonPlatformPkg/Common/PlatformSmm/Platform.c index e0c6c7138..b0c96267d 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSmm/Platform.c +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSmm/Platform.c @@ -124,6 +124,7 @@ CpuSmmSxWorkAround( =20 **/ EFI_STATUS +EFIAPI InitializePlatformSmm ( IN EFI_HANDLE ImageHandle, IN EFI_SYSTEM_TABLE *SystemTable @@ -210,7 +211,7 @@ InitializePlatformSmm ( PowerButtonContext.Phase =3D EfiPowerButtonEntry; Status =3D PowerButtonDispatch->Register( PowerButtonDispatch, - PowerButtonCallback, + (EFI_SMM_HANDLER_ENTRY_POINT2)PowerBut= tonCallback, &PowerButtonContext, &Handle ); @@ -235,7 +236,7 @@ InitializePlatformSmm ( =20 Status =3D SxDispatch->Register ( SxDispatch, - SxSleepEntryCallBack, + (EFI_SMM_HANDLER_ENTRY_POINT2)SxSleepEntryCallBac= k, &EntryDispatchContext, &Handle ); @@ -244,7 +245,7 @@ InitializePlatformSmm ( =20 Status =3D SxDispatch->Register ( SxDispatch, - S4S5CallBack, + (EFI_SMM_HANDLER_ENTRY_POINT2)S4S5CallBack, &EntryDispatchContext, &Handle ); @@ -254,7 +255,7 @@ InitializePlatformSmm ( =20 Status =3D SxDispatch->Register ( SxDispatch, - S4S5CallBack, + (EFI_SMM_HANDLER_ENTRY_POINT2)S4S5CallBack, &EntryDispatchContext, &Handle ); @@ -262,7 +263,7 @@ InitializePlatformSmm ( =20 Status =3D SxDispatch->Register ( SxDispatch, - S5SleepAcLossCallBack, + (EFI_SMM_HANDLER_ENTRY_POINT2)S5SleepAcLossCallBa= ck, &EntryDispatchContext, &Handle ); @@ -284,7 +285,7 @@ InitializePlatformSmm ( SwContext.SwSmiInputValue =3D ACPI_ENABLE; Status =3D SwDispatch->Register ( SwDispatch, - EnableAcpiCallback, + (EFI_SMM_HANDLER_ENTRY_POINT2)EnableAcpiCallback, &SwContext, &Handle ); @@ -296,7 +297,7 @@ InitializePlatformSmm ( SwContext.SwSmiInputValue =3D ACPI_DISABLE; Status =3D SwDispatch->Register ( SwDispatch, - DisableAcpiCallback, + (EFI_SMM_HANDLER_ENTRY_POINT2)DisableAcpiCallback, &SwContext, &Handle ); @@ -309,7 +310,7 @@ InitializePlatformSmm ( =20 Status =3D SwDispatch->Register ( SwDispatch, - TpmPtsSmbsCallback, + (EFI_SMM_HANDLER_ENTRY_POINT2)TpmPtsSmbsCallback, &SwContext, &Handle ); @@ -344,7 +345,7 @@ InitializePlatformSmm ( IchnContext.Type =3D mTco1Sources[Index]; Status =3D IchnDispatch->Register( IchnDispatch, - DummyTco1Callback, + (EFI_SMM_ICHN_DISPATCH)DummyTco1Callback, &IchnContext, &Handle ); diff --git a/Platform/BroxtonPlatformPkg/Common/PnpDxe/AunitBiosSettings.h = b/Platform/BroxtonPlatformPkg/Common/PnpDxe/AunitBiosSettings.h index 1aa293442..a4bb16a9b 100644 --- a/Platform/BroxtonPlatformPkg/Common/PnpDxe/AunitBiosSettings.h +++ b/Platform/BroxtonPlatformPkg/Common/PnpDxe/AunitBiosSettings.h @@ -1,5 +1,5 @@ /** @file - Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -16,128 +16,128 @@ =20 #define AUNIT_VALUEFORPERF_MSG_VALUES_PLATFORM_DEFAULT \ \ - 0x4d, 0x6430, 7, 0, 0x1, \ - 0x4d, 0x6430, 15, 8, 0x1, \ - 0x4d, 0x6430, 23, 16, 0x0, \ - 0x4d, 0x6430, 31, 24, 0x1, \ - 0x4d, 0x6434, 7, 0, 0x0, \ - 0x4d, 0x6434, 15, 8, 0x1, \ - 0x4d, 0x6434, 23, 16, 0x1, \ - 0x4d, 0x6434, 31, 24, 0x1, \ - 0x4d, 0x6438, 7, 0, 0x1, \ - 0x4d, 0x6438, 15, 8, 0x1, \ - 0x4d, 0x6438, 23, 16, 0x1, \ - 0x4d, 0x6438, 31, 24, 0x1, \ - 0x4d, 0x643c, 7, 0, 0x1, \ - 0x4d, 0x643c, 15, 8, 0x1, \ - 0x4d, 0x643c, 23, 16, 0x1, \ - 0x4d, 0x643c, 31, 24, 0x1, \ - 0x4d, 0x6440, 7, 0, 0x1, \ - 0x4d, 0x6440, 15, 8, 0x1, \ - 0x4d, 0x6440, 23, 16, 0x0, \ - 0x4d, 0x6440, 31, 24, 0x0, \ - 0x4d, 0x6444, 7, 0, 0x1, \ - 0x4d, 0x6444, 15, 8, 0x1, \ - 0x4d, 0x6444, 23, 16, 0x1, \ - 0x4d, 0x6448, 7, 0, 0x8, \ - 0x4d, 0x6448, 15, 8, 0xff, \ - 0x4d, 0x6448, 23, 16, 0xff, \ - 0x4d, 0x6448, 31, 24, 0xff, \ - 0x4d, 0x644c, 7, 0, 0xff, \ - 0x4d, 0x644c, 15, 8, 0xff, \ - 0x4d, 0x644c, 23, 16, 0xff, \ - 0x4d, 0x644c, 31, 24, 0xff, \ - 0x4d, 0x6450, 0, 0, 0x0, \ - 0x4d, 0x6450, 1, 1, 0x0, \ - 0x4d, 0x6450, 3, 2, 0x2, \ - 0x4d, 0x6450, 19, 6, 0x9, \ - 0x4d, 0x6450, 51, 38, 0x36, \ - 0x4d, 0x6484, 7, 0, 0xff, \ - 0x4d, 0x6484, 23, 16, 0xff \ + {0x4d, 0x6430, 7, 0, 0x1}, \ + {0x4d, 0x6430, 15, 8, 0x1}, \ + {0x4d, 0x6430, 23, 16, 0x0}, \ + {0x4d, 0x6430, 31, 24, 0x1}, \ + {0x4d, 0x6434, 7, 0, 0x0}, \ + {0x4d, 0x6434, 15, 8, 0x1}, \ + {0x4d, 0x6434, 23, 16, 0x1}, \ + {0x4d, 0x6434, 31, 24, 0x1}, \ + {0x4d, 0x6438, 7, 0, 0x1}, \ + {0x4d, 0x6438, 15, 8, 0x1}, \ + {0x4d, 0x6438, 23, 16, 0x1}, \ + {0x4d, 0x6438, 31, 24, 0x1}, \ + {0x4d, 0x643c, 7, 0, 0x1}, \ + {0x4d, 0x643c, 15, 8, 0x1}, \ + {0x4d, 0x643c, 23, 16, 0x1}, \ + {0x4d, 0x643c, 31, 24, 0x1}, \ + {0x4d, 0x6440, 7, 0, 0x1}, \ + {0x4d, 0x6440, 15, 8, 0x1}, \ + {0x4d, 0x6440, 23, 16, 0x0}, \ + {0x4d, 0x6440, 31, 24, 0x0}, \ + {0x4d, 0x6444, 7, 0, 0x1}, \ + {0x4d, 0x6444, 15, 8, 0x1}, \ + {0x4d, 0x6444, 23, 16, 0x1}, \ + {0x4d, 0x6448, 7, 0, 0x8}, \ + {0x4d, 0x6448, 15, 8, 0xff}, \ + {0x4d, 0x6448, 23, 16, 0xff}, \ + {0x4d, 0x6448, 31, 24, 0xff}, \ + {0x4d, 0x644c, 7, 0, 0xff}, \ + {0x4d, 0x644c, 15, 8, 0xff}, \ + {0x4d, 0x644c, 23, 16, 0xff}, \ + {0x4d, 0x644c, 31, 24, 0xff}, \ + {0x4d, 0x6450, 0, 0, 0x0}, \ + {0x4d, 0x6450, 1, 1, 0x0}, \ + {0x4d, 0x6450, 3, 2, 0x2}, \ + {0x4d, 0x6450, 19, 6, 0x9}, \ + {0x4d, 0x6450, 51, 38, 0x36}, \ + {0x4d, 0x6484, 7, 0, 0xff}, \ + {0x4d, 0x6484, 23, 16, 0xff} \ =20 =20 #define AUNIT_VALUEFORPOWER_MSG_VALUES_PLATFORM_DEFAULT \ \ - 0x4d, 0x6430, 7, 0, 0x1, \ - 0x4d, 0x6430, 15, 8, 0x1, \ - 0x4d, 0x6430, 23, 16, 0x0, \ - 0x4d, 0x6430, 31, 24, 0x1, \ - 0x4d, 0x6434, 7, 0, 0x0, \ - 0x4d, 0x6434, 15, 8, 0x1, \ - 0x4d, 0x6434, 23, 16, 0x1, \ - 0x4d, 0x6434, 31, 24, 0x1, \ - 0x4d, 0x6438, 7, 0, 0x1, \ - 0x4d, 0x6438, 15, 8, 0x1, \ - 0x4d, 0x6438, 23, 16, 0x1, \ - 0x4d, 0x6438, 31, 24, 0x1, \ - 0x4d, 0x643c, 7, 0, 0x1, \ - 0x4d, 0x643c, 15, 8, 0x1, \ - 0x4d, 0x643c, 23, 16, 0x1, \ - 0x4d, 0x643c, 31, 24, 0x1, \ - 0x4d, 0x6440, 7, 0, 0x1, \ - 0x4d, 0x6440, 15, 8, 0x1, \ - 0x4d, 0x6440, 23, 16, 0x0, \ - 0x4d, 0x6440, 31, 24, 0x0, \ - 0x4d, 0x6444, 7, 0, 0x1, \ - 0x4d, 0x6444, 15, 8, 0x1, \ - 0x4d, 0x6444, 23, 16, 0x1, \ - 0x4d, 0x6448, 7, 0, 0x8, \ - 0x4d, 0x6448, 15, 8, 0xff, \ - 0x4d, 0x6448, 23, 16, 0xff, \ - 0x4d, 0x6448, 31, 24, 0xff, \ - 0x4d, 0x644c, 7, 0, 0xff, \ - 0x4d, 0x644c, 15, 8, 0xff, \ - 0x4d, 0x644c, 23, 16, 0xff, \ - 0x4d, 0x644c, 31, 24, 0xff, \ - 0x4d, 0x6450, 0, 0, 0x0, \ - 0x4d, 0x6450, 1, 1, 0x0, \ - 0x4d, 0x6450, 3, 2, 0x2, \ - 0x4d, 0x6450, 19, 6, 0x9, \ - 0x4d, 0x6450, 51, 38, 0x36, \ - 0x4d, 0x6484, 7, 0, 0xff, \ - 0x4d, 0x6484, 23, 16, 0xff \ + {0x4d, 0x6430, 7, 0, 0x1}, \ + {0x4d, 0x6430, 15, 8, 0x1}, \ + {0x4d, 0x6430, 23, 16, 0x0}, \ + {0x4d, 0x6430, 31, 24, 0x1}, \ + {0x4d, 0x6434, 7, 0, 0x0}, \ + {0x4d, 0x6434, 15, 8, 0x1}, \ + {0x4d, 0x6434, 23, 16, 0x1}, \ + {0x4d, 0x6434, 31, 24, 0x1}, \ + {0x4d, 0x6438, 7, 0, 0x1}, \ + {0x4d, 0x6438, 15, 8, 0x1}, \ + {0x4d, 0x6438, 23, 16, 0x1}, \ + {0x4d, 0x6438, 31, 24, 0x1}, \ + {0x4d, 0x643c, 7, 0, 0x1}, \ + {0x4d, 0x643c, 15, 8, 0x1}, \ + {0x4d, 0x643c, 23, 16, 0x1}, \ + {0x4d, 0x643c, 31, 24, 0x1}, \ + {0x4d, 0x6440, 7, 0, 0x1}, \ + {0x4d, 0x6440, 15, 8, 0x1}, \ + {0x4d, 0x6440, 23, 16, 0x0}, \ + {0x4d, 0x6440, 31, 24, 0x0}, \ + {0x4d, 0x6444, 7, 0, 0x1}, \ + {0x4d, 0x6444, 15, 8, 0x1}, \ + {0x4d, 0x6444, 23, 16, 0x1}, \ + {0x4d, 0x6448, 7, 0, 0x8}, \ + {0x4d, 0x6448, 15, 8, 0xff}, \ + {0x4d, 0x6448, 23, 16, 0xff}, \ + {0x4d, 0x6448, 31, 24, 0xff}, \ + {0x4d, 0x644c, 7, 0, 0xff}, \ + {0x4d, 0x644c, 15, 8, 0xff}, \ + {0x4d, 0x644c, 23, 16, 0xff}, \ + {0x4d, 0x644c, 31, 24, 0xff}, \ + {0x4d, 0x6450, 0, 0, 0x0}, \ + {0x4d, 0x6450, 1, 1, 0x0}, \ + {0x4d, 0x6450, 3, 2, 0x2}, \ + {0x4d, 0x6450, 19, 6, 0x9}, \ + {0x4d, 0x6450, 51, 38, 0x36}, \ + {0x4d, 0x6484, 7, 0, 0xff}, \ + {0x4d, 0x6484, 23, 16, 0xff} \ =20 =20 #define AUNIT_VALUEFORPWRPERF_MSG_VALUES_PLATFORM_DEFAULT \ \ - 0x4d, 0x6430, 7, 0, 0x1, \ - 0x4d, 0x6430, 15, 8, 0x1, \ - 0x4d, 0x6430, 23, 16, 0x0, \ - 0x4d, 0x6430, 31, 24, 0x1, \ - 0x4d, 0x6434, 7, 0, 0x0, \ - 0x4d, 0x6434, 15, 8, 0x1, \ - 0x4d, 0x6434, 23, 16, 0x1, \ - 0x4d, 0x6434, 31, 24, 0x1, \ - 0x4d, 0x6438, 7, 0, 0x1, \ - 0x4d, 0x6438, 15, 8, 0x1, \ - 0x4d, 0x6438, 23, 16, 0x1, \ - 0x4d, 0x6438, 31, 24, 0x1, \ - 0x4d, 0x643c, 7, 0, 0x1, \ - 0x4d, 0x643c, 15, 8, 0x1, \ - 0x4d, 0x643c, 23, 16, 0x1, \ - 0x4d, 0x643c, 31, 24, 0x1, \ - 0x4d, 0x6440, 7, 0, 0x1, \ - 0x4d, 0x6440, 15, 8, 0x1, \ - 0x4d, 0x6440, 23, 16, 0x0, \ - 0x4d, 0x6440, 31, 24, 0x0, \ - 0x4d, 0x6444, 7, 0, 0x1, \ - 0x4d, 0x6444, 15, 8, 0x1, \ - 0x4d, 0x6444, 23, 16, 0x1, \ - 0x4d, 0x6448, 7, 0, 0x8, \ - 0x4d, 0x6448, 15, 8, 0xff, \ - 0x4d, 0x6448, 23, 16, 0xff, \ - 0x4d, 0x6448, 31, 24, 0xff, \ - 0x4d, 0x644c, 7, 0, 0xff, \ - 0x4d, 0x644c, 15, 8, 0xff, \ - 0x4d, 0x644c, 23, 16, 0xff, \ - 0x4d, 0x644c, 31, 24, 0xff, \ - 0x4d, 0x6450, 0, 0, 0x0, \ - 0x4d, 0x6450, 1, 1, 0x0, \ - 0x4d, 0x6450, 3, 2, 0x2, \ - 0x4d, 0x6450, 19, 6, 0x9, \ - 0x4d, 0x6450, 51, 38, 0x36, \ - 0x4d, 0x6484, 7, 0, 0xff, \ - 0x4d, 0x6484, 23, 16, 0xff \ + {0x4d, 0x6430, 7, 0, 0x1}, \ + {0x4d, 0x6430, 15, 8, 0x1}, \ + {0x4d, 0x6430, 23, 16, 0x0}, \ + {0x4d, 0x6430, 31, 24, 0x1}, \ + {0x4d, 0x6434, 7, 0, 0x0}, \ + {0x4d, 0x6434, 15, 8, 0x1}, \ + {0x4d, 0x6434, 23, 16, 0x1}, \ + {0x4d, 0x6434, 31, 24, 0x1}, \ + {0x4d, 0x6438, 7, 0, 0x1}, \ + {0x4d, 0x6438, 15, 8, 0x1}, \ + {0x4d, 0x6438, 23, 16, 0x1}, \ + {0x4d, 0x6438, 31, 24, 0x1}, \ + {0x4d, 0x643c, 7, 0, 0x1}, \ + {0x4d, 0x643c, 15, 8, 0x1}, \ + {0x4d, 0x643c, 23, 16, 0x1}, \ + {0x4d, 0x643c, 31, 24, 0x1}, \ + {0x4d, 0x6440, 7, 0, 0x1}, \ + {0x4d, 0x6440, 15, 8, 0x1}, \ + {0x4d, 0x6440, 23, 16, 0x0}, \ + {0x4d, 0x6440, 31, 24, 0x0}, \ + {0x4d, 0x6444, 7, 0, 0x1}, \ + {0x4d, 0x6444, 15, 8, 0x1}, \ + {0x4d, 0x6444, 23, 16, 0x1}, \ + {0x4d, 0x6448, 7, 0, 0x8}, \ + {0x4d, 0x6448, 15, 8, 0xff}, \ + {0x4d, 0x6448, 23, 16, 0xff}, \ + {0x4d, 0x6448, 31, 24, 0xff}, \ + {0x4d, 0x644c, 7, 0, 0xff}, \ + {0x4d, 0x644c, 15, 8, 0xff}, \ + {0x4d, 0x644c, 23, 16, 0xff}, \ + {0x4d, 0x644c, 31, 24, 0xff}, \ + {0x4d, 0x6450, 0, 0, 0x0}, \ + {0x4d, 0x6450, 1, 1, 0x0}, \ + {0x4d, 0x6450, 3, 2, 0x2}, \ + {0x4d, 0x6450, 19, 6, 0x9}, \ + {0x4d, 0x6450, 51, 38, 0x36}, \ + {0x4d, 0x6484, 7, 0, 0xff}, \ + {0x4d, 0x6484, 23, 16, 0xff} \ =20 =20 #endif // AUNIT_BIOS_SETTINGS_HH diff --git a/Platform/BroxtonPlatformPkg/Common/PnpDxe/BunitBiosSettings.h = b/Platform/BroxtonPlatformPkg/Common/PnpDxe/BunitBiosSettings.h index fa41473a6..a88c5b2bb 100644 --- a/Platform/BroxtonPlatformPkg/Common/PnpDxe/BunitBiosSettings.h +++ b/Platform/BroxtonPlatformPkg/Common/PnpDxe/BunitBiosSettings.h @@ -1,5 +1,5 @@ /** @file - Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -16,116 +16,116 @@ =20 #define BUNIT_VALUEFORPERF_MSG_VALUES_PLATFORM_DEFAULT \ \ - 0x4c, 0x6d4c, 5, 0, 0x8, \ - 0x4c, 0x6d4c, 13, 8, 0x8, \ - 0x4c, 0x6d4c, 21, 16, 0x8, \ - 0x4c, 0x6d4c, 29, 24, 0x8, \ - 0x4c, 0x6d50, 5, 0, 0x8, \ - 0x4c, 0x6d50, 13, 8, 0x8, \ - 0x4c, 0x6d50, 21, 16, 0x8, \ - 0x4c, 0x6d50, 29, 24, 0x8, \ - 0x4c, 0x6d54, 5, 0, 0x8, \ - 0x4c, 0x6d54, 13, 8, 0x8, \ - 0x4c, 0x6d54, 21, 16, 0x8, \ - 0x4c, 0x6d54, 29, 24, 0x8, \ - 0x4c, 0x6d58, 5, 0, 0x8, \ - 0x4c, 0x6d58, 13, 8, 0x8, \ - 0x4c, 0x6d58, 21, 16, 0x8, \ - 0x4c, 0x6d58, 29, 24, 0x8, \ - 0x4c, 0x6d5c, 5, 0, 0x8, \ - 0x4c, 0x6d5c, 13, 8, 0x8, \ - 0x4c, 0x6d5c, 21, 16, 0x8, \ - 0x4c, 0x6d5c, 29, 24, 0x8, \ - 0x4c, 0x6d60, 5, 0, 0x8, \ - 0x4c, 0x6d60, 13, 8, 0x8, \ - 0x4c, 0x6d60, 21, 16, 0x8, \ - 0x4c, 0x6d60, 29, 24, 0x8, \ - 0x4c, 0x6d64, 7, 0, 0x1b, \ - 0x4c, 0x6d64, 15, 8, 0x0, \ - 0x4c, 0x6d64, 31, 24, 0x27, \ - 0x4c, 0x6d68, 5, 0, 0x1, \ - 0x4c, 0x6d68, 13, 8, 0x1, \ - 0x4c, 0x6d68, 31, 31, 0x0, \ - 0x4c, 0x6d6c, 5, 0, 0xf, \ - 0x4c, 0x6d6c, 13, 8, 0x3f, \ - 0x4c, 0x6d6c, 31, 31, 0x1, \ - 0x4c, 0x6d70, 0, 0, 0x0 \ + {0x4c, 0x6d4c, 5, 0, 0x8}, \ + {0x4c, 0x6d4c, 13, 8, 0x8}, \ + {0x4c, 0x6d4c, 21, 16, 0x8}, \ + {0x4c, 0x6d4c, 29, 24, 0x8}, \ + {0x4c, 0x6d50, 5, 0, 0x8}, \ + {0x4c, 0x6d50, 13, 8, 0x8}, \ + {0x4c, 0x6d50, 21, 16, 0x8}, \ + {0x4c, 0x6d50, 29, 24, 0x8}, \ + {0x4c, 0x6d54, 5, 0, 0x8}, \ + {0x4c, 0x6d54, 13, 8, 0x8}, \ + {0x4c, 0x6d54, 21, 16, 0x8}, \ + {0x4c, 0x6d54, 29, 24, 0x8}, \ + {0x4c, 0x6d58, 5, 0, 0x8}, \ + {0x4c, 0x6d58, 13, 8, 0x8}, \ + {0x4c, 0x6d58, 21, 16, 0x8}, \ + {0x4c, 0x6d58, 29, 24, 0x8}, \ + {0x4c, 0x6d5c, 5, 0, 0x8}, \ + {0x4c, 0x6d5c, 13, 8, 0x8}, \ + {0x4c, 0x6d5c, 21, 16, 0x8}, \ + {0x4c, 0x6d5c, 29, 24, 0x8}, \ + {0x4c, 0x6d60, 5, 0, 0x8}, \ + {0x4c, 0x6d60, 13, 8, 0x8}, \ + {0x4c, 0x6d60, 21, 16, 0x8}, \ + {0x4c, 0x6d60, 29, 24, 0x8}, \ + {0x4c, 0x6d64, 7, 0, 0x1b}, \ + {0x4c, 0x6d64, 15, 8, 0x0}, \ + {0x4c, 0x6d64, 31, 24, 0x27}, \ + {0x4c, 0x6d68, 5, 0, 0x1}, \ + {0x4c, 0x6d68, 13, 8, 0x1}, \ + {0x4c, 0x6d68, 31, 31, 0x0}, \ + {0x4c, 0x6d6c, 5, 0, 0xf}, \ + {0x4c, 0x6d6c, 13, 8, 0x3f}, \ + {0x4c, 0x6d6c, 31, 31, 0x1}, \ + {0x4c, 0x6d70, 0, 0, 0x0} \ =20 =20 #define BUNIT_VALUEFORPOWER_MSG_VALUES_PLATFORM_DEFAULT \ \ - 0x4c, 0x6d4c, 5, 0, 0x4, \ - 0x4c, 0x6d4c, 13, 8, 0x4, \ - 0x4c, 0x6d4c, 21, 16, 0x4, \ - 0x4c, 0x6d4c, 29, 24, 0x4, \ - 0x4c, 0x6d50, 5, 0, 0x4, \ - 0x4c, 0x6d50, 13, 8, 0x4, \ - 0x4c, 0x6d50, 21, 16, 0x4, \ - 0x4c, 0x6d50, 29, 24, 0x4, \ - 0x4c, 0x6d54, 5, 0, 0x4, \ - 0x4c, 0x6d54, 13, 8, 0x4, \ - 0x4c, 0x6d54, 21, 16, 0x4, \ - 0x4c, 0x6d54, 29, 24, 0x4, \ - 0x4c, 0x6d58, 5, 0, 0x4, \ - 0x4c, 0x6d58, 13, 8, 0x4, \ - 0x4c, 0x6d58, 21, 16, 0x4, \ - 0x4c, 0x6d58, 29, 24, 0x4, \ - 0x4c, 0x6d5c, 5, 0, 0x4, \ - 0x4c, 0x6d5c, 13, 8, 0x4, \ - 0x4c, 0x6d5c, 21, 16, 0x4, \ - 0x4c, 0x6d5c, 29, 24, 0x4, \ - 0x4c, 0x6d60, 5, 0, 0x4, \ - 0x4c, 0x6d60, 13, 8, 0x4, \ - 0x4c, 0x6d60, 21, 16, 0x4, \ - 0x4c, 0x6d60, 29, 24, 0x4, \ - 0x4c, 0x6d64, 7, 0, 0x0, \ - 0x4c, 0x6d64, 15, 8, 0x0, \ - 0x4c, 0x6d64, 31, 24, 0x0, \ - 0x4c, 0x6d68, 5, 0, 0x0, \ - 0x4c, 0x6d68, 13, 8, 0x0, \ - 0x4c, 0x6d68, 31, 31, 0x0, \ - 0x4c, 0x6d6c, 5, 0, 0x0, \ - 0x4c, 0x6d6c, 13, 8, 0x0, \ - 0x4c, 0x6d6c, 31, 31, 0x0, \ - 0x4c, 0x6d70, 0, 0, 0x0 \ + {0x4c, 0x6d4c, 5, 0, 0x4}, \ + {0x4c, 0x6d4c, 13, 8, 0x4}, \ + {0x4c, 0x6d4c, 21, 16, 0x4}, \ + {0x4c, 0x6d4c, 29, 24, 0x4}, \ + {0x4c, 0x6d50, 5, 0, 0x4}, \ + {0x4c, 0x6d50, 13, 8, 0x4}, \ + {0x4c, 0x6d50, 21, 16, 0x4}, \ + {0x4c, 0x6d50, 29, 24, 0x4}, \ + {0x4c, 0x6d54, 5, 0, 0x4}, \ + {0x4c, 0x6d54, 13, 8, 0x4}, \ + {0x4c, 0x6d54, 21, 16, 0x4}, \ + {0x4c, 0x6d54, 29, 24, 0x4}, \ + {0x4c, 0x6d58, 5, 0, 0x4}, \ + {0x4c, 0x6d58, 13, 8, 0x4}, \ + {0x4c, 0x6d58, 21, 16, 0x4}, \ + {0x4c, 0x6d58, 29, 24, 0x4}, \ + {0x4c, 0x6d5c, 5, 0, 0x4}, \ + {0x4c, 0x6d5c, 13, 8, 0x4}, \ + {0x4c, 0x6d5c, 21, 16, 0x4}, \ + {0x4c, 0x6d5c, 29, 24, 0x4}, \ + {0x4c, 0x6d60, 5, 0, 0x4}, \ + {0x4c, 0x6d60, 13, 8, 0x4}, \ + {0x4c, 0x6d60, 21, 16, 0x4}, \ + {0x4c, 0x6d60, 29, 24, 0x4}, \ + {0x4c, 0x6d64, 7, 0, 0x0}, \ + {0x4c, 0x6d64, 15, 8, 0x0}, \ + {0x4c, 0x6d64, 31, 24, 0x0}, \ + {0x4c, 0x6d68, 5, 0, 0x0}, \ + {0x4c, 0x6d68, 13, 8, 0x0}, \ + {0x4c, 0x6d68, 31, 31, 0x0}, \ + {0x4c, 0x6d6c, 5, 0, 0x0}, \ + {0x4c, 0x6d6c, 13, 8, 0x0}, \ + {0x4c, 0x6d6c, 31, 31, 0x0}, \ + {0x4c, 0x6d70, 0, 0, 0x0} \ =20 =20 #define BUNIT_VALUEFORPWRPERF_MSG_VALUES_PLATFORM_DEFAULT \ \ - 0x4c, 0x6d4c, 5, 0, 0x4, \ - 0x4c, 0x6d4c, 13, 8, 0x4, \ - 0x4c, 0x6d4c, 21, 16, 0x4, \ - 0x4c, 0x6d4c, 29, 24, 0x4, \ - 0x4c, 0x6d50, 5, 0, 0x4, \ - 0x4c, 0x6d50, 13, 8, 0x4, \ - 0x4c, 0x6d50, 21, 16, 0x4, \ - 0x4c, 0x6d50, 29, 24, 0x4, \ - 0x4c, 0x6d54, 5, 0, 0x4, \ - 0x4c, 0x6d54, 13, 8, 0x4, \ - 0x4c, 0x6d54, 21, 16, 0x4, \ - 0x4c, 0x6d54, 29, 24, 0x4, \ - 0x4c, 0x6d58, 5, 0, 0x4, \ - 0x4c, 0x6d58, 13, 8, 0x4, \ - 0x4c, 0x6d58, 21, 16, 0x4, \ - 0x4c, 0x6d58, 29, 24, 0x4, \ - 0x4c, 0x6d5c, 5, 0, 0x4, \ - 0x4c, 0x6d5c, 13, 8, 0x4, \ - 0x4c, 0x6d5c, 21, 16, 0x4, \ - 0x4c, 0x6d5c, 29, 24, 0x4, \ - 0x4c, 0x6d60, 5, 0, 0x4, \ - 0x4c, 0x6d60, 13, 8, 0x4, \ - 0x4c, 0x6d60, 21, 16, 0x4, \ - 0x4c, 0x6d60, 29, 24, 0x4, \ - 0x4c, 0x6d64, 7, 0, 0x0, \ - 0x4c, 0x6d64, 15, 8, 0x0, \ - 0x4c, 0x6d64, 31, 24, 0x0, \ - 0x4c, 0x6d68, 5, 0, 0x0, \ - 0x4c, 0x6d68, 13, 8, 0x0, \ - 0x4c, 0x6d68, 31, 31, 0x0, \ - 0x4c, 0x6d6c, 5, 0, 0x0, \ - 0x4c, 0x6d6c, 13, 8, 0x0, \ - 0x4c, 0x6d6c, 31, 31, 0x0, \ - 0x4c, 0x6d70, 0, 0, 0x0 \ + {0x4c, 0x6d4c, 5, 0, 0x4}, \ + {0x4c, 0x6d4c, 13, 8, 0x4}, \ + {0x4c, 0x6d4c, 21, 16, 0x4}, \ + {0x4c, 0x6d4c, 29, 24, 0x4}, \ + {0x4c, 0x6d50, 5, 0, 0x4}, \ + {0x4c, 0x6d50, 13, 8, 0x4}, \ + {0x4c, 0x6d50, 21, 16, 0x4}, \ + {0x4c, 0x6d50, 29, 24, 0x4}, \ + {0x4c, 0x6d54, 5, 0, 0x4}, \ + {0x4c, 0x6d54, 13, 8, 0x4}, \ + {0x4c, 0x6d54, 21, 16, 0x4}, \ + {0x4c, 0x6d54, 29, 24, 0x4}, \ + {0x4c, 0x6d58, 5, 0, 0x4}, \ + {0x4c, 0x6d58, 13, 8, 0x4}, \ + {0x4c, 0x6d58, 21, 16, 0x4}, \ + {0x4c, 0x6d58, 29, 24, 0x4}, \ + {0x4c, 0x6d5c, 5, 0, 0x4}, \ + {0x4c, 0x6d5c, 13, 8, 0x4}, \ + {0x4c, 0x6d5c, 21, 16, 0x4}, \ + {0x4c, 0x6d5c, 29, 24, 0x4}, \ + {0x4c, 0x6d60, 5, 0, 0x4}, \ + {0x4c, 0x6d60, 13, 8, 0x4}, \ + {0x4c, 0x6d60, 21, 16, 0x4}, \ + {0x4c, 0x6d60, 29, 24, 0x4}, \ + {0x4c, 0x6d64, 7, 0, 0x0}, \ + {0x4c, 0x6d64, 15, 8, 0x0}, \ + {0x4c, 0x6d64, 31, 24, 0x0}, \ + {0x4c, 0x6d68, 5, 0, 0x0}, \ + {0x4c, 0x6d68, 13, 8, 0x0}, \ + {0x4c, 0x6d68, 31, 31, 0x0}, \ + {0x4c, 0x6d6c, 5, 0, 0x0}, \ + {0x4c, 0x6d6c, 13, 8, 0x0}, \ + {0x4c, 0x6d6c, 31, 31, 0x0}, \ + {0x4c, 0x6d70, 0, 0, 0x0} \ =20 =20 #endif // BUNIT_BIOS_SETTINGS_HH diff --git a/Platform/BroxtonPlatformPkg/Common/PnpDxe/TunitBiosSettings.h = b/Platform/BroxtonPlatformPkg/Common/PnpDxe/TunitBiosSettings.h index 1b69f623b..67273e38a 100644 --- a/Platform/BroxtonPlatformPkg/Common/PnpDxe/TunitBiosSettings.h +++ b/Platform/BroxtonPlatformPkg/Common/PnpDxe/TunitBiosSettings.h @@ -1,5 +1,5 @@ /** @file - Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -16,152 +16,152 @@ =20 #define TUNIT_VALUEFORPERF_MSG_VALUES_PLATFORM_DEFAULT \ \ - 0x52, 0x7810, 0, 0, 0x0, \ - 0x52, 0x7810, 1, 1, 0x0, \ - 0x52, 0x7810, 2, 2, 0x0, \ - 0x52, 0x7810, 3, 3, 0x0, \ - 0x52, 0x7810, 7, 7, 0x0, \ - 0x52, 0x7810, 18, 18, 0x0, \ - 0x52, 0x7810, 19, 19, 0x0, \ - 0x52, 0x7810, 20, 20, 0x0, \ - 0x52, 0x781c, 0, 0, 0x1, \ - 0x52, 0x781c, 1, 1, 0x1, \ - 0x52, 0x781c, 2, 2, 0x0, \ - 0x52, 0x781c, 3, 3, 0x0, \ - 0x52, 0x781c, 4, 4, 0x1, \ - 0x52, 0x781c, 5, 5, 0x1, \ - 0x52, 0x781c, 6, 6, 0x1, \ - 0x52, 0x781c, 7, 7, 0x1, \ - 0x52, 0x7820, 0, 0, 0x1, \ - 0x52, 0x7820, 1, 1, 0x1, \ - 0x52, 0x7820, 2, 2, 0x0, \ - 0x52, 0x7820, 3, 3, 0x0, \ - 0x52, 0x7820, 4, 4, 0x1, \ - 0x52, 0x7820, 5, 5, 0x1, \ - 0x52, 0x7820, 6, 6, 0x1, \ - 0x52, 0x7820, 7, 7, 0x1, \ - 0x52, 0x523c, 0, 0, 0x0, \ - 0x52, 0x523c, 2, 2, 0x0, \ - 0x52, 0x523c, 3, 3, 0x0, \ - 0x52, 0x523c, 18, 18, 0x0, \ - 0x52, 0x523c, 19, 19, 0x0, \ - 0x52, 0x523c, 20, 20, 0x0, \ - 0x52, 0x5288, 0, 0, 0x1, \ - 0x52, 0x5288, 1, 1, 0x1, \ - 0x52, 0x5288, 2, 2, 0x0, \ - 0x52, 0x5288, 3, 3, 0x0, \ - 0x52, 0x5288, 4, 4, 0x1, \ - 0x52, 0x5288, 5, 5, 0x1, \ - 0x52, 0x5288, 6, 6, 0x1, \ - 0x52, 0x5288, 7, 7, 0x1, \ - 0x52, 0x528c, 0, 0, 0x1, \ - 0x52, 0x528c, 1, 1, 0x1, \ - 0x52, 0x528c, 2, 2, 0x0, \ - 0x52, 0x528c, 3, 3, 0x0, \ - 0x52, 0x528c, 4, 4, 0x1, \ - 0x52, 0x528c, 5, 5, 0x1, \ - 0x52, 0x528c, 6, 6, 0x1, \ - 0x52, 0x528c, 7, 7, 0x1 \ + {0x52, 0x7810, 0, 0, 0x0}, \ + {0x52, 0x7810, 1, 1, 0x0}, \ + {0x52, 0x7810, 2, 2, 0x0}, \ + {0x52, 0x7810, 3, 3, 0x0}, \ + {0x52, 0x7810, 7, 7, 0x0}, \ + {0x52, 0x7810, 18, 18, 0x0}, \ + {0x52, 0x7810, 19, 19, 0x0}, \ + {0x52, 0x7810, 20, 20, 0x0}, \ + {0x52, 0x781c, 0, 0, 0x1}, \ + {0x52, 0x781c, 1, 1, 0x1}, \ + {0x52, 0x781c, 2, 2, 0x0}, \ + {0x52, 0x781c, 3, 3, 0x0}, \ + {0x52, 0x781c, 4, 4, 0x1}, \ + {0x52, 0x781c, 5, 5, 0x1}, \ + {0x52, 0x781c, 6, 6, 0x1}, \ + {0x52, 0x781c, 7, 7, 0x1}, \ + {0x52, 0x7820, 0, 0, 0x1}, \ + {0x52, 0x7820, 1, 1, 0x1}, \ + {0x52, 0x7820, 2, 2, 0x0}, \ + {0x52, 0x7820, 3, 3, 0x0}, \ + {0x52, 0x7820, 4, 4, 0x1}, \ + {0x52, 0x7820, 5, 5, 0x1}, \ + {0x52, 0x7820, 6, 6, 0x1}, \ + {0x52, 0x7820, 7, 7, 0x1}, \ + {0x52, 0x523c, 0, 0, 0x0}, \ + {0x52, 0x523c, 2, 2, 0x0}, \ + {0x52, 0x523c, 3, 3, 0x0}, \ + {0x52, 0x523c, 18, 18, 0x0}, \ + {0x52, 0x523c, 19, 19, 0x0}, \ + {0x52, 0x523c, 20, 20, 0x0}, \ + {0x52, 0x5288, 0, 0, 0x1}, \ + {0x52, 0x5288, 1, 1, 0x1}, \ + {0x52, 0x5288, 2, 2, 0x0}, \ + {0x52, 0x5288, 3, 3, 0x0}, \ + {0x52, 0x5288, 4, 4, 0x1}, \ + {0x52, 0x5288, 5, 5, 0x1}, \ + {0x52, 0x5288, 6, 6, 0x1}, \ + {0x52, 0x5288, 7, 7, 0x1}, \ + {0x52, 0x528c, 0, 0, 0x1}, \ + {0x52, 0x528c, 1, 1, 0x1}, \ + {0x52, 0x528c, 2, 2, 0x0}, \ + {0x52, 0x528c, 3, 3, 0x0}, \ + {0x52, 0x528c, 4, 4, 0x1}, \ + {0x52, 0x528c, 5, 5, 0x1}, \ + {0x52, 0x528c, 6, 6, 0x1}, \ + {0x52, 0x528c, 7, 7, 0x1} \ =20 =20 #define TUNIT_VALUEFORPOWER_MSG_VALUES_PLATFORM_DEFAULT \ \ - 0x52, 0x7810, 0, 0, 0x0, \ - 0x52, 0x7810, 1, 1, 0x0, \ - 0x52, 0x7810, 2, 2, 0x0, \ - 0x52, 0x7810, 3, 3, 0x0, \ - 0x52, 0x7810, 7, 7, 0x0, \ - 0x52, 0x7810, 18, 18, 0x0, \ - 0x52, 0x7810, 19, 19, 0x0, \ - 0x52, 0x7810, 20, 20, 0x0, \ - 0x52, 0x781c, 0, 0, 0x1, \ - 0x52, 0x781c, 1, 1, 0x1, \ - 0x52, 0x781c, 2, 2, 0x0, \ - 0x52, 0x781c, 3, 3, 0x0, \ - 0x52, 0x781c, 4, 4, 0x1, \ - 0x52, 0x781c, 5, 5, 0x1, \ - 0x52, 0x781c, 6, 6, 0x1, \ - 0x52, 0x781c, 7, 7, 0x1, \ - 0x52, 0x7820, 0, 0, 0x1, \ - 0x52, 0x7820, 1, 1, 0x1, \ - 0x52, 0x7820, 2, 2, 0x0, \ - 0x52, 0x7820, 3, 3, 0x0, \ - 0x52, 0x7820, 4, 4, 0x1, \ - 0x52, 0x7820, 5, 5, 0x1, \ - 0x52, 0x7820, 6, 6, 0x1, \ - 0x52, 0x7820, 7, 7, 0x1, \ - 0x52, 0x523c, 0, 0, 0x0, \ - 0x52, 0x523c, 2, 2, 0x0, \ - 0x52, 0x523c, 3, 3, 0x0, \ - 0x52, 0x523c, 18, 18, 0x0, \ - 0x52, 0x523c, 19, 19, 0x0, \ - 0x52, 0x523c, 20, 20, 0x0, \ - 0x52, 0x5288, 0, 0, 0x1, \ - 0x52, 0x5288, 1, 1, 0x1, \ - 0x52, 0x5288, 2, 2, 0x0, \ - 0x52, 0x5288, 3, 3, 0x0, \ - 0x52, 0x5288, 4, 4, 0x1, \ - 0x52, 0x5288, 5, 5, 0x1, \ - 0x52, 0x5288, 6, 6, 0x1, \ - 0x52, 0x5288, 7, 7, 0x1, \ - 0x52, 0x528c, 0, 0, 0x1, \ - 0x52, 0x528c, 1, 1, 0x1, \ - 0x52, 0x528c, 2, 2, 0x0, \ - 0x52, 0x528c, 3, 3, 0x0, \ - 0x52, 0x528c, 4, 4, 0x1, \ - 0x52, 0x528c, 5, 5, 0x1, \ - 0x52, 0x528c, 6, 6, 0x1, \ - 0x52, 0x528c, 7, 7, 0x1 \ + {0x52, 0x7810, 0, 0, 0x0}, \ + {0x52, 0x7810, 1, 1, 0x0}, \ + {0x52, 0x7810, 2, 2, 0x0}, \ + {0x52, 0x7810, 3, 3, 0x0}, \ + {0x52, 0x7810, 7, 7, 0x0}, \ + {0x52, 0x7810, 18, 18, 0x0}, \ + {0x52, 0x7810, 19, 19, 0x0}, \ + {0x52, 0x7810, 20, 20, 0x0}, \ + {0x52, 0x781c, 0, 0, 0x1}, \ + {0x52, 0x781c, 1, 1, 0x1}, \ + {0x52, 0x781c, 2, 2, 0x0}, \ + {0x52, 0x781c, 3, 3, 0x0}, \ + {0x52, 0x781c, 4, 4, 0x1}, \ + {0x52, 0x781c, 5, 5, 0x1}, \ + {0x52, 0x781c, 6, 6, 0x1}, \ + {0x52, 0x781c, 7, 7, 0x1}, \ + {0x52, 0x7820, 0, 0, 0x1}, \ + {0x52, 0x7820, 1, 1, 0x1}, \ + {0x52, 0x7820, 2, 2, 0x0}, \ + {0x52, 0x7820, 3, 3, 0x0}, \ + {0x52, 0x7820, 4, 4, 0x1}, \ + {0x52, 0x7820, 5, 5, 0x1}, \ + {0x52, 0x7820, 6, 6, 0x1}, \ + {0x52, 0x7820, 7, 7, 0x1}, \ + {0x52, 0x523c, 0, 0, 0x0}, \ + {0x52, 0x523c, 2, 2, 0x0}, \ + {0x52, 0x523c, 3, 3, 0x0}, \ + {0x52, 0x523c, 18, 18, 0x0}, \ + {0x52, 0x523c, 19, 19, 0x0}, \ + {0x52, 0x523c, 20, 20, 0x0}, \ + {0x52, 0x5288, 0, 0, 0x1}, \ + {0x52, 0x5288, 1, 1, 0x1}, \ + {0x52, 0x5288, 2, 2, 0x0}, \ + {0x52, 0x5288, 3, 3, 0x0}, \ + {0x52, 0x5288, 4, 4, 0x1}, \ + {0x52, 0x5288, 5, 5, 0x1}, \ + {0x52, 0x5288, 6, 6, 0x1}, \ + {0x52, 0x5288, 7, 7, 0x1}, \ + {0x52, 0x528c, 0, 0, 0x1}, \ + {0x52, 0x528c, 1, 1, 0x1}, \ + {0x52, 0x528c, 2, 2, 0x0}, \ + {0x52, 0x528c, 3, 3, 0x0}, \ + {0x52, 0x528c, 4, 4, 0x1}, \ + {0x52, 0x528c, 5, 5, 0x1}, \ + {0x52, 0x528c, 6, 6, 0x1}, \ + {0x52, 0x528c, 7, 7, 0x1} \ =20 =20 #define TUNIT_VALUEFORPWRPERF_MSG_VALUES_PLATFORM_DEFAULT \ \ - 0x52, 0x7810, 0, 0, 0x0, \ - 0x52, 0x7810, 1, 1, 0x0, \ - 0x52, 0x7810, 2, 2, 0x0, \ - 0x52, 0x7810, 3, 3, 0x0, \ - 0x52, 0x7810, 7, 7, 0x0, \ - 0x52, 0x7810, 18, 18, 0x0, \ - 0x52, 0x7810, 19, 19, 0x0, \ - 0x52, 0x7810, 20, 20, 0x0, \ - 0x52, 0x781c, 0, 0, 0x1, \ - 0x52, 0x781c, 1, 1, 0x1, \ - 0x52, 0x781c, 2, 2, 0x0, \ - 0x52, 0x781c, 3, 3, 0x0, \ - 0x52, 0x781c, 4, 4, 0x1, \ - 0x52, 0x781c, 5, 5, 0x1, \ - 0x52, 0x781c, 6, 6, 0x1, \ - 0x52, 0x781c, 7, 7, 0x1, \ - 0x52, 0x7820, 0, 0, 0x1, \ - 0x52, 0x7820, 1, 1, 0x1, \ - 0x52, 0x7820, 2, 2, 0x0, \ - 0x52, 0x7820, 3, 3, 0x0, \ - 0x52, 0x7820, 4, 4, 0x1, \ - 0x52, 0x7820, 5, 5, 0x1, \ - 0x52, 0x7820, 6, 6, 0x1, \ - 0x52, 0x7820, 7, 7, 0x1, \ - 0x52, 0x523c, 0, 0, 0x0, \ - 0x52, 0x523c, 2, 2, 0x0, \ - 0x52, 0x523c, 3, 3, 0x0, \ - 0x52, 0x523c, 18, 18, 0x0, \ - 0x52, 0x523c, 19, 19, 0x0, \ - 0x52, 0x523c, 20, 20, 0x0, \ - 0x52, 0x5288, 0, 0, 0x1, \ - 0x52, 0x5288, 1, 1, 0x1, \ - 0x52, 0x5288, 2, 2, 0x0, \ - 0x52, 0x5288, 3, 3, 0x0, \ - 0x52, 0x5288, 4, 4, 0x1, \ - 0x52, 0x5288, 5, 5, 0x1, \ - 0x52, 0x5288, 6, 6, 0x1, \ - 0x52, 0x5288, 7, 7, 0x1, \ - 0x52, 0x528c, 0, 0, 0x1, \ - 0x52, 0x528c, 1, 1, 0x1, \ - 0x52, 0x528c, 2, 2, 0x0, \ - 0x52, 0x528c, 3, 3, 0x0, \ - 0x52, 0x528c, 4, 4, 0x1, \ - 0x52, 0x528c, 5, 5, 0x1, \ - 0x52, 0x528c, 6, 6, 0x1, \ - 0x52, 0x528c, 7, 7, 0x1 \ + {0x52, 0x7810, 0, 0, 0x0}, \ + {0x52, 0x7810, 1, 1, 0x0}, \ + {0x52, 0x7810, 2, 2, 0x0}, \ + {0x52, 0x7810, 3, 3, 0x0}, \ + {0x52, 0x7810, 7, 7, 0x0}, \ + {0x52, 0x7810, 18, 18, 0x0}, \ + {0x52, 0x7810, 19, 19, 0x0}, \ + {0x52, 0x7810, 20, 20, 0x0}, \ + {0x52, 0x781c, 0, 0, 0x1}, \ + {0x52, 0x781c, 1, 1, 0x1}, \ + {0x52, 0x781c, 2, 2, 0x0}, \ + {0x52, 0x781c, 3, 3, 0x0}, \ + {0x52, 0x781c, 4, 4, 0x1}, \ + {0x52, 0x781c, 5, 5, 0x1}, \ + {0x52, 0x781c, 6, 6, 0x1}, \ + {0x52, 0x781c, 7, 7, 0x1}, \ + {0x52, 0x7820, 0, 0, 0x1}, \ + {0x52, 0x7820, 1, 1, 0x1}, \ + {0x52, 0x7820, 2, 2, 0x0}, \ + {0x52, 0x7820, 3, 3, 0x0}, \ + {0x52, 0x7820, 4, 4, 0x1}, \ + {0x52, 0x7820, 5, 5, 0x1}, \ + {0x52, 0x7820, 6, 6, 0x1}, \ + {0x52, 0x7820, 7, 7, 0x1}, \ + {0x52, 0x523c, 0, 0, 0x0}, \ + {0x52, 0x523c, 2, 2, 0x0}, \ + {0x52, 0x523c, 3, 3, 0x0}, \ + {0x52, 0x523c, 18, 18, 0x0}, \ + {0x52, 0x523c, 19, 19, 0x0}, \ + {0x52, 0x523c, 20, 20, 0x0}, \ + {0x52, 0x5288, 0, 0, 0x1}, \ + {0x52, 0x5288, 1, 1, 0x1}, \ + {0x52, 0x5288, 2, 2, 0x0}, \ + {0x52, 0x5288, 3, 3, 0x0}, \ + {0x52, 0x5288, 4, 4, 0x1}, \ + {0x52, 0x5288, 5, 5, 0x1}, \ + {0x52, 0x5288, 6, 6, 0x1}, \ + {0x52, 0x5288, 7, 7, 0x1}, \ + {0x52, 0x528c, 0, 0, 0x1}, \ + {0x52, 0x528c, 1, 1, 0x1}, \ + {0x52, 0x528c, 2, 2, 0x0}, \ + {0x52, 0x528c, 3, 3, 0x0}, \ + {0x52, 0x528c, 4, 4, 0x1}, \ + {0x52, 0x528c, 5, 5, 0x1}, \ + {0x52, 0x528c, 6, 6, 0x1}, \ + {0x52, 0x528c, 7, 7, 0x1} \ =20 =20 #endif // TUNIT_BIOS_SETTINGS_HH diff --git a/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2Wrapper= Pkg/FspmWrapperPeim/FspmWrapperPeim.inf b/Platform/BroxtonPlatformPkg/Commo= n/SampleCode/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf index 9e5fa965c..334c8b02e 100644 --- a/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/Fsp= mWrapperPeim/FspmWrapperPeim.inf +++ b/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/Fsp= mWrapperPeim/FspmWrapperPeim.inf @@ -6,7 +6,7 @@ # register TemporaryRamDonePpi to call TempRamExit API, and register Memo= ryDiscoveredPpi # notify to call FspSiliconInit API. # -# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License @@ -79,9 +79,9 @@ =20 [Sources] FspmWrapperPeim.c - ..\FspInitPei\SecMain.c - ..\FspInitPei\SecMain.h - ..\FspInitPei\FindPeiCore.c + ./../FspInitPei/SecMain.c + ./../FspInitPei/SecMain.h + ./../FspInitPei/FindPeiCore.c =20 [Ppis] gTopOfTemporaryRamPpiGuid ## PRODUCES diff --git a/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2Wrapper= Pkg/FspsWrapperPeim/FspsWrapperPeim.inf b/Platform/BroxtonPlatformPkg/Commo= n/SampleCode/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf index cdb666d9d..6400f55c4 100644 --- a/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/Fsp= sWrapperPeim/FspsWrapperPeim.inf +++ b/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/Fsp= sWrapperPeim/FspsWrapperPeim.inf @@ -6,7 +6,7 @@ # register TemporaryRamDonePpi to call TempRamExit API, and register Memo= ryDiscoveredPpi # notify to call FspSiliconInit API. # -# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License @@ -96,9 +96,9 @@ =20 [Sources] FspsWrapperPeim.c - ..\FspInitPei\SecMain.c - ..\FspInitPei\SecMain.h - ..\FspInitPei\FindPeiCore.c + ../FspInitPei/SecMain.c + ../FspInitPei/SecMain.h + ../FspInitPei/FindPeiCore.c =20 [Depex] TRUE diff --git a/Platform/BroxtonPlatformPkg/Common/SampleCode/MdeModulePkg/Uni= versal/MemoryTest/NullMemoryTestDxe/NullMemoryTest.c b/Platform/BroxtonPlat= formPkg/Common/SampleCode/MdeModulePkg/Universal/MemoryTest/NullMemoryTestD= xe/NullMemoryTest.c index b506f1347..00fe52cab 100644 --- a/Platform/BroxtonPlatformPkg/Common/SampleCode/MdeModulePkg/Universal/= MemoryTest/NullMemoryTestDxe/NullMemoryTest.c +++ b/Platform/BroxtonPlatformPkg/Common/SampleCode/MdeModulePkg/Universal/= MemoryTest/NullMemoryTestDxe/NullMemoryTest.c @@ -70,7 +70,7 @@ GetMemoryMap ( Status =3D gBS->AllocatePool ( EfiBootServicesData, *EfiMemoryMapSize, - EfiMemoryMap + (VOID **)EfiMemoryMap ); if (EFI_ERROR(Status)) { DEBUG ((EFI_D_ERROR, "Can not Allocate Memory\n")); --=20 2.11.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel