From nobody Sat Nov 2 08:27:33 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; dkim=fail spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1492538026193995.7699520185341; Tue, 18 Apr 2017 10:53:46 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id B0C1021A0480E; Tue, 18 Apr 2017 10:53:43 -0700 (PDT) Received: from mail-wr0-x232.google.com (mail-wr0-x232.google.com [IPv6:2a00:1450:400c:c0c::232]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 017D621A18AAB for ; Tue, 18 Apr 2017 10:53:41 -0700 (PDT) Received: by mail-wr0-x232.google.com with SMTP id z109so209895wrb.1 for ; Tue, 18 Apr 2017 10:53:41 -0700 (PDT) Received: from localhost.localdomain ([105.150.28.134]) by smtp.gmail.com with ESMTPSA id m201sm296859wmd.15.2017.04.18.10.53.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Apr 2017 10:53:39 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=r/3pA403i1hmTxbB34uEML9eWANNptftr46A+JJgETA=; b=NOLQ4EGbIHhtV/JOkRzpj7fZKYwE2VZJ4tWhxCs93VRaUNewg5O6PoiyeXzUP1gxSr OIeAgUDiAkFCt3husR6FHac4yc9M1Gd3t+EvONVP5UZIiBhKMps9a8heTljHBMFq6z1M g3im8SBB2m748mhx4bB3U4A2n11QBoCdp7PlI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=r/3pA403i1hmTxbB34uEML9eWANNptftr46A+JJgETA=; b=rHs38OPIj1+NxIFKG6Xi1ENzDg66kKf9EecQ0JwpbdaIHIPjbNU3eet2lT8fjbskp0 EHejeBuJPuxsXHAk3Q4S9pCG5/xvQrbUx5KO2PpCgs/XsYJowwh6+bR5iew0WvT/G6f1 YogH3Uq5SNI19neSBLV2+aD0uaDZHGgo23g14i5GWS6eBlOR0UWmwq/jJTYO44MX2vRp Pccoa5utvb0Ij0/l449i3HzYvWJmCihKPet76RTL3UnL0xhrQwNlsBZLE1SYhBTxxG34 5nFPJnzNsPpoMxhvcFVoWHL1YBr4NwozemZ0eEwhFXxFReCa17AALA/MxXU6pMciHHv+ DzKA== X-Gm-Message-State: AN3rC/6ntIi12kDDH9yspOagml4tMvJxyMUTLdWBHChTPhuFNOS07Yyu SzZej4ULvnUwyeXx X-Received: by 10.223.181.131 with SMTP id c3mr10086875wre.155.1492538020309; Tue, 18 Apr 2017 10:53:40 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org, ruiyu.ni@intel.com Date: Tue, 18 Apr 2017 18:53:34 +0100 Message-Id: <20170418175334.17765-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.9.3 Subject: [edk2] [PATCH] OptionRomPkg: add firmware loader driver for Renesas PD72020x X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Some versions of the Renesas PD72020x XHCI controller can be integrated into platforms without any non-volatile storage for the controller's firmware, in which case it is the job of the system firmware to upload a firmware image before attempting to attach the generic XHCI driver to it. So implement a driver that does just this: it will upload the bundled firmware image (accessible via its FFS GUID) in the Supported() method of the driver binding protocol, and subsequently decline to bind to the device, which allows the real XHCI driver to attach to it instead. The firmware itself is not part of this patch: it is up to the integrator to incorporate it into a firmware volume under the associated GUID (gRenesasFirmwarePD720202ImageId) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- OptionRomPkg/OptionRomPkg.dec | 3 + OptionRomPkg/OptionRomPkg.dsc | 5 + OptionRomPkg/RenesasFirmwarePD720202/RenesasFirmwarePD720202.c | 372 +++= +++++++++++++++++ OptionRomPkg/RenesasFirmwarePD720202/RenesasFirmwarePD720202.inf | 43 +++ 4 files changed, 423 insertions(+) diff --git a/OptionRomPkg/OptionRomPkg.dec b/OptionRomPkg/OptionRomPkg.dec index ea4d57b996ae..dc98ff58e374 100644 --- a/OptionRomPkg/OptionRomPkg.dec +++ b/OptionRomPkg/OptionRomPkg.dec @@ -36,6 +36,9 @@ [LibraryClasses] [Guids] gOptionRomPkgTokenSpaceGuid =3D { 0x1e43298f, 0x3478, 0x41a7, { 0xb5, 0x= 77, 0x86, 0x6, 0x46, 0x35, 0xc7, 0x28 } } =20 + ## GUID for RenesasFirmwarePD720202 firmware image + gRenesasFirmwarePD720202ImageId =3D {0xA059EBC4, 0xD73D, 0x4279, {0x81,0= xBF,0xE4,0xA8,0x93,0x08,0xB9,0x23}} + [PcdsFeatureFlag] gOptionRomPkgTokenSpaceGuid.PcdSupportScsiPassThru|TRUE|BOOLEAN|0x000100= 01 gOptionRomPkgTokenSpaceGuid.PcdSupportExtScsiPassThru|TRUE|BOOLEAN|0x000= 10002 diff --git a/OptionRomPkg/OptionRomPkg.dsc b/OptionRomPkg/OptionRomPkg.dsc index 33655567109b..07c26117251d 100644 --- a/OptionRomPkg/OptionRomPkg.dsc +++ b/OptionRomPkg/OptionRomPkg.dsc @@ -115,5 +115,10 @@ [Components] OptionRomPkg/Bus/Usb/UsbNetworking/Ax88772/Ax88772.inf OptionRomPkg/Bus/Usb/UsbNetworking/Ax88772b/Ax88772b.inf =20 + OptionRomPkg/RenesasFirmwarePD720202/RenesasFirmwarePD720202.inf { + + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf + } + [Components.IA32, Components.X64, Components.IPF] OptionRomPkg/Application/BltLibSample/BltLibSample.inf diff --git a/OptionRomPkg/RenesasFirmwarePD720202/RenesasFirmwarePD720202.c= b/OptionRomPkg/RenesasFirmwarePD720202/RenesasFirmwarePD720202.c new file mode 100644 index 000000000000..c7d3f1820840 --- /dev/null +++ b/OptionRomPkg/RenesasFirmwarePD720202/RenesasFirmwarePD720202.c @@ -0,0 +1,372 @@ +/** @file + Implementation of driver entry point and driver binding protocol. + +Copyright (c) 2016 - 2017, Linaro Limited. All rights reserved. + +This program and the accompanying materials are licensed +and made available under the terms and conditions of the BSD License which +accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLI= ED. + +**/ + +#include + +#include +#include +#include +#include + +#include + +#include + +#define PCI_VENDOR_ID_RENESAS 0x1912 +#define PCI_DEVICE_ID_PD720201 0x14 +#define PCI_DEVICE_ID_PD720202 0x15 + +#define PCI_FW_CTL_STAT_REG 0xF4 +#define PCI_FW_CTL_DATA_REG 0xF5 +#define PCI_EXT_ROM_CTL_REG 0xF6 +#define PCI_FW_DATA0 0xF8 +#define PCI_FW_DATA1 0xFC + +#define PCI_FW_CTL_STAT_REG_FW_DL_ENABLE (1U << 0) +#define PCI_FW_CTL_STAT_REG_RESULT_CODE (7U << 4) +#define PCI_FW_CTL_STAT_REG_RESULT_INVALID (0) +#define PCI_FW_CTL_STAT_REG_RESULT_OK (1U << 4) +#define PCI_FW_CTL_STAT_REG_SET_DATA0 (1U << 0) +#define PCI_FW_CTL_STAT_REG_SET_DATA1 (1U << 1) + +#define PCI_EXT_ROM_CTL_REG_ROM_EXISTS (1U << 15) + +STATIC CONST UINT32 *mFirmwareImage; +STATIC UINTN mFirmwareImageSize; + +STATIC +UINT8 +ReadCtlStatVal ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINTN Offset + ) +{ + UINT8 CtlStatVal; + EFI_STATUS Status; + + Status =3D PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, Offset, 1, &CtlSt= atVal); + ASSERT_EFI_ERROR (Status); + + return CtlStatVal; +} + +STATIC +VOID +WriteCtlStatVal ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINTN Offset, + IN UINT8 CtlStatVal + ) +{ + EFI_STATUS Status; + + Status =3D PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, Offset, 1, &CtlS= tatVal); + ASSERT_EFI_ERROR (Status); +} + +STATIC +VOID +WriteDataVal ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINTN Offset, + IN UINT32 DataVal + ) +{ + EFI_STATUS Status; + + Status =3D PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, Offset, 1, &Dat= aVal); + ASSERT_EFI_ERROR (Status); +} + +STATIC +BOOLEAN +WaitReadCtlStatVal ( + IN EFI_PCI_IO_PROTOCOL *PciIo, + IN UINTN Offset, + IN UINT8 Mask, + IN UINT8 Val + ) +{ + UINTN Timeout; + + for (Timeout =3D 0; (ReadCtlStatVal (PciIo, Offset) & Mask) !=3D Val; Ti= meout++) { + if (Timeout > 1000) { + DEBUG ((EFI_D_ERROR, + "%a: Timeout waiting for reg [+0x%x] & 0x%x to become 0x%x\n", + __FUNCTION__, Offset, Mask, Val)); + return FALSE; + } + gBS->Stall (10); + } + return TRUE; +} + +STATIC +VOID +DownloadPD720202Firmware ( + IN EFI_PCI_IO_PROTOCOL *PciIo + ) +{ + UINTN Idx; + + Idx =3D 0; + + // 1. Set "FW Download Enable" to '1b'. + WriteCtlStatVal (PciIo, PCI_FW_CTL_STAT_REG, + PCI_FW_CTL_STAT_REG_FW_DL_ENABLE); + + // 2. Read "Set DATA0" and confirm it is '0b'. + if (!WaitReadCtlStatVal (PciIo, PCI_FW_CTL_DATA_REG, + PCI_FW_CTL_STAT_REG_SET_DATA0, 0)) { + return; + } + + // 3. Write FW data to "DATA0". + WriteDataVal (PciIo, PCI_FW_DATA0, mFirmwareImage[Idx++]); + + // 4. Read "Set DATA1" and confirm it is '0b'. + if (!WaitReadCtlStatVal (PciIo, PCI_FW_CTL_DATA_REG, + PCI_FW_CTL_STAT_REG_SET_DATA1, 0)) { + return; + } + + // 5. Write FW data to "DATA1". + WriteDataVal (PciIo, PCI_FW_DATA1, mFirmwareImage[Idx++]); + + // 6. Set "Set DATA0" & "Set DATA1" to '1b'. + WriteCtlStatVal (PciIo, PCI_FW_CTL_DATA_REG, + PCI_FW_CTL_STAT_REG_SET_DATA0 | PCI_FW_CTL_STAT_REG_SET_DATA1); + + while (Idx < mFirmwareImageSize / sizeof(UINT32)) { + + // 7. Read "Set DATA0" and confirm it is '0b'. + if (!WaitReadCtlStatVal (PciIo, PCI_FW_CTL_DATA_REG, + PCI_FW_CTL_STAT_REG_SET_DATA0, 0)) { + return; + } + + // 8. Write FW data to"DATA0". Set "Set DATA0" to '1b'. + WriteDataVal (PciIo, PCI_FW_DATA0, mFirmwareImage[Idx++]); + WriteCtlStatVal (PciIo, PCI_FW_CTL_DATA_REG, PCI_FW_CTL_STAT_REG_SET_D= ATA0); + + // 9. Read "Set DATA1" and confirm it is '0b'. + if (!WaitReadCtlStatVal (PciIo, PCI_FW_CTL_DATA_REG, + PCI_FW_CTL_STAT_REG_SET_DATA1, 0)) { + return; + } + + // 10. Write FW data to"DATA1". Set "Set DATA1" to '1b'. + WriteDataVal (PciIo, PCI_FW_DATA1, mFirmwareImage[Idx++]); + WriteCtlStatVal (PciIo, PCI_FW_CTL_DATA_REG, PCI_FW_CTL_STAT_REG_SET_D= ATA1); + + // 11. Return to step 7 and repeat the sequence from step 7 to step 10. + } + + // 12. After writing the last data of FW, the System Software must set "= FW Download Enable" to '0b'. + WriteCtlStatVal (PciIo, PCI_FW_CTL_STAT_REG, 0); + + // 13. Read "Result Code" and confirm it is '001b'. + if (WaitReadCtlStatVal (PciIo, PCI_FW_CTL_STAT_REG, + PCI_FW_CTL_STAT_REG_RESULT_CODE, PCI_FW_CTL_STAT_REG_RESULT_OK)) { + DEBUG ((EFI_D_INFO, "%a: Renesas PD720202 firmware download successful= \n", + __FUNCTION__)); + } else { + DEBUG ((EFI_D_ERROR, "%a: Renesas PD720202 firmware download FAILED\n", + __FUNCTION__)); + } +} + +/** + Test to see if this driver supports ControllerHandle. This service + is called by the EFI boot service ConnectController(). In + order to make drivers as small as possible, there are a few calling + restrictions for this service. ConnectController() must + follow these calling restrictions. If any other agent wishes to call + Supported() it must also follow these calling restrictions. + + @param This Protocol instance pointer. + @param ControllerHandle Handle of device to test. + @param RemainingDevicePath Optional parameter use to pick a specifi= c child + device to start. + + @retval EFI_SUCCESS This driver supports this device. + @retval EFI_ALREADY_STARTED This driver is already running on this d= evice. + @retval other This driver does not support this device. + +**/ +STATIC +EFI_STATUS +EFIAPI +RenesasPD720202DriverSupported ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ) +{ + EFI_STATUS Status; + EFI_PCI_IO_PROTOCOL *PciIo; + UINT32 PciID; + UINT8 CtlStatVal; + + // + // Check for the PCI IO Protocol + // + Status =3D gBS->OpenProtocol (Controller, &gEfiPciIoProtocolGuid, + (VOID **)&PciIo, This->DriverBindingHandle, Controller, + EFI_OPEN_PROTOCOL_BY_DRIVER); + + if (EFI_ERROR (Status)) { + return Status; + } + + Status =3D PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, PCI_VENDOR_ID_OF= FSET, + 1, &PciID); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, + "%a: Pci->Pci.Read() of vendor/device id failed (Status =3D=3D %r)\n= ", + __FUNCTION__, Status)); + goto CloseProtocol; + } + + if ((PciID & 0xffff) !=3D PCI_VENDOR_ID_RENESAS || + ((PciID >> 16) !=3D PCI_DEVICE_ID_PD720201 && + (PciID >> 16) !=3D PCI_DEVICE_ID_PD720202)) { + DEBUG ((EFI_D_INFO, "%a: ignoring unsupported PCI device 0x%04x:0x%04x= \n", + __FUNCTION__, PciID & 0xffff, PciID >> 16)); + goto CloseProtocol; + } + + Status =3D PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, PCI_FW_CTL_STAT_R= EG, + 1, &CtlStatVal); + if (!EFI_ERROR (Status) && + (CtlStatVal & PCI_FW_CTL_STAT_REG_RESULT_CODE) =3D=3D PCI_FW_CTL_STA= T_REG_RESULT_INVALID) { + // + // Firmware download required + // + DEBUG ((EFI_D_INFO, "%a: downloading firmware\n", __FUNCTION__)); + DownloadPD720202Firmware (PciIo); + } + +CloseProtocol: + gBS->CloseProtocol (Controller, &gEfiPciIoProtocolGuid, + This->DriverBindingHandle, Controller); + + // + // Always return unsupported: we are not interested in driving the devic= e, + // only in having the opportunity to install the firmware before the real + // driver attaches to it. + // + return EFI_UNSUPPORTED; +} + +/** + Start this driver on Controller. Not used. + + @param [in] This Protocol instance pointer. + @param [in] Controller Handle of device to work with. + @param [in] RemainingDevicePath Not used, always produce all possibl= e children. + + @retval EFI_SUCCESS This driver is added to Controller. + @retval other This driver does not support this de= vice. + +**/ +STATIC +EFI_STATUS +EFIAPI +RenesasPD720202DriverStart ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ) +{ + // + // We are not interested in driving the device, we only poke the firmware + // in the .Supported() callback. + // + ASSERT (FALSE); + return EFI_INVALID_PARAMETER; +} + +/** + Stop this driver on Controller. Not used. + + @param [in] This Protocol instance pointer. + @param [in] Controller Handle of device to stop driver on. + @param [in] NumberOfChildren How many children need to be stopped. + @param [in] ChildHandleBuffer Not used. + + @retval EFI_SUCCESS This driver is removed Controller. + @retval EFI_DEVICE_ERROR The device could not be stopped due = to a device error. + @retval other This driver was not removed from thi= s device. + +**/ +STATIC +EFI_STATUS +EFIAPI +RenesasPD720202DriverStop ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN UINTN NumberOfChildren, + IN EFI_HANDLE *ChildHandleBuffer + ) +{ + ASSERT (FALSE); + return EFI_SUCCESS; +} + +// +// UEFI Driver Model entry point +// +STATIC EFI_DRIVER_BINDING_PROTOCOL RenesasPD720202DriverBinding =3D { + RenesasPD720202DriverSupported, + RenesasPD720202DriverStart, + RenesasPD720202DriverStop, + + // Version values of 0xfffffff0-0xffffffff are reserved for platform/OEM + // specific drivers. Protocol instances with higher 'Version' properties + // will be used before lower 'Version' ones. XhciDxe uses version 0x30, + // so this driver will be called in preference, and XhciDxe will be invo= ked + // after RenesasPD720202DriverSupported returns EFI_UNSUPPORTED. + 0xfffffff0, + NULL, + NULL +}; + +EFI_STATUS +EFIAPI +InitializeRenesasPD720202Driver ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + // + // First, try to locate the firmware image. If it is missing, there is no + // point in proceeding. + // + Status =3D GetSectionFromAnyFv (&gRenesasFirmwarePD720202ImageId, + EFI_SECTION_RAW, 0, (VOID **) (VOID **)&mFirmwareImage, + &mFirmwareImageSize); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "%a: could not locate PD720202 firmware image\n", + __FUNCTION__)); + ASSERT_EFI_ERROR (Status); + return Status; + } + + return EfiLibInstallDriverBinding (ImageHandle, SystemTable, + &RenesasPD720202DriverBinding, NULL); +} diff --git a/OptionRomPkg/RenesasFirmwarePD720202/RenesasFirmwarePD720202.i= nf b/OptionRomPkg/RenesasFirmwarePD720202/RenesasFirmwarePD720202.inf new file mode 100644 index 000000000000..7115ec1ba7e8 --- /dev/null +++ b/OptionRomPkg/RenesasFirmwarePD720202/RenesasFirmwarePD720202.inf @@ -0,0 +1,43 @@ +## @file +# Component description file for Reneses PD720202 firmware download driver +# +# Copyright (c) 2016 - 2017, Linaro Ltd. All rights reserved.
+# +# This program and the accompanying materials are licensed +# and made available under the terms and conditions of the BSD License whi= ch +# accompanies this distribution. The full text of the license may be found= at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D RenesasFirmwarePD720202 + FILE_GUID =3D 5979ebfe-d53c-4150-a972-568231583969 + MODULE_TYPE =3D UEFI_DRIVER + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D InitializeRenesasPD720202Driver + +[Sources] + RenesasFirmwarePD720202.c + +[Packages] + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + OptionRomPkg/OptionRomPkg.dec + +[LibraryClasses] + DebugLib + DxeServicesLib + UefiBootServicesTableLib + UefiLib + UefiDriverEntryPoint + +[Protocols] + gEfiPciIoProtocolGuid + +[Guids] + gRenesasFirmwarePD720202ImageId --=20 2.9.3 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel