From nobody Sat Nov 2 10:26:37 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1491527911772127.24489639160481; Thu, 6 Apr 2017 18:18:31 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id A8E5A20D77DDA; Thu, 6 Apr 2017 18:18:28 -0700 (PDT) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E9EA820083178 for ; Thu, 6 Apr 2017 18:18:26 -0700 (PDT) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP; 06 Apr 2017 18:18:26 -0700 Received: from jfan12-desk.ccr.corp.intel.com ([10.239.158.57]) by orsmga004.jf.intel.com with ESMTP; 06 Apr 2017 18:18:25 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,162,1488873600"; d="scan'208";a="74765713" From: Jeff Fan To: edk2-devel@lists.01.org Date: Fri, 7 Apr 2017 09:18:19 +0800 Message-Id: <20170407011823.12664-2-jeff.fan@intel.com> X-Mailer: git-send-email 2.9.3.windows.2 In-Reply-To: <20170407011823.12664-1-jeff.fan@intel.com> References: <20170407011823.12664-1-jeff.fan@intel.com> Subject: [edk2] [PATCH v2 1/5] MdePkg/PeCoffGetEntryPointLib: Add PeCoffSerachImageBase() X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Kinney , Jiewen Yao , Liming Gao MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" This new API only works on DEBUG build. It will search the PE/COFF image ba= se forward the input address in this PE/COFF image and returns it. Cc: Jiewen Yao Cc: Michael Kinney Cc: Liming Gao Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan Reviewed-by: jiewen.yao@intel.com --- MdePkg/Include/Library/PeCoffGetEntryPointLib.h | 20 +++++- .../PeCoffGetEntryPoint.c | 72 ++++++++++++++++++= +++- 2 files changed, 90 insertions(+), 2 deletions(-) diff --git a/MdePkg/Include/Library/PeCoffGetEntryPointLib.h b/MdePkg/Inclu= de/Library/PeCoffGetEntryPointLib.h index e517ca2..647503b 100644 --- a/MdePkg/Include/Library/PeCoffGetEntryPointLib.h +++ b/MdePkg/Include/Library/PeCoffGetEntryPointLib.h @@ -1,7 +1,7 @@ /** @file Provides a service to retrieve the PE/COFF entry point from a PE/COFF im= age. =20 -Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made availabl= e under=20 the terms and conditions of the BSD License that accompanies this distribu= tion. =20 The full text of the license may be found at @@ -101,4 +101,22 @@ PeCoffGetSizeOfHeaders ( IN VOID *Pe32Data ); =20 +/** + Returns PE/COFF image base specified by the address in this PE/COFF imag= e. + + On DEBUG build, searches the PE/COFF image base forward the address in t= his + PE/COFF image and returns it. + + @param Address Address located in one PE/COFF image. + + @retval 0 RELEASE build or cannot find the PE/COFF image base. + @retval others PE/COFF image base found. + +**/ +UINTN +EFIAPI +PeCoffSerachImageBase ( + IN UINTN Address + ); + #endif diff --git a/MdePkg/Library/BasePeCoffGetEntryPointLib/PeCoffGetEntryPoint.= c b/MdePkg/Library/BasePeCoffGetEntryPointLib/PeCoffGetEntryPoint.c index 0fb7e84..00f6d7d 100644 --- a/MdePkg/Library/BasePeCoffGetEntryPointLib/PeCoffGetEntryPoint.c +++ b/MdePkg/Library/BasePeCoffGetEntryPointLib/PeCoffGetEntryPoint.c @@ -2,7 +2,7 @@ Provides the services to get the entry point to a PE/COFF image that has= either been=20 loaded into memory or is executing at it's linked address. =20 - Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -22,6 +22,8 @@ =20 #include =20 +#define PE_COFF_IMAGE_ALIGN_SIZE 4 + /** Retrieves and returns a pointer to the entry point to a PE/COFF image th= at has been loaded into system memory with the PE/COFF Loader Library functions. @@ -316,3 +318,71 @@ PeCoffGetSizeOfHeaders ( return (UINT32) SizeOfHeaders; } =20 +/** + Returns PE/COFF image base is loaded in system memory where the input ad= dress is in. + + On DEBUG build, searches the PE/COFF image base forward the input addres= s and + returns it. + + @param Address Address located in one PE/COFF image. + + @retval 0 RELEASE build or cannot find the PE/COFF image base. + @retval others PE/COFF image base found. + +**/ +UINTN +EFIAPI +PeCoffSerachImageBase ( + IN UINTN Address + ) +{ + UINTN Pe32Data; + + Pe32Data =3D 0; + + DEBUG_CODE ( + EFI_IMAGE_DOS_HEADER *DosHdr; + EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr; + + // + // Find Image Base + // + Pe32Data =3D Address & ~(PE_COFF_IMAGE_ALIGN_SIZE - 1); + while (Pe32Data !=3D 0) { + DosHdr =3D (EFI_IMAGE_DOS_HEADER *) Pe32Data; + if (DosHdr->e_magic =3D=3D EFI_IMAGE_DOS_SIGNATURE) { + // + // DOS image header is present, so read the PE header after the DO= S image header. + // + Hdr.Pe32 =3D (EFI_IMAGE_NT_HEADERS32 *)(Pe32Data + (UINTN) ((DosHd= r->e_lfanew) & 0x0ffff)); + // + // Make sure PE header address does not overflow and is less than = the initial address. + // + if (((UINTN)Hdr.Pe32 > Pe32Data) && ((UINTN)Hdr.Pe32 < Address)) { + if (Hdr.Pe32->Signature =3D=3D EFI_IMAGE_NT_SIGNATURE) { + break; + } + } + } else { + // + // DOS image header is not present, TE header is at the image base. + // + Hdr.Pe32 =3D (EFI_IMAGE_NT_HEADERS32 *)Pe32Data; + if ((Hdr.Te->Signature =3D=3D EFI_TE_IMAGE_HEADER_SIGNATURE) && + ((Hdr.Te->Machine =3D=3D IMAGE_FILE_MACHINE_I386) || (Hdr.Te-= >Machine =3D=3D IMAGE_FILE_MACHINE_IA64) || + (Hdr.Te->Machine =3D=3D IMAGE_FILE_MACHINE_EBC) || (Hdr.Te-= >Machine =3D=3D IMAGE_FILE_MACHINE_X64) || + (Hdr.Te->Machine =3D=3D IMAGE_FILE_MACHINE_ARM64) || (Hdr.Te-= >Machine =3D=3D IMAGE_FILE_MACHINE_ARMTHUMB_MIXED)) + ) { + break; + } + } + + // + // Not found the image base, check the previous aligned address + // + Pe32Data -=3D PE_COFF_IMAGE_ALIGN_SIZE; + } + ); + + return Pe32Data; +} --=20 2.9.3.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sat Nov 2 10:26:37 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1491527913662527.7203331480794; Thu, 6 Apr 2017 18:18:33 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id DEE0420D77DDF; Thu, 6 Apr 2017 18:18:28 -0700 (PDT) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 316E520083179 for ; Thu, 6 Apr 2017 18:18:28 -0700 (PDT) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP; 06 Apr 2017 18:18:28 -0700 Received: from jfan12-desk.ccr.corp.intel.com ([10.239.158.57]) by orsmga004.jf.intel.com with ESMTP; 06 Apr 2017 18:18:27 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,162,1488873600"; d="scan'208";a="74765720" From: Jeff Fan To: edk2-devel@lists.01.org Date: Fri, 7 Apr 2017 09:18:20 +0800 Message-Id: <20170407011823.12664-3-jeff.fan@intel.com> X-Mailer: git-send-email 2.9.3.windows.2 In-Reply-To: <20170407011823.12664-1-jeff.fan@intel.com> References: <20170407011823.12664-1-jeff.fan@intel.com> Subject: [edk2] [PATCH v2 2/5] MdeModulePkg/CpuExceptionHandlerLib: Add DumpCpuContext() X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Kinney , Feng Tian , Jiewen Yao MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" This API is used to display exception type and all processor context for de= bug purpose. Cc: Jiewen Yao Cc: Michael Kinney Cc: Feng Tian Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan Reviewed-by: jiewen.yao@intel.com --- MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h | 15 ++++++++++++= ++- .../CpuExceptionHandlerLibNull.c | 16 ++++++++++++= +++- 2 files changed, 29 insertions(+), 2 deletions(-) diff --git a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h b/MdeMod= ulePkg/Include/Library/CpuExceptionHandlerLib.h index b3016ee..6cd8230 100644 --- a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h +++ b/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h @@ -2,7 +2,7 @@ CPU Exception library provides the default CPU interrupt/exception handl= er. It also provides capability to register user interrupt/exception handler. =20 - Copyright (c) 2012 - 2013, Intel Corporation. All rights reserved.
+ Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -93,4 +93,17 @@ RegisterCpuInterruptHandler ( IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler ); =20 +/** + Display processor context. + + @param[in] ExceptionType Exception type. + @param[in] SystemContext Processor context to be display. +**/ +VOID +EFIAPI +DumpCpuContext ( + IN EFI_EXCEPTION_TYPE ExceptionType, + IN EFI_SYSTEM_CONTEXT SystemContext + ); + =20 #endif diff --git a/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHa= ndlerLibNull.c b/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExcepti= onHandlerLibNull.c index 68ee9a9..cbe4768 100644 --- a/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLi= bNull.c +++ b/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLi= bNull.c @@ -1,7 +1,7 @@ /** @file CPU Exception Handler library implementition with empty functions. =20 - Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -97,3 +97,17 @@ RegisterCpuInterruptHandler ( return EFI_UNSUPPORTED; } =20 +/** + Display processor context. + + @param[in] ExceptionType Exception type. + @param[in] SystemContext Processor context to be display. +**/ +VOID +EFIAPI +DumpCpuContext ( + IN EFI_EXCEPTION_TYPE ExceptionType, + IN EFI_SYSTEM_CONTEXT SystemContext + ) +{ +} --=20 2.9.3.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sat Nov 2 10:26:37 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1491527916164594.2901738915954; Thu, 6 Apr 2017 18:18:36 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 2127721DFA91C; Thu, 6 Apr 2017 18:18:30 -0700 (PDT) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7F96620083179 for ; Thu, 6 Apr 2017 18:18:29 -0700 (PDT) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP; 06 Apr 2017 18:18:29 -0700 Received: from jfan12-desk.ccr.corp.intel.com ([10.239.158.57]) by orsmga004.jf.intel.com with ESMTP; 06 Apr 2017 18:18:28 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,162,1488873600"; d="scan'208";a="74765730" From: Jeff Fan To: edk2-devel@lists.01.org Date: Fri, 7 Apr 2017 09:18:21 +0800 Message-Id: <20170407011823.12664-4-jeff.fan@intel.com> X-Mailer: git-send-email 2.9.3.windows.2 In-Reply-To: <20170407011823.12664-1-jeff.fan@intel.com> References: <20170407011823.12664-1-jeff.fan@intel.com> Subject: [edk2] [PATCH v2 3/5] UefiCpuPkg/CpuExceptionHandlerLib: Add DumpCpuContext() implementation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Kinney , Feng Tian , Jiewen Yao MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Export DumpCpuCotext() to display CPU Context. We will invoke PeCoffGetEntrypointLib's PeCoffSerachImageBase() to get PE/COFF image base. Display exception data bit value for page fault exception. Cc: Jiewen Yao Cc: Michael Kinney Cc: Feng Tian Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan Reviewed-by: jiewen.yao@intel.com --- .../CpuExceptionHandlerLib/CpuExceptionCommon.c | 82 ++++++------------= ---- .../CpuExceptionHandlerLib/CpuExceptionCommon.h | 27 ++++--- .../Library/CpuExceptionHandlerLib/DxeException.c | 7 +- .../Ia32/ArchExceptionHandler.c | 65 ++++++++++------- .../CpuExceptionHandlerLib/PeiCpuException.c | 6 +- .../CpuExceptionHandlerLib/PeiDxeSmmCpuException.c | 4 +- .../CpuExceptionHandlerLib/SecPeiCpuException.c | 8 +-- .../Library/CpuExceptionHandlerLib/SmmException.c | 7 +- .../X64/ArchExceptionHandler.c | 59 ++++++++++------ 9 files changed, 125 insertions(+), 140 deletions(-) diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c= b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c index 3d85b0c..0537208 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c @@ -106,82 +106,44 @@ InternalPrintMessage ( =20 /** Find and display image base address and return image base and its entry = point. - + =20 @param CurrentEip Current instruction pointer. - @param EntryPoint Return module entry point if module header is fou= nd. - - @return !0 Image base address. - @return 0 Image header cannot be found. + =20 **/ -UINTN -FindModuleImageBase ( - IN UINTN CurrentEip, - OUT UINTN *EntryPoint +VOID=20 +DumpModuleImageInfo ( + IN UINTN CurrentEip ) { + EFI_STATUS Status; UINTN Pe32Data; - EFI_IMAGE_DOS_HEADER *DosHdr; - EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr; VOID *PdbPointer; + VOID *EntryPoint; =20 - // - // Find Image Base - // - Pe32Data =3D CurrentEip & ~(mImageAlignSize - 1); - while (Pe32Data !=3D 0) { - DosHdr =3D (EFI_IMAGE_DOS_HEADER *) Pe32Data; - if (DosHdr->e_magic =3D=3D EFI_IMAGE_DOS_SIGNATURE) { - // - // DOS image header is present, so read the PE header after the DOS = image header. - // - Hdr.Pe32 =3D (EFI_IMAGE_NT_HEADERS32 *)(Pe32Data + (UINTN) ((DosHdr-= >e_lfanew) & 0x0ffff)); - // - // Make sure PE header address does not overflow and is less than th= e initial address. - // - if (((UINTN)Hdr.Pe32 > Pe32Data) && ((UINTN)Hdr.Pe32 < CurrentEip)) { - if (Hdr.Pe32->Signature =3D=3D EFI_IMAGE_NT_SIGNATURE) { - // - // It's PE image. - // - InternalPrintMessage ("!!!! Find PE image "); - *EntryPoint =3D (UINTN)Pe32Data + (UINTN)(Hdr.Pe32->OptionalHead= er.AddressOfEntryPoint & 0x0ffffffff); - break; - } - } - } else { - // - // DOS image header is not present, TE header is at the image base. - // - Hdr.Pe32 =3D (EFI_IMAGE_NT_HEADERS32 *)Pe32Data; - if ((Hdr.Te->Signature =3D=3D EFI_TE_IMAGE_HEADER_SIGNATURE) && - ((Hdr.Te->Machine =3D=3D IMAGE_FILE_MACHINE_I386) || Hdr.Te->Mac= hine =3D=3D IMAGE_FILE_MACHINE_X64)) { - // - // It's TE image, it TE header and Machine type match - // - InternalPrintMessage ("!!!! Find TE image "); - *EntryPoint =3D (UINTN)Pe32Data + (UINTN)(Hdr.Te->AddressOfEntryPo= int & 0x0ffffffff) + sizeof(EFI_TE_IMAGE_HEADER) - Hdr.Te->StrippedSize; - break; - } - } - + Pe32Data =3D PeCoffSerachImageBase (CurrentEip); + if (Pe32Data =3D=3D 0) { + InternalPrintMessage ("!!!! Can't find image information. !!!!\n"); + } else { // - // Not found the image base, check the previous aligned address + // Find Image Base entry point // - Pe32Data -=3D mImageAlignSize; - } - - if (Pe32Data !=3D 0) { + Status =3D PeCoffLoaderGetEntryPoint ((VOID *) Pe32Data, &EntryPoint); + if (EFI_ERROR (Status)) { + EntryPoint =3D NULL; + } + InternalPrintMessage ("!!!! Find image "); PdbPointer =3D PeCoffLoaderGetPdbPointer ((VOID *) Pe32Data); if (PdbPointer !=3D NULL) { InternalPrintMessage ("%a", PdbPointer); } else { InternalPrintMessage ("(No PDB) " ); } - } else { - InternalPrintMessage ("!!!! Can't find image information. !!!!\n"); + InternalPrintMessage ( + " (ImageBase=3D%016lp, EntryPoint=3D%016p) !!!!\n", + (VOID *) Pe32Data, + EntryPoint + ); } - - return Pe32Data; } =20 /** diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h= b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h index 4639ed2..e66a5df 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h @@ -1,7 +1,7 @@ /** @file Common header file for CPU Exception Handler Library. =20 - Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -24,11 +24,23 @@ #include #include #include +#include =20 #define CPU_EXCEPTION_NUM 32 #define CPU_INTERRUPT_NUM 256 #define HOOKAFTER_STUB_SIZE 16 =20 +// +// Exception Error Code of Page-Fault Exception +// +#define IA32_PF_EC_P BIT0 +#define IA32_PF_EC_WR BIT1 +#define IA32_PF_EC_US BIT2 +#define IA32_PF_EC_RSVD BIT3 +#define IA32_PF_EC_ID BIT4 +#define IA32_PF_EC_PK BIT5 +#define IA32_PF_EC_SGX BIT15 + #include "ArchInterruptDefs.h" =20 #define CPU_EXCEPTION_HANDLER_LIB_HOB_GUID \ @@ -53,7 +65,6 @@ typedef struct { } EXCEPTION_HANDLER_DATA; =20 extern CONST UINT32 mErrorCodeFlag; -extern CONST UINTN mImageAlignSize; extern CONST UINTN mDoFarReturnFlag; =20 /** @@ -112,15 +123,11 @@ InternalPrintMessage ( Find and display image base address and return image base and its entry = point. =20 @param CurrentEip Current instruction pointer. - @param EntryPoint Return module entry point if module header is fou= nd. =20 - @return !0 Image base address. - @return 0 Image header cannot be found. **/ -UINTN=20 -FindModuleImageBase ( - IN UINTN CurrentEip, - OUT UINTN *EntryPoint +VOID=20 +DumpModuleImageInfo ( + IN UINTN CurrentEip ); =20 /** @@ -130,7 +137,7 @@ FindModuleImageBase ( @param SystemContext Pointer to EFI_SYSTEM_CONTEXT. **/ VOID -DumpCpuContent ( +DumpImageAndCpuContent ( IN EFI_EXCEPTION_TYPE ExceptionType, IN EFI_SYSTEM_CONTEXT SystemContext ); diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c b/Uef= iCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c index a61a52b..ab13e5e 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c @@ -1,7 +1,7 @@ /** @file CPU exception handler library implemenation for DXE modules. =20 - Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -19,11 +19,6 @@ =20 CONST UINTN mDoFarReturnFlag =3D 0; =20 -// -// Image align size for DXE/SMM -// -CONST UINTN mImageAlignSize =3D SIZE_4KB; - RESERVED_VECTORS_DATA mReservedVectorsData[CPU_EXCEPTION_NUM]; EFI_CPU_INTERRUPT_HANDLER mExternalInterruptHandlerTable[CPU_EXCEPTION_N= UM]; UINTN mEnabledInterruptNum =3D 0; diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHa= ndler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandl= er.c index 7ab2438..52b0e76 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c @@ -1,7 +1,7 @@ /** @file IA32 CPU Exception Handler functons. =20 - Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -108,39 +108,49 @@ ArchRestoreExceptionContext ( } =20 /** - Display CPU information. + Display processor context. =20 - @param ExceptionType Exception type. - @param SystemContext Pointer to EFI_SYSTEM_CONTEXT. + @param[in] ExceptionType Exception type. + @param[in] SystemContext Processor context to be display. **/ VOID -DumpCpuContent ( +EFIAPI +DumpCpuContext ( IN EFI_EXCEPTION_TYPE ExceptionType, IN EFI_SYSTEM_CONTEXT SystemContext ) { - UINTN ImageBase; - UINTN EntryPoint; - InternalPrintMessage ( "!!!! IA32 Exception Type - %02x(%a) CPU Apic ID - %08x !!!!\n", ExceptionType, GetExceptionNameStr (ExceptionType), GetApicId () ); - + if ((mErrorCodeFlag & (1 << ExceptionType)) !=3D 0) { + InternalPrintMessage ( + "ExceptionData - %08x", + SystemContext.SystemContextIa32->ExceptionData + ); + if (ExceptionType =3D=3D EXCEPT_IA32_PAGE_FAULT) { + InternalPrintMessage ( + " I:%x R:%x U:%x W:%x P:%x PK:%x S:%x", + (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) = !=3D 0, + (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_RSVD)= !=3D 0, + (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_US) = !=3D 0, + (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_WR) = !=3D 0, + (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_P) = !=3D 0, + (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_PK) = !=3D 0, + (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_SGX) = !=3D 0 + ); + } + InternalPrintMessage ("\n"); + } InternalPrintMessage ( "EIP - %08x, CS - %08x, EFLAGS - %08x\n", SystemContext.SystemContextIa32->Eip, SystemContext.SystemContextIa32->Cs, SystemContext.SystemContextIa32->Eflags ); - if ((mErrorCodeFlag & (1 << ExceptionType)) !=3D 0) { - InternalPrintMessage ( - "ExceptionData - %08x\n", - SystemContext.SystemContextIa32->ExceptionData - ); - } InternalPrintMessage ( "EAX - %08x, ECX - %08x, EDX - %08x, EBX - %08x\n", SystemContext.SystemContextIa32->Eax, @@ -198,16 +208,23 @@ DumpCpuContent ( "FXSAVE_STATE - %08x\n", &SystemContext.SystemContextIa32->FxSaveState ); +} + +/** + Display CPU information. =20 + @param ExceptionType Exception type. + @param SystemContext Pointer to EFI_SYSTEM_CONTEXT. +**/ +VOID +DumpImageAndCpuContent ( + IN EFI_EXCEPTION_TYPE ExceptionType, + IN EFI_SYSTEM_CONTEXT SystemContext + ) +{ + DumpCpuContext (ExceptionType, SystemContext); // - // Find module image base and module entry point by RIP + // Dump module image base and module entry point by EIP // - ImageBase =3D FindModuleImageBase (SystemContext.SystemContextIa32->Eip,= &EntryPoint); - if (ImageBase !=3D 0) { - InternalPrintMessage ( - " (ImageBase=3D%08x, EntryPoint=3D%08x) !!!!\n", - ImageBase, - EntryPoint - ); - } + DumpModuleImageInfo (SystemContext.SystemContextIa32->Eip); } diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c b/= UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c index c3fd8ae..53fa3c6 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c @@ -1,7 +1,7 @@ /** @file CPU exception handler library implementation for PEIM module. =20 -Copyright (c) 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made availabl= e under the terms and conditions of the BSD License that accompanies this distribu= tion. The full text of the license may be found at @@ -18,10 +18,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHE= R EXPRESS OR IMPLIED. #include #include =20 -// -// Image Alignment size for PEI phase -// -CONST UINTN mImageAlignSize =3D 4; CONST UINTN mDoFarReturnFlag =3D 0; =20 EFI_GUID mCpuExceptrionHandlerLibHobGuid =3D CPU_EXCEPTION_HANDLER_LIB_HOB= _GUID; diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiDxeSmmCpuExceptio= n.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiDxeSmmCpuException.c index c0fc9a6..fb679b5 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiDxeSmmCpuException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiDxeSmmCpuException.c @@ -1,7 +1,7 @@ /** @file CPU Exception Library provides PEI/DXE/SMM CPU common exception handler. =20 -Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made availabl= e under the terms and conditions of the BSD License that accompanies this distribu= tion. The full text of the license may be found at @@ -101,7 +101,7 @@ CommonExceptionHandlerWorker ( // // Display ExceptionType, CPU information and Image information // =20 - DumpCpuContent (ExceptionType, SystemContext); + DumpImageAndCpuContent (ExceptionType, SystemContext); // // Release Spinlock of output message // diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c= b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c index 7e94e38..5d6807b 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c @@ -1,7 +1,7 @@ /** @file CPU exception handler library implemenation for SEC/PEIM modules. =20 -Copyright (c) 2012 - 2013, Intel Corporation. All rights reserved.
+Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made availabl= e under the terms and conditions of the BSD License that accompanies this distribu= tion. The full text of the license may be found at @@ -15,10 +15,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHE= R EXPRESS OR IMPLIED. #include #include "CpuExceptionCommon.h" =20 -// -// Image Aglinment size for SEC/PEI phase -// -CONST UINTN mImageAlignSize =3D 4; CONST UINTN mDoFarReturnFlag =3D 0; =20 /** @@ -37,7 +33,7 @@ CommonExceptionHandler ( // // Display ExceptionType, CPU information and Image information // =20 - DumpCpuContent (ExceptionType, SystemContext); + DumpImageAndCpuContent (ExceptionType, SystemContext); =20 // // Enter a dead loop. diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c b/Uef= iCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c index 7ad228c..5a3d416 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c @@ -1,7 +1,7 @@ /** @file CPU exception handler library implemenation for SMM modules. =20 - Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -22,11 +22,6 @@ CONST UINTN mDoFarReturnFlag =3D 1; // SPIN_LOCK mDisplayMessageSpinLock; =20 -// -// Image align size for DXE/SMM -// -CONST UINTN mImageAlignSize =3D SIZE_4KB; - RESERVED_VECTORS_DATA mReservedVectorsData[CPU_EXCEPTION_NUM]; EFI_CPU_INTERRUPT_HANDLER mExternalInterruptHandlerTable[CPU_EXCEPTION_N= UM]; EXCEPTION_HANDLER_DATA mExceptionHandlerData; diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHan= dler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler= .c index 7495b14..c0d19b9 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c @@ -1,7 +1,7 @@ /** @file x64 CPU Exception Handler. =20 - Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -119,33 +119,43 @@ ArchRestoreExceptionContext ( @param SystemContext Pointer to EFI_SYSTEM_CONTEXT. **/ VOID -DumpCpuContent ( +EFIAPI +DumpCpuContext ( IN EFI_EXCEPTION_TYPE ExceptionType, IN EFI_SYSTEM_CONTEXT SystemContext ) { - UINTN ImageBase; - UINTN EntryPoint; - InternalPrintMessage ( "!!!! X64 Exception Type - %02x(%a) CPU Apic ID - %08x !!!!\n", ExceptionType, GetExceptionNameStr (ExceptionType), GetApicId () ); - + if ((mErrorCodeFlag & (1 << ExceptionType)) !=3D 0) { + InternalPrintMessage ( + "ExceptionData - %016lx", + SystemContext.SystemContextX64->ExceptionData + ); + if (ExceptionType =3D=3D EXCEPT_IA32_PAGE_FAULT) { + InternalPrintMessage ( + " I:%x R:%x U:%x W:%x P:%x PK:%x S:%x", + (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) = !=3D 0, + (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_RSVD) = !=3D 0, + (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_US) = !=3D 0, + (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_WR) = !=3D 0, + (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_P) = !=3D 0, + (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_PK) = !=3D 0, + (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_SGX) = !=3D 0 + ); + } + InternalPrintMessage ("\n"); + } InternalPrintMessage ( "RIP - %016lx, CS - %016lx, RFLAGS - %016lx\n", SystemContext.SystemContextX64->Rip, SystemContext.SystemContextX64->Cs, SystemContext.SystemContextX64->Rflags ); - if (mErrorCodeFlag & (1 << ExceptionType)) { - InternalPrintMessage ( - "ExceptionData - %016lx\n", - SystemContext.SystemContextX64->ExceptionData - ); - } InternalPrintMessage ( "RAX - %016lx, RCX - %016lx, RDX - %016lx\n", SystemContext.SystemContextX64->Rax, @@ -230,16 +240,23 @@ DumpCpuContent ( "FXSAVE_STATE - %016lx\n", &SystemContext.SystemContextX64->FxSaveState ); +} =20 +/** + Display CPU information. + + @param ExceptionType Exception type. + @param SystemContext Pointer to EFI_SYSTEM_CONTEXT. +**/ +VOID +DumpImageAndCpuContent ( + IN EFI_EXCEPTION_TYPE ExceptionType, + IN EFI_SYSTEM_CONTEXT SystemContext + ) +{ + DumpCpuContext (ExceptionType, SystemContext); // - // Find module image base and module entry point by RIP + // Dump module image base and module entry point by RIP // - ImageBase =3D FindModuleImageBase (SystemContext.SystemContextX64->Rip, = &EntryPoint); - if (ImageBase !=3D 0) { - InternalPrintMessage ( - " (ImageBase=3D%016lx, EntryPoint=3D%016lx) !!!!\n", - ImageBase, - EntryPoint - ); - } + DumpModuleImageInfo (SystemContext.SystemContextX64->Rip); } --=20 2.9.3.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sat Nov 2 10:26:37 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1491527919268466.3719307704778; Thu, 6 Apr 2017 18:18:39 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 539B820D77DDE; Thu, 6 Apr 2017 18:18:32 -0700 (PDT) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BDF552008317D for ; Thu, 6 Apr 2017 18:18:30 -0700 (PDT) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP; 06 Apr 2017 18:18:30 -0700 Received: from jfan12-desk.ccr.corp.intel.com ([10.239.158.57]) by orsmga004.jf.intel.com with ESMTP; 06 Apr 2017 18:18:29 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,162,1488873600"; d="scan'208";a="74765742" From: Jeff Fan To: edk2-devel@lists.01.org Date: Fri, 7 Apr 2017 09:18:22 +0800 Message-Id: <20170407011823.12664-5-jeff.fan@intel.com> X-Mailer: git-send-email 2.9.3.windows.2 In-Reply-To: <20170407011823.12664-1-jeff.fan@intel.com> References: <20170407011823.12664-1-jeff.fan@intel.com> Subject: [edk2] [PATCH v2 4/5] UefiCpuPkg/PiSmmCpuDxeSmm: Consume new APIs X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Kinney , Feng Tian , Jiewen Yao MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Consuming PeCoffSerachImageBase() from PeCoffGetEntrypointLib and consuming DumpCpuContext() from CpuExceptionHandlerLib to replace its own implementat= ion. Cc: Jiewen Yao Cc: Michael Kinney Cc: Feng Tian Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan Reviewed-by: jiewen.yao@intel.com --- UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 18 +++++-------- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 37 +++-------------------= ---- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 4 +-- UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h | 6 +---- UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 18 +++++-------- 5 files changed, 18 insertions(+), 65 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c b/UefiCpuPkg/PiSmmCpu= DxeSmm/Ia32/PageTbl.c index 119810a..32ce595 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c @@ -1,7 +1,7 @@ /** @file Page table manipulation functions for IA-32 processors =20 -Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.
Copyright (c) 2017, AMD Incorporated. All rights reserved.
=20 This program and the accompanying materials @@ -88,8 +88,8 @@ SmiDefaultPFHandler ( VOID EFIAPI SmiPFHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_SYSTEM_CONTEXT SystemContext + IN EFI_EXCEPTION_TYPE InterruptType, + IN EFI_SYSTEM_CONTEXT SystemContext ) { UINTN PFAddress; @@ -108,6 +108,7 @@ SmiPFHandler ( // if ((PFAddress >=3D mCpuHotPlugData.SmrrBase) && (PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)))= { + DumpCpuContext (InterruptType, SystemContext); CpuIndex =3D GetCpuIndex (); GuardPageAddress =3D (mSmmStackArrayBase + EFI_PAGE_SIZE + CpuIndex * = mSmmStackSize); if ((FeaturePcdGet (PcdCpuSmmStackGuard)) && @@ -115,15 +116,6 @@ SmiPFHandler ( (PFAddress < (GuardPageAddress + EFI_PAGE_SIZE))) { DEBUG ((DEBUG_ERROR, "SMM stack overflow!\n")); } else { - DEBUG ((DEBUG_ERROR, "SMM exception data - 0x%x(", SystemContext.Sys= temContextIa32->ExceptionData)); - DEBUG ((DEBUG_ERROR, "I:%x, R:%x, U:%x, W:%x, P:%x", - (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != =3D 0, - (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_RSVD)= !=3D 0, - (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_US) != =3D 0, - (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_WR) != =3D 0, - (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_P) != =3D 0 - )); - DEBUG ((DEBUG_ERROR, ")\n")); if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID)= !=3D 0) { DEBUG ((DEBUG_ERROR, "SMM exception at execution (0x%x)\n", PFAddr= ess)); DEBUG_CODE ( @@ -144,6 +136,7 @@ SmiPFHandler ( // if ((PFAddress < mCpuHotPlugData.SmrrBase) || (PFAddress >=3D mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)= ) { + DumpCpuContext (InterruptType, SystemContext); if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != =3D 0) { DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%x) out of SMM range aft= er SMM is locked!\n", PFAddress)); DEBUG_CODE ( @@ -166,6 +159,7 @@ SmiPFHandler ( SystemContext.SystemContextIa32->ExceptionData ); } else { + DumpCpuContext (InterruptType, SystemContext); SmiDefaultPFHandler (); } =20 diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmC= puDxeSmm/PiSmmCpuDxeSmm.c index 47cba10..2cb0bbc 100755 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c @@ -173,48 +173,17 @@ DumpModuleInfoByIp ( ) { UINTN Pe32Data; - EFI_IMAGE_DOS_HEADER *DosHdr; - EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr; VOID *PdbPointer; - UINT64 DumpIpAddress; =20 // // Find Image Base // - Pe32Data =3D CallerIpAddress & ~(SIZE_4KB - 1); - while (Pe32Data !=3D 0) { - DosHdr =3D (EFI_IMAGE_DOS_HEADER *) Pe32Data; - if (DosHdr->e_magic =3D=3D EFI_IMAGE_DOS_SIGNATURE) { - // - // DOS image header is present, so read the PE header after the DOS = image header. - // - Hdr.Pe32 =3D (EFI_IMAGE_NT_HEADERS32 *)(Pe32Data + (UINTN) ((DosHdr-= >e_lfanew) & 0x0ffff)); - // - // Make sure PE header address does not overflow and is less than th= e initial address. - // - if (((UINTN)Hdr.Pe32 > Pe32Data) && ((UINTN)Hdr.Pe32 < CallerIpAddre= ss)) { - if (Hdr.Pe32->Signature =3D=3D EFI_IMAGE_NT_SIGNATURE) { - // - // It's PE image. - // - break; - } - } - } - - // - // Not found the image base, check the previous aligned address - // - Pe32Data -=3D SIZE_4KB; - } - - DumpIpAddress =3D CallerIpAddress; - DEBUG ((EFI_D_ERROR, "It is invoked from the instruction before IP(0x%lx= )", DumpIpAddress)); - + Pe32Data =3D PeCoffSerachImageBase (CallerIpAddress); if (Pe32Data !=3D 0) { + DEBUG ((DEBUG_ERROR, "It is invoked from the instruction before IP(0x%= p)", (VOID *) CallerIpAddress)); PdbPointer =3D PeCoffLoaderGetPdbPointer ((VOID *) Pe32Data); if (PdbPointer !=3D NULL) { - DEBUG ((EFI_D_ERROR, " in module (%a)", PdbPointer)); + DEBUG ((DEBUG_ERROR, " in module (%a)\n", PdbPointer)); } } } diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmC= puDxeSmm/PiSmmCpuDxeSmm.h index fc9b06e..dbce9ec 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h @@ -694,8 +694,8 @@ SmmRelocateBases ( VOID EFIAPI SmiPFHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_SYSTEM_CONTEXT SystemContext + IN EFI_EXCEPTION_TYPE InterruptType, + IN EFI_SYSTEM_CONTEXT SystemContext ); =20 /** diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h b/UefiCpuPkg/Pi= SmmCpuDxeSmm/SmmProfileInternal.h index 5aaf945..a216891 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h @@ -1,7 +1,7 @@ /** @file SMM profile internal header file. =20 -Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD = License which accompanies this distribution. The full text of the license may be = found at @@ -41,10 +41,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHE= R EXPRESS OR IMPLIED. // Please disable it. // =20 -#define IA32_PF_EC_P (1u << 0) -#define IA32_PF_EC_WR (1u << 1) -#define IA32_PF_EC_US (1u << 2) -#define IA32_PF_EC_RSVD (1u << 3) #define IA32_PF_EC_ID (1u << 4) =20 #define SMM_PROFILE_NAME L"SmmProfileData" diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuD= xeSmm/X64/PageTbl.c index 19b19d8..32385fa 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c @@ -1,7 +1,7 @@ /** @file Page Fault (#PF) handler for X64 processors =20 -Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.
Copyright (c) 2017, AMD Incorporated. All rights reserved.
=20 This program and the accompanying materials @@ -802,8 +802,8 @@ SmiDefaultPFHandler ( VOID EFIAPI SmiPFHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_SYSTEM_CONTEXT SystemContext + IN EFI_EXCEPTION_TYPE InterruptType, + IN EFI_SYSTEM_CONTEXT SystemContext ) { UINTN PFAddress; @@ -817,6 +817,7 @@ SmiPFHandler ( PFAddress =3D AsmReadCr2 (); =20 if (mCpuSmmStaticPageTable && (PFAddress >=3D LShiftU64 (1, (mPhysicalAd= dressBits - 1)))) { + DumpCpuContext (InterruptType, SystemContext); DEBUG ((DEBUG_ERROR, "Do not support address 0x%lx by processor!\n", P= FAddress)); CpuDeadLoop (); } @@ -827,6 +828,7 @@ SmiPFHandler ( // if ((PFAddress >=3D mCpuHotPlugData.SmrrBase) && (PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)))= { + DumpCpuContext (InterruptType, SystemContext); CpuIndex =3D GetCpuIndex (); GuardPageAddress =3D (mSmmStackArrayBase + EFI_PAGE_SIZE + CpuIndex * = mSmmStackSize); if ((FeaturePcdGet (PcdCpuSmmStackGuard)) && @@ -834,15 +836,6 @@ SmiPFHandler ( (PFAddress < (GuardPageAddress + EFI_PAGE_SIZE))) { DEBUG ((DEBUG_ERROR, "SMM stack overflow!\n")); } else { - DEBUG ((DEBUG_ERROR, "SMM exception data - 0x%lx(", SystemContext.Sy= stemContextX64->ExceptionData)); - DEBUG ((DEBUG_ERROR, "I:%x, R:%x, U:%x, W:%x, P:%x", - (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != =3D 0, - (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_RSVD) = !=3D 0, - (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_US) != =3D 0, - (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_WR) != =3D 0, - (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_P) != =3D 0 - )); - DEBUG ((DEBUG_ERROR, ")\n")); if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) = !=3D 0) { DEBUG ((DEBUG_ERROR, "SMM exception at execution (0x%lx)\n", PFAdd= ress)); DEBUG_CODE ( @@ -863,6 +856,7 @@ SmiPFHandler ( // if ((PFAddress < mCpuHotPlugData.SmrrBase) || (PFAddress >=3D mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)= ) { + DumpCpuContext (InterruptType, SystemContext); if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != =3D 0) { DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%lx) out of SMM range af= ter SMM is locked!\n", PFAddress)); DEBUG_CODE ( --=20 2.9.3.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sat Nov 2 10:26:37 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1491527922071913.6120748221442; Thu, 6 Apr 2017 18:18:42 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 819DA20083182; Thu, 6 Apr 2017 18:18:33 -0700 (PDT) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 124952008317E for ; Thu, 6 Apr 2017 18:18:32 -0700 (PDT) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP; 06 Apr 2017 18:18:32 -0700 Received: from jfan12-desk.ccr.corp.intel.com ([10.239.158.57]) by orsmga004.jf.intel.com with ESMTP; 06 Apr 2017 18:18:30 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,162,1488873600"; d="scan'208";a="74765750" From: Jeff Fan To: edk2-devel@lists.01.org Date: Fri, 7 Apr 2017 09:18:23 +0800 Message-Id: <20170407011823.12664-6-jeff.fan@intel.com> X-Mailer: git-send-email 2.9.3.windows.2 In-Reply-To: <20170407011823.12664-1-jeff.fan@intel.com> References: <20170407011823.12664-1-jeff.fan@intel.com> Subject: [edk2] [PATCH v2 5/5] SourceLevelDebugPkg/DebugAgent.c: Consume PeCoffSerachImageBase() X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Kinney , Feng Tian , Jiewen Yao MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Cc: Jiewen Yao Cc: Michael Kinney Cc: Feng Tian Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan Reviewed-by: jiewen.yao@intel.com --- .../DebugAgent/DebugAgentCommon/DebugAgent.c | 50 +++---------------= ---- 1 file changed, 6 insertions(+), 44 deletions(-) diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugA= gent.c b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugAgent= .c index edd0de1..6f3c419 100644 --- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugAgent.c +++ b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugAgent.c @@ -4,7 +4,7 @@ read/write debug packet to communication with HOST based on transfer protocol. =20 - Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -201,55 +201,17 @@ FindAndReportModuleImageInfo ( ) { UINTN Pe32Data; - EFI_IMAGE_DOS_HEADER *DosHdr; - EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr; PE_COFF_LOADER_IMAGE_CONTEXT ImageContext; =20 // // Find Image Base // - Pe32Data =3D ((UINTN)mErrorMsgVersionAlert) & ~(AlignSize - 1); - while (Pe32Data !=3D 0) { - DosHdr =3D (EFI_IMAGE_DOS_HEADER *) Pe32Data; - if (DosHdr->e_magic =3D=3D EFI_IMAGE_DOS_SIGNATURE) { - // - // DOS image header is present, so read the PE header after the DOS = image header. - // - Hdr.Pe32 =3D (EFI_IMAGE_NT_HEADERS32 *)(Pe32Data + (UINTN) ((DosHdr-= >e_lfanew) & 0x0ffff)); - // - // Make sure PE header address does not overflow and is less than th= e initial address. - // - if (((UINTN)Hdr.Pe32 > Pe32Data) && ((UINTN)Hdr.Pe32 < (UINTN)mError= MsgVersionAlert)) { - if (Hdr.Pe32->Signature =3D=3D EFI_IMAGE_NT_SIGNATURE) { - // - // It's PE image. - // - break; - } - } - } else { - // - // DOS image header is not present, TE header is at the image base. - // - Hdr.Pe32 =3D (EFI_IMAGE_NT_HEADERS32 *)Pe32Data; - if ((Hdr.Te->Signature =3D=3D EFI_TE_IMAGE_HEADER_SIGNATURE) && - ((Hdr.Te->Machine =3D=3D IMAGE_FILE_MACHINE_I386) || Hdr.Te->Mac= hine =3D=3D IMAGE_FILE_MACHINE_X64)) { - // - // It's TE image, it TE header and Machine type match - // - break; - } - } - - // - // Not found the image base, check the previous aligned address - // - Pe32Data -=3D AlignSize; + Pe32Data =3D PeCoffSerachImageBase ((UINTN) mErrorMsgVersionAlert); + if (Pe32Data !=3D 0) { + ImageContext.ImageAddress =3D Pe32Data; + ImageContext.PdbPointer =3D PeCoffLoaderGetPdbPointer ((VOID*) (UINTN)= ImageContext.ImageAddress); + PeCoffLoaderRelocateImageExtraAction (&ImageContext); } - - ImageContext.ImageAddress =3D Pe32Data; - ImageContext.PdbPointer =3D PeCoffLoaderGetPdbPointer ((VOID*) (UINTN) I= mageContext.ImageAddress); - PeCoffLoaderRelocateImageExtraAction (&ImageContext); } =20 /** --=20 2.9.3.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel