From nobody Sat Nov 2 12:32:25 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1491053157414613.8816954807454; Sat, 1 Apr 2017 06:25:57 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 366D121939304; Sat, 1 Apr 2017 06:25:44 -0700 (PDT) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8B2F3219392F4 for ; Sat, 1 Apr 2017 06:25:42 -0700 (PDT) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP; 01 Apr 2017 06:25:42 -0700 Received: from jfan12-desk.ccr.corp.intel.com ([10.239.158.57]) by fmsmga004.fm.intel.com with ESMTP; 01 Apr 2017 06:25:41 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,257,1486454400"; d="scan'208";a="242806011" From: Jeff Fan To: edk2-devel@lists.01.org Date: Sat, 1 Apr 2017 21:25:29 +0800 Message-Id: <20170401132530.8340-9-jeff.fan@intel.com> X-Mailer: git-send-email 2.9.3.windows.2 In-Reply-To: <20170401132530.8340-1-jeff.fan@intel.com> References: <20170401132530.8340-1-jeff.fan@intel.com> Subject: [edk2] [PATCH 8/9] UefiCpuPkg/PiSmmCpuDxeSmm: Consume DumpCpuContext() X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Kinney , Feng Tian , Jiewen Yao MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Cc: Jiewen Yao Cc: Michael Kinney Cc: Feng Tian Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan --- UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 18 ++++++------------ UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 4 ++-- UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h | 6 +----- UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 18 ++++++------------ 4 files changed, 15 insertions(+), 31 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c b/UefiCpuPkg/PiSmmCpu= DxeSmm/Ia32/PageTbl.c index 119810a..32ce595 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c @@ -1,7 +1,7 @@ /** @file Page table manipulation functions for IA-32 processors =20 -Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.
Copyright (c) 2017, AMD Incorporated. All rights reserved.
=20 This program and the accompanying materials @@ -88,8 +88,8 @@ SmiDefaultPFHandler ( VOID EFIAPI SmiPFHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_SYSTEM_CONTEXT SystemContext + IN EFI_EXCEPTION_TYPE InterruptType, + IN EFI_SYSTEM_CONTEXT SystemContext ) { UINTN PFAddress; @@ -108,6 +108,7 @@ SmiPFHandler ( // if ((PFAddress >=3D mCpuHotPlugData.SmrrBase) && (PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)))= { + DumpCpuContext (InterruptType, SystemContext); CpuIndex =3D GetCpuIndex (); GuardPageAddress =3D (mSmmStackArrayBase + EFI_PAGE_SIZE + CpuIndex * = mSmmStackSize); if ((FeaturePcdGet (PcdCpuSmmStackGuard)) && @@ -115,15 +116,6 @@ SmiPFHandler ( (PFAddress < (GuardPageAddress + EFI_PAGE_SIZE))) { DEBUG ((DEBUG_ERROR, "SMM stack overflow!\n")); } else { - DEBUG ((DEBUG_ERROR, "SMM exception data - 0x%x(", SystemContext.Sys= temContextIa32->ExceptionData)); - DEBUG ((DEBUG_ERROR, "I:%x, R:%x, U:%x, W:%x, P:%x", - (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != =3D 0, - (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_RSVD)= !=3D 0, - (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_US) != =3D 0, - (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_WR) != =3D 0, - (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_P) != =3D 0 - )); - DEBUG ((DEBUG_ERROR, ")\n")); if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID)= !=3D 0) { DEBUG ((DEBUG_ERROR, "SMM exception at execution (0x%x)\n", PFAddr= ess)); DEBUG_CODE ( @@ -144,6 +136,7 @@ SmiPFHandler ( // if ((PFAddress < mCpuHotPlugData.SmrrBase) || (PFAddress >=3D mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)= ) { + DumpCpuContext (InterruptType, SystemContext); if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != =3D 0) { DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%x) out of SMM range aft= er SMM is locked!\n", PFAddress)); DEBUG_CODE ( @@ -166,6 +159,7 @@ SmiPFHandler ( SystemContext.SystemContextIa32->ExceptionData ); } else { + DumpCpuContext (InterruptType, SystemContext); SmiDefaultPFHandler (); } =20 diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmC= puDxeSmm/PiSmmCpuDxeSmm.h index 71af2f1..92b0fe6 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h @@ -690,8 +690,8 @@ SmmRelocateBases ( VOID EFIAPI SmiPFHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_SYSTEM_CONTEXT SystemContext + IN EFI_EXCEPTION_TYPE InterruptType, + IN EFI_SYSTEM_CONTEXT SystemContext ); =20 /** diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h b/UefiCpuPkg/Pi= SmmCpuDxeSmm/SmmProfileInternal.h index 5aaf945..a216891 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h @@ -1,7 +1,7 @@ /** @file SMM profile internal header file. =20 -Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD = License which accompanies this distribution. The full text of the license may be = found at @@ -41,10 +41,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHE= R EXPRESS OR IMPLIED. // Please disable it. // =20 -#define IA32_PF_EC_P (1u << 0) -#define IA32_PF_EC_WR (1u << 1) -#define IA32_PF_EC_US (1u << 2) -#define IA32_PF_EC_RSVD (1u << 3) #define IA32_PF_EC_ID (1u << 4) =20 #define SMM_PROFILE_NAME L"SmmProfileData" diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuD= xeSmm/X64/PageTbl.c index 19b19d8..32385fa 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c @@ -1,7 +1,7 @@ /** @file Page Fault (#PF) handler for X64 processors =20 -Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.
Copyright (c) 2017, AMD Incorporated. All rights reserved.
=20 This program and the accompanying materials @@ -802,8 +802,8 @@ SmiDefaultPFHandler ( VOID EFIAPI SmiPFHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_SYSTEM_CONTEXT SystemContext + IN EFI_EXCEPTION_TYPE InterruptType, + IN EFI_SYSTEM_CONTEXT SystemContext ) { UINTN PFAddress; @@ -817,6 +817,7 @@ SmiPFHandler ( PFAddress =3D AsmReadCr2 (); =20 if (mCpuSmmStaticPageTable && (PFAddress >=3D LShiftU64 (1, (mPhysicalAd= dressBits - 1)))) { + DumpCpuContext (InterruptType, SystemContext); DEBUG ((DEBUG_ERROR, "Do not support address 0x%lx by processor!\n", P= FAddress)); CpuDeadLoop (); } @@ -827,6 +828,7 @@ SmiPFHandler ( // if ((PFAddress >=3D mCpuHotPlugData.SmrrBase) && (PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)))= { + DumpCpuContext (InterruptType, SystemContext); CpuIndex =3D GetCpuIndex (); GuardPageAddress =3D (mSmmStackArrayBase + EFI_PAGE_SIZE + CpuIndex * = mSmmStackSize); if ((FeaturePcdGet (PcdCpuSmmStackGuard)) && @@ -834,15 +836,6 @@ SmiPFHandler ( (PFAddress < (GuardPageAddress + EFI_PAGE_SIZE))) { DEBUG ((DEBUG_ERROR, "SMM stack overflow!\n")); } else { - DEBUG ((DEBUG_ERROR, "SMM exception data - 0x%lx(", SystemContext.Sy= stemContextX64->ExceptionData)); - DEBUG ((DEBUG_ERROR, "I:%x, R:%x, U:%x, W:%x, P:%x", - (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != =3D 0, - (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_RSVD) = !=3D 0, - (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_US) != =3D 0, - (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_WR) != =3D 0, - (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_P) != =3D 0 - )); - DEBUG ((DEBUG_ERROR, ")\n")); if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) = !=3D 0) { DEBUG ((DEBUG_ERROR, "SMM exception at execution (0x%lx)\n", PFAdd= ress)); DEBUG_CODE ( @@ -863,6 +856,7 @@ SmiPFHandler ( // if ((PFAddress < mCpuHotPlugData.SmrrBase) || (PFAddress >=3D mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)= ) { + DumpCpuContext (InterruptType, SystemContext); if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != =3D 0) { DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%lx) out of SMM range af= ter SMM is locked!\n", PFAddress)); DEBUG_CODE ( --=20 2.9.3.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel