From nobody Sat Nov 2 12:27:02 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; dkim=fail spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1490870723513869.4506557256473; Thu, 30 Mar 2017 03:45:23 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 6949F2063E049; Thu, 30 Mar 2017 03:45:22 -0700 (PDT) Received: from mail-lf0-x22f.google.com (mail-lf0-x22f.google.com [IPv6:2a00:1450:4010:c07::22f]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 388612063E048 for ; Thu, 30 Mar 2017 03:45:20 -0700 (PDT) Received: by mail-lf0-x22f.google.com with SMTP id h125so23386201lfe.0 for ; Thu, 30 Mar 2017 03:45:20 -0700 (PDT) Received: from localhost.localdomain ([196.81.160.3]) by smtp.gmail.com with ESMTPSA id w10sm11759155wmw.14.2017.03.30.03.45.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Mar 2017 03:45:17 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xkmJ/DOqzyLM0QY9P3o1pQFLpdXJC7YWaHQ5sN5crmc=; b=DblhePAN7UDVQuCmtrlzNshssUc27RrYRqyptaDNee0r5PWhUe3j8IdCes7wnJHPWB 2QdxYL4AYFK638icqX48EMWD5Gr5QzfoH1vx1E5gHPJU/C1leOBITRn33eSRLz88mlo/ vwDEV0I46+OEHXexsPQ1KcRTyuAflCxrqEoD8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=xkmJ/DOqzyLM0QY9P3o1pQFLpdXJC7YWaHQ5sN5crmc=; b=J75mWCFXFXu6RuOYz0U+b6td5EFAnNo/IXqwAvarFf0HzpLDyYuRJ5LAtGtkexBUd7 kcv5HegawY6MffJ2Sy6V1fgD3CI12y4WL/HFSmG/MmyIUk9tSCILbp/zVxE6397uI5Yd 8An+3jxhqoUfxY8Mdwhswh43oIH9Cjuf8Eq9UYcHYuL6UjuvrQ04fNQx9uHBxqst/CE6 dhfLUoLf3S53JQ849+TmdD833jxRFbHkrqXp7NhTJh7qBqVdnKqzfekzqImYjzEpX66y 6r4d/N61ihPYuAlUu37lvuLuGzAC9IuRmnzfqscDWsF/pkkdevuG8MIWqd7AgpC2IM3W QPUw== X-Gm-Message-State: AFeK/H2WpI3XyBRdT+KTkrtpMjvAACl+KQ6HZEN+2N60Q+N7grofZymw4UmjH/Eafyx8YSsb X-Received: by 10.28.131.65 with SMTP id f62mr2912425wmd.4.1490870717833; Thu, 30 Mar 2017 03:45:17 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, ryan.harkin@linaro.org Date: Thu, 30 Mar 2017 11:45:06 +0100 Message-Id: <20170330104508.22171-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170330104508.22171-1-ard.biesheuvel@linaro.org> References: <20170330104508.22171-1-ard.biesheuvel@linaro.org> Subject: [edk2] [RFT PATCH 1/3] ArmPlatformPkg/ArmJunoDxe: use the generic non-discoverable device support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Replace the open coded reimplementation of 'PCI emulation' with a pair of calls into NonDiscoverableDeviceRegistrationLib to register the OHCI and EHCI controllers. These will be picked up by the generic driver instead. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c | 28 +- ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf | 3 +- ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxeInternal.h | 5 - ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.c | 596 --= ------------------ ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.h | 284 --= -------- ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciRootBridgeIo.c | 299 --= -------- 6 files changed, 25 insertions(+), 1190 deletions(-) diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c b/Ar= mPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c index f13c49559bb4..be4a95b55ea0 100644 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c +++ b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include @@ -447,10 +448,29 @@ ArmJunoEntryPoint ( UINT32 JunoRevision; EFI_EVENT EndOfDxeEvent; =20 - Status =3D PciEmulationEntryPoint (); - if (EFI_ERROR (Status)) { - return Status; - } + // + // Register the OHCI and EHCI controllers as non-coherent + // non-discoverable devices. + // + Status =3D RegisterNonDiscoverableMmioDevice ( + NonDiscoverableDeviceTypeOhci, + NonDiscoverableDeviceDmaTypeNonCoherent, + NULL, + NULL, + FixedPcdGet32 (PcdSynopsysUsbOhciBaseAddress), + SIZE_64KB + ); + ASSERT_EFI_ERROR (Status); + + Status =3D RegisterNonDiscoverableMmioDevice ( + NonDiscoverableDeviceTypeEhci, + NonDiscoverableDeviceDmaTypeNonCoherent, + NULL, + NULL, + FixedPcdGet32 (PcdSynopsysUsbEhciBaseAddress), + SIZE_64KB + ); + ASSERT_EFI_ERROR (Status); =20 // // If a hypervisor has been declared then we need to make sure its regio= n is protected at runtime diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf b/= ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf index a2617982b259..dd643b6ab55a 100644 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf +++ b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf @@ -21,8 +21,6 @@ [Defines] [Sources.common] AcpiTables.c ArmJunoDxe.c - PciEmulation.c - PciRootBridgeIo.c =20 [Packages] ArmPkg/ArmPkg.dec @@ -43,6 +41,7 @@ [LibraryClasses] DmaLib DxeServicesTableLib IoLib + NonDiscoverableDeviceRegistrationLib PcdLib PrintLib SerialPortLib diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxeInterna= l.h b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxeInternal.h index df0277067e34..5d2b68fabd12 100644 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxeInternal.h +++ b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxeInternal.h @@ -42,11 +42,6 @@ #define R_TST_CTRL_1 0x0158 /* Test Control Register = 1 */ =20 =20 -EFI_STATUS -PciEmulationEntryPoint ( - VOID - ); - /** * Callback called when ACPI Protocol is installed */ diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.c b/= ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.c deleted file mode 100644 index 2ddebf606e3d..000000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.c +++ /dev/null @@ -1,596 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BS= D License - which accompanies this distribution. The full text of the license may b= e found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. - -**/ - -#include "PciEmulation.h" - -#define HOST_CONTROLLER_OPERATION_REG_SIZE 0x44 - -typedef struct { - ACPI_HID_DEVICE_PATH AcpiDevicePath; - PCI_DEVICE_PATH PciDevicePath; - EFI_DEVICE_PATH_PROTOCOL EndDevicePath; -} EFI_PCI_IO_DEVICE_PATH; - -typedef struct { - UINT32 Signature; - EFI_PCI_IO_DEVICE_PATH DevicePath; - EFI_PCI_IO_PROTOCOL PciIoProtocol; - PCI_TYPE00 *ConfigSpace; - PCI_ROOT_BRIDGE RootBridge; - UINTN Segment; -} EFI_PCI_IO_PRIVATE_DATA; - -#define EFI_PCI_IO_PRIVATE_DATA_SIGNATURE SIGNATURE_32('p', 'c', 'i', = 'o') -#define EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(a) CR (a, EFI_PCI_IO_PRIVATE_DA= TA, PciIoProtocol, EFI_PCI_IO_PRIVATE_DATA_SIGNATURE) - -EFI_PCI_IO_DEVICE_PATH PciIoDevicePathTemplate =3D -{ - { - { ACPI_DEVICE_PATH, ACPI_DP, { sizeof (ACPI_HID_DEVICE_PATH), 0 } }, - EISA_PNP_ID(0x0A03), // HID - 0 // UID - }, - { - { HARDWARE_DEVICE_PATH, HW_PCI_DP, { sizeof (PCI_DEVICE_PATH), 0 } }, - 0, - 0 - }, - { END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DE= VICE_PATH_PROTOCOL), 0} } -}; - -STATIC -VOID -ConfigureUSBHost ( - VOID - ) -{ -} - - -EFI_STATUS -PciIoPollMem ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINT64 Mask, - IN UINT64 Value, - IN UINT64 Delay, - OUT UINT64 *Result - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_STATUS -PciIoPollIo ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINT64 Mask, - IN UINT64 Value, - IN UINT64 Delay, - OUT UINT64 *Result - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_STATUS -PciIoMemRead ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - EFI_PCI_IO_PRIVATE_DATA *Private =3D EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (= This); - - return PciRootBridgeIoMemRead (&Private->RootBridge.Io, - (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Wi= dth, - Private->ConfigSpace->Device.Bar[BarIndex]= + Offset, //Fix me ConfigSpace - Count, - Buffer - ); -} - -EFI_STATUS -PciIoMemWrite ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - EFI_PCI_IO_PRIVATE_DATA *Private =3D EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (= This); - - return PciRootBridgeIoMemWrite (&Private->RootBridge.Io, - (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) W= idth, - Private->ConfigSpace->Device.Bar[BarIndex= ] + Offset, //Fix me ConfigSpace - Count, - Buffer - ); -} - -EFI_STATUS -PciIoIoRead ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_STATUS -PciIoIoWrite ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -/** - Enable a PCI driver to read PCI controller registers in PCI configuratio= n space. - - @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance. - @param[in] Width Signifies the width of the memory operations. - @param[in] Offset The offset within the PCI configuration space for - the PCI controller. - @param[in] Count The number of PCI configuration operations to - perform. Bytes moved is Width size * Count, - starting at Offset. - - @param[in out] Buffer The destination buffer to store the results. - - @retval EFI_SUCCESS The data was read from the PCI controlle= r. - @retval EFI_INVALID_PARAMETER "Width" is invalid. - @retval EFI_INVALID_PARAMETER "Buffer" is NULL. - -**/ -EFI_STATUS -PciIoPciRead ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT32 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - EFI_PCI_IO_PRIVATE_DATA *Private =3D EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (= This); - EFI_STATUS Status; - - if ((Width < 0) || (Width >=3D EfiPciIoWidthMaximum) || (Buffer =3D=3D N= ULL)) { - return EFI_INVALID_PARAMETER; - } - - Status =3D PciRootBridgeIoMemRW ( - (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width, - Count, - TRUE, - (PTR)(UINTN)Buffer, - TRUE, - (PTR)(UINTN)(((UINT8 *)Private->ConfigSpace) + Offset) //Fix= me ConfigSpace - ); - - return Status; -} - -/** - Enable a PCI driver to write PCI controller registers in PCI configurati= on space. - - @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance. - @param[in] Width Signifies the width of the memory operations. - @param[in] Offset The offset within the PCI configuration space for - the PCI controller. - @param[in] Count The number of PCI configuration operations to - perform. Bytes moved is Width size * Count, - starting at Offset. - - @param[in out] Buffer The source buffer to write data from. - - @retval EFI_SUCCESS The data was read from the PCI controlle= r. - @retval EFI_INVALID_PARAMETER "Width" is invalid. - @retval EFI_INVALID_PARAMETER "Buffer" is NULL. - -**/ -EFI_STATUS -PciIoPciWrite ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT32 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - EFI_PCI_IO_PRIVATE_DATA *Private =3D EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (= This); - - if ((Width < 0) || (Width >=3D EfiPciIoWidthMaximum) || (Buffer =3D=3D N= ULL)) { - return EFI_INVALID_PARAMETER; - } - - return PciRootBridgeIoMemRW ((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Wid= th, - Count, - TRUE, - (PTR)(UINTN)(((UINT8 *)Private->ConfigSpace= ) + Offset), //Fix me ConfigSpace - TRUE, - (PTR)(UINTN)Buffer - ); -} - -EFI_STATUS -PciIoCopyMem ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 DestBarIndex, - IN UINT64 DestOffset, - IN UINT8 SrcBarIndex, - IN UINT64 SrcOffset, - IN UINTN Count - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_STATUS -PciIoMap ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_OPERATION Operation, - IN VOID *HostAddress, - IN OUT UINTN *NumberOfBytes, - OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, - OUT VOID **Mapping - ) -{ - DMA_MAP_OPERATION DmaOperation; - - if (Operation =3D=3D EfiPciIoOperationBusMasterRead) { - DmaOperation =3D MapOperationBusMasterRead; - } else if (Operation =3D=3D EfiPciIoOperationBusMasterWrite) { - DmaOperation =3D MapOperationBusMasterWrite; - } else if (Operation =3D=3D EfiPciIoOperationBusMasterCommonBuffer) { - DmaOperation =3D MapOperationBusMasterCommonBuffer; - } else { - return EFI_INVALID_PARAMETER; - } - return DmaMap (DmaOperation, HostAddress, NumberOfBytes, DeviceAddress, = Mapping); -} - -EFI_STATUS -PciIoUnmap ( - IN EFI_PCI_IO_PROTOCOL *This, - IN VOID *Mapping - ) -{ - return DmaUnmap (Mapping); -} - -/** - Allocate pages that are suitable for an EfiPciIoOperationBusMasterCommon= Buffer - mapping. - - @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance. - @param[in] Type This parameter is not used and must be ignored. - @param[in] MemoryType The type of memory to allocate, EfiBootService= sData or - EfiRuntimeServicesData. - @param[in] Pages The number of pages to allocate. - @param[out] HostAddress A pointer to store the base system memory addr= ess of - the allocated range. - @param[in] Attributes The requested bit mask of attributes for the a= llocated - range. Only the attributes, - EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE and - EFI_PCI_ATTRIBUTE_MEMORY_CACHED may be used wi= th this - function. If any other bits are set, then EFI_= UNSUPPORTED - is returned. This function ignores this bit ma= sk. - - @retval EFI_SUCCESS The requested memory pages were allocate= d. - @retval EFI_INVALID_PARAMETER HostAddress is NULL. - @retval EFI_INVALID_PARAMETER MemoryType is invalid. - @retval EFI_UNSUPPORTED Attributes is unsupported. - @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. - -**/ -EFI_STATUS -PciIoAllocateBuffer ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_ALLOCATE_TYPE Type, - IN EFI_MEMORY_TYPE MemoryType, - IN UINTN Pages, - OUT VOID **HostAddress, - IN UINT64 Attributes - ) -{ - if (Attributes & - (~(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | - EFI_PCI_ATTRIBUTE_MEMORY_CACHED ))) { - return EFI_UNSUPPORTED; - } - - return DmaAllocateBuffer (MemoryType, Pages, HostAddress); -} - - -EFI_STATUS -PciIoFreeBuffer ( - IN EFI_PCI_IO_PROTOCOL *This, - IN UINTN Pages, - IN VOID *HostAddress - ) -{ - return DmaFreeBuffer (Pages, HostAddress); -} - - -EFI_STATUS -PciIoFlush ( - IN EFI_PCI_IO_PROTOCOL *This - ) -{ - return EFI_SUCCESS; -} - -/** - Retrieves this PCI controller's current PCI bus number, device number, a= nd function number. - - @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instan= ce. - @param[out] SegmentNumber The PCI controller's current PCI segment nu= mber. - @param[out] BusNumber The PCI controller's current PCI bus number. - @param[out] DeviceNumber The PCI controller's current PCI device num= ber. - @param[out] FunctionNumber The PCI controller's current PCI function n= umber. - - @retval EFI_SUCCESS The PCI controller location was returned. - @retval EFI_INVALID_PARAMETER At least one out of the four output para= meters is - a NULL pointer. -**/ -EFI_STATUS -PciIoGetLocation ( - IN EFI_PCI_IO_PROTOCOL *This, - OUT UINTN *SegmentNumber, - OUT UINTN *BusNumber, - OUT UINTN *DeviceNumber, - OUT UINTN *FunctionNumber - ) -{ - EFI_PCI_IO_PRIVATE_DATA *Private =3D EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (= This); - - if ((SegmentNumber =3D=3D NULL) || (BusNumber =3D=3D NULL) || - (DeviceNumber =3D=3D NULL) || (FunctionNumber =3D=3D NULL) ) { - return EFI_INVALID_PARAMETER; - } - - *SegmentNumber =3D Private->Segment; - *BusNumber =3D 0xff; - *DeviceNumber =3D 0; - *FunctionNumber =3D 0; - - return EFI_SUCCESS; -} - -/** - Performs an operation on the attributes that this PCI controller support= s. - - The operations include getting the set of supported attributes, retrievi= ng - the current attributes, setting the current attributes, enabling attribu= tes, - and disabling attributes. - - @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance. - @param[in] Operation The operation to perform on the attributes for = this - PCI controller. - @param[in] Attributes The mask of attributes that are used for Set, - Enable and Disable operations. - @param[out] Result A pointer to the result mask of attributes that= are - returned for the Get and Supported operations. = This - is an optional parameter that may be NULL for t= he - Set, Enable, and Disable operations. - - @retval EFI_SUCCESS The operation on the PCI controller's - attributes was completed. If the operati= on - was Get or Supported, then the attribute= mask - is returned in Result. - @retval EFI_INVALID_PARAMETER Operation is greater than or equal to - EfiPciIoAttributeOperationMaximum. - @retval EFI_INVALID_PARAMETER Operation is Get and Result is NULL. - @retval EFI_INVALID_PARAMETER Operation is Supported and Result is NUL= L. - -**/ -EFI_STATUS -PciIoAttributes ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation, - IN UINT64 Attributes, - OUT UINT64 *Result OPTIONAL - ) -{ - switch (Operation) { - case EfiPciIoAttributeOperationGet: - case EfiPciIoAttributeOperationSupported: - if (Result =3D=3D NULL) { - return EFI_INVALID_PARAMETER; - } - // - // We are not a real PCI device so just say things we kind of do - // - *Result =3D EFI_PCI_DEVICE_ENABLE; - break; - - case EfiPciIoAttributeOperationSet: - case EfiPciIoAttributeOperationEnable: - case EfiPciIoAttributeOperationDisable: - if (Attributes & (~EFI_PCI_DEVICE_ENABLE)) { - return EFI_UNSUPPORTED; - } - // Since we are not a real PCI device no enable/set or disable operati= ons exist. - return EFI_SUCCESS; - - default: - return EFI_INVALID_PARAMETER; - }; - return EFI_SUCCESS; -} - -EFI_STATUS -PciIoGetBarAttributes ( - IN EFI_PCI_IO_PROTOCOL *This, - IN UINT8 BarIndex, - OUT UINT64 *Supports, OPTIONAL - OUT VOID **Resources OPTIONAL - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_STATUS -PciIoSetBarAttributes ( - IN EFI_PCI_IO_PROTOCOL *This, - IN UINT64 Attributes, - IN UINT8 BarIndex, - IN OUT UINT64 *Offset, - IN OUT UINT64 *Length - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_PCI_IO_PROTOCOL PciIoTemplate =3D -{ - PciIoPollMem, - PciIoPollIo, - { PciIoMemRead, PciIoMemWrite }, - { PciIoIoRead, PciIoIoWrite }, - { PciIoPciRead, PciIoPciWrite }, - PciIoCopyMem, - PciIoMap, - PciIoUnmap, - PciIoAllocateBuffer, - PciIoFreeBuffer, - PciIoFlush, - PciIoGetLocation, - PciIoAttributes, - PciIoGetBarAttributes, - PciIoSetBarAttributes, - 0, - 0 -}; - -EFI_STATUS -PciInstallDevice ( - IN UINTN DeviceId, - IN PHYSICAL_ADDRESS MemoryStart, - IN UINT64 MemorySize, - IN UINTN ClassCode1, - IN UINTN ClassCode2, - IN UINTN ClassCode3 - ) -{ - EFI_STATUS Status; - EFI_HANDLE Handle; - EFI_PCI_IO_PRIVATE_DATA *Private; - - // Configure USB host - ConfigureUSBHost (); - - // Create a private structure - Private =3D AllocatePool (sizeof (EFI_PCI_IO_PRIVATE_DATA)); - if (Private =3D=3D NULL) { - Status =3D EFI_OUT_OF_RESOURCES; - return Status; - } - - Private->Signature =3D EFI_PCI_IO_PRIVATE_DATA_SIGNATURE; = // Fill in signature - Private->RootBridge.Signature =3D PCI_ROOT_BRIDGE_SIGNATURE; = // Fake Root Bridge structure needs a signature too - Private->RootBridge.MemoryStart =3D MemoryStart; // Get the USB capabili= ty register base - Private->Segment =3D 0; = // Default to segment zero - - // Calculate the total size of the USB controller (OHCI + EHCI). - Private->RootBridge.MemorySize =3D MemorySize; //CapabilityLength + (HOS= T_CONTROLLER_OPERATION_REG_SIZE + ((4 * PhysicalPorts) - 1)); - - // Create fake PCI config space: OHCI + EHCI - Private->ConfigSpace =3D AllocateZeroPool (sizeof (PCI_TYPE00)); - if (Private->ConfigSpace =3D=3D NULL) { - Status =3D EFI_OUT_OF_RESOURCES; - FreePool (Private); - return Status; - } - - // - // Configure PCI config space: OHCI + EHCI - // - Private->ConfigSpace->Hdr.VendorId =3D 0xFFFF; // Invalid vendor Id as i= t is not an actual device. - Private->ConfigSpace->Hdr.DeviceId =3D 0x0000; // Not relevant as the ve= ndor id is not valid. - Private->ConfigSpace->Hdr.ClassCode[0] =3D ClassCode1; - Private->ConfigSpace->Hdr.ClassCode[1] =3D ClassCode2; - Private->ConfigSpace->Hdr.ClassCode[2] =3D ClassCode3; - Private->ConfigSpace->Device.Bar[0] =3D MemoryStart; - - Handle =3D NULL; - - // Unique device path. - CopyMem (&Private->DevicePath, &PciIoDevicePathTemplate, sizeof (PciIoDe= vicePathTemplate)); - Private->DevicePath.AcpiDevicePath.UID =3D 1; // Use '1' to differentiat= e from PLDA root complex - Private->DevicePath.PciDevicePath.Device =3D DeviceId; - - // Copy protocol structure - CopyMem (&Private->PciIoProtocol, &PciIoTemplate, sizeof (PciIoTemplate)= ); - - Status =3D gBS->InstallMultipleProtocolInterfaces (&Handle, - &gEfiPciIoProtocolGuid, = &Private->PciIoProtocol, - &gEfiDevicePathProtocolG= uid, &Private->DevicePath, - NULL); - if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "PciEmulationEntryPoint InstallMultipleProtocolIn= terfaces () failed.\n")); - } - - return Status; -} - -EFI_STATUS -PciEmulationEntryPoint ( - VOID - ) -{ - EFI_STATUS Status; - - Status =3D PciInstallDevice (0, FixedPcdGet32 (PcdSynopsysUsbOhciBaseAdd= ress), SIZE_64KB, PCI_IF_OHCI, PCI_CLASS_SERIAL_USB, PCI_CLASS_SERIAL); - if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "PciEmulation: failed to install OHCI device.\n")= ); - } - - Status =3D PciInstallDevice (1, FixedPcdGet32 (PcdSynopsysUsbEhciBaseAdd= ress), SIZE_64KB, PCI_IF_EHCI, PCI_CLASS_SERIAL_USB, PCI_CLASS_SERIAL); - if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "PciEmulation: failed to install EHCI device.\n")= ); - } - - return Status; -} diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.h b/= ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.h deleted file mode 100644 index de2855d01d6b..000000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciEmulation.h +++ /dev/null @@ -1,284 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BS= D License - which accompanies this distribution. The full text of the license may b= e found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. - -**/ - -#ifndef _PCI_ROOT_BRIDGE_H_ -#define _PCI_ROOT_BRIDGE_H_ - -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include - -#include "ArmJunoDxeInternal.h" - -#define EFI_RESOURCE_NONEXISTENT 0xFFFFFFFFFFFFFFFFULL -#define EFI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFEULL -#define EFI_RESOURCE_SATISFIED 0x0000000000000000ULL - - -typedef struct { - ACPI_HID_DEVICE_PATH AcpiDevicePath; - EFI_DEVICE_PATH_PROTOCOL EndDevicePath; -} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH; - - -#define ACPI_CONFIG_IO 0 -#define ACPI_CONFIG_MMIO 1 -#define ACPI_CONFIG_BUS 2 - -typedef struct { - EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR Desc[3]; - EFI_ACPI_END_TAG_DESCRIPTOR EndDesc; -} ACPI_CONFIG_INFO; - - -#define PCI_ROOT_BRIDGE_SIGNATURE SIGNATURE_32 ('P', 'c', 'i', 'F') - -typedef struct { - UINT32 Signature; - EFI_HANDLE Handle; - EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL Io; - EFI_PCI_ROOT_BRIDGE_DEVICE_PATH DevicePath; - - UINT8 StartBus; - UINT8 EndBus; - UINT16 Type; - UINT32 MemoryStart; - UINT32 MemorySize; - UINTN IoOffset; - UINT32 IoStart; - UINT32 IoSize; - UINT64 PciAttributes; - - ACPI_CONFIG_INFO *Config; - -} PCI_ROOT_BRIDGE; - - -#define INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(a) CR (a, PCI_ROOT_BRIDGE, I= o, PCI_ROOT_BRIDGE_SIGNATURE) - - -typedef union { - UINT8 volatile *Buffer; - UINT8 volatile *Ui8; - UINT16 volatile *Ui16; - UINT32 volatile *Ui32; - UINT64 volatile *Ui64; - UINTN volatile Ui; -} PTR; - - - -EFI_STATUS -EFIAPI -PciRootBridgeIoPollMem ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINT64 Mask, - IN UINT64 Value, - IN UINT64 Delay, - OUT UINT64 *Result - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoPollIo ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINT64 Mask, - IN UINT64 Value, - IN UINT64 Delay, - OUT UINT64 *Result - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoMemRead ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN OUT VOID *Buffer - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoMemWrite ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN OUT VOID *Buffer - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoIoRead ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 UserAddress, - IN UINTN Count, - IN OUT VOID *UserBuffer - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoIoWrite ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 UserAddress, - IN UINTN Count, - IN OUT VOID *UserBuffer - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoCopyMem ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 DestAddress, - IN UINT64 SrcAddress, - IN UINTN Count - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoPciRead ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN OUT VOID *Buffer - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoPciWrite ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN OUT VOID *Buffer - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoMap ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation, - IN VOID *HostAddress, - IN OUT UINTN *NumberOfBytes, - OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, - OUT VOID **Mapping - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoUnmap ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN VOID *Mapping - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoAllocateBuffer ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_ALLOCATE_TYPE Type, - IN EFI_MEMORY_TYPE MemoryType, - IN UINTN Pages, - OUT VOID **HostAddress, - IN UINT64 Attributes - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoFreeBuffer ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN UINTN Pages, - OUT VOID *HostAddress - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoFlush ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoGetAttributes ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - OUT UINT64 *Supported, - OUT UINT64 *Attributes - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoSetAttributes ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN UINT64 Attributes, - IN OUT UINT64 *ResourceBase, - IN OUT UINT64 *ResourceLength - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoConfiguration ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - OUT VOID **Resources - ); - -// -// Private Function Prototypes -// -EFI_STATUS -EFIAPI -PciRootBridgeIoMemRW ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINTN Count, - IN BOOLEAN InStrideFlag, - IN PTR In, - IN BOOLEAN OutStrideFlag, - OUT PTR Out - ); - -BOOLEAN -PciIoMemAddressValid ( - IN EFI_PCI_IO_PROTOCOL *This, - IN UINT64 Address - ); - -EFI_STATUS -EmulatePciIoForEhci ( - INTN MvPciIfMaxIf - ); - -#endif diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciRootBridgeIo.c= b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciRootBridgeIo.c deleted file mode 100644 index f1eaceff28d8..000000000000 --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/PciRootBridgeIo.c +++ /dev/null @@ -1,299 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BS= D License - which accompanies this distribution. The full text of the license may b= e found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. - -**/ - -#include "PciEmulation.h" - -BOOLEAN -PciRootBridgeMemAddressValid ( - IN PCI_ROOT_BRIDGE *Private, - IN UINT64 Address - ) -{ - if ((Address >=3D Private->MemoryStart) && (Address < (Private->MemorySt= art + Private->MemorySize))) { - return TRUE; - } - - return FALSE; -} - - -EFI_STATUS -PciRootBridgeIoMemRW ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINTN Count, - IN BOOLEAN InStrideFlag, - IN PTR In, - IN BOOLEAN OutStrideFlag, - OUT PTR Out - ) -{ - UINTN Stride; - UINTN InStride; - UINTN OutStride; - - Width =3D (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (Width & 0x03); - Stride =3D (UINTN)1 << Width; - InStride =3D InStrideFlag ? Stride : 0; - OutStride =3D OutStrideFlag ? Stride : 0; - - // - // Loop for each iteration and move the data - // - switch (Width) { - case EfiPciWidthUint8: - for (;Count > 0; Count--, In.Buffer +=3D InStride, Out.Buffer +=3D Out= Stride) { - *In.Ui8 =3D *Out.Ui8; - } - break; - case EfiPciWidthUint16: - for (;Count > 0; Count--, In.Buffer +=3D InStride, Out.Buffer +=3D Out= Stride) { - *In.Ui16 =3D *Out.Ui16; - } - break; - case EfiPciWidthUint32: - for (;Count > 0; Count--, In.Buffer +=3D InStride, Out.Buffer +=3D Out= Stride) { - *In.Ui32 =3D *Out.Ui32; - } - break; - default: - return EFI_INVALID_PARAMETER; - } - - return EFI_SUCCESS; -} - -EFI_STATUS -PciRootBridgeIoPciRW ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN BOOLEAN Write, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 UserAddress, - IN UINTN Count, - IN OUT VOID *UserBuffer - ) -{ - return EFI_SUCCESS; -} - -/** - Enables a PCI driver to access PCI controller registers in the PCI root = bridge memory space. - - @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PR= OTOCOL. - @param Width Signifies the width of the memory operatio= ns. - @param Address The base address of the memory operations. - @param Count The number of memory operations to perform. - @param Buffer For read operations, the destination buffe= r to store the results. For write - operations, the source buffer to write dat= a from. - - @retval EFI_SUCCESS The data was read from or written to the P= CI root bridge. - @retval EFI_OUT_OF_RESOURCES The request could not be completed due to = a lack of resources. - @retval EFI_INVALID_PARAMETER One or more parameters are invalid. - -**/ -EFI_STATUS -EFIAPI -PciRootBridgeIoMemRead ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - PCI_ROOT_BRIDGE *Private; - UINTN AlignMask; - PTR In; - PTR Out; - - if ( Buffer =3D=3D NULL ) { - return EFI_INVALID_PARAMETER; - } - - Private =3D INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This); - - if (!PciRootBridgeMemAddressValid (Private, Address)) { - return EFI_INVALID_PARAMETER; - } - - AlignMask =3D (1 << (Width & 0x03)) - 1; - if (Address & AlignMask) { - return EFI_INVALID_PARAMETER; - } - - In.Buffer =3D Buffer; - Out.Buffer =3D (VOID *)(UINTN) Address; - - switch (Width) { - case EfiPciWidthUint8: - case EfiPciWidthUint16: - case EfiPciWidthUint32: - case EfiPciWidthUint64: - return PciRootBridgeIoMemRW (Width, Count, TRUE, In, TRUE, Out); - - case EfiPciWidthFifoUint8: - case EfiPciWidthFifoUint16: - case EfiPciWidthFifoUint32: - case EfiPciWidthFifoUint64: - return PciRootBridgeIoMemRW (Width, Count, TRUE, In, FALSE, Out); - - case EfiPciWidthFillUint8: - case EfiPciWidthFillUint16: - case EfiPciWidthFillUint32: - case EfiPciWidthFillUint64: - return PciRootBridgeIoMemRW (Width, Count, FALSE, In, TRUE, Out); - - default: - break; - } - - return EFI_INVALID_PARAMETER; -} - -/** - Enables a PCI driver to access PCI controller registers in the PCI root = bridge memory space. - - @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PR= OTOCOL. - @param Width Signifies the width of the memory operatio= ns. - @param Address The base address of the memory operations. - @param Count The number of memory operations to perform. - @param Buffer For read operations, the destination buffe= r to store the results. For write - operations, the source buffer to write dat= a from. - - @retval EFI_SUCCESS The data was read from or written to the P= CI root bridge. - @retval EFI_OUT_OF_RESOURCES The request could not be completed due to = a lack of resources. - @retval EFI_INVALID_PARAMETER One or more parameters are invalid. - -**/ -EFI_STATUS -EFIAPI -PciRootBridgeIoMemWrite ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - PCI_ROOT_BRIDGE *Private; - UINTN AlignMask; - PTR In; - PTR Out; - - if ( Buffer =3D=3D NULL ) { - return EFI_INVALID_PARAMETER; - } - - Private =3D INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This); - - if (!PciRootBridgeMemAddressValid (Private, Address)) { - return EFI_INVALID_PARAMETER; - } - - AlignMask =3D (1 << (Width & 0x03)) - 1; - if (Address & AlignMask) { - return EFI_INVALID_PARAMETER; - } - - In.Buffer =3D (VOID *)(UINTN) Address; - Out.Buffer =3D Buffer; - - switch (Width) { - case EfiPciWidthUint8: - case EfiPciWidthUint16: - case EfiPciWidthUint32: - case EfiPciWidthUint64: - return PciRootBridgeIoMemRW (Width, Count, TRUE, In, TRUE, Out); - - case EfiPciWidthFifoUint8: - case EfiPciWidthFifoUint16: - case EfiPciWidthFifoUint32: - case EfiPciWidthFifoUint64: - return PciRootBridgeIoMemRW (Width, Count, FALSE, In, TRUE, Out); - - case EfiPciWidthFillUint8: - case EfiPciWidthFillUint16: - case EfiPciWidthFillUint32: - case EfiPciWidthFillUint64: - return PciRootBridgeIoMemRW (Width, Count, TRUE, In, FALSE, Out); - - default: - break; - } - - return EFI_INVALID_PARAMETER; -} - -/** - Enables a PCI driver to access PCI controller registers in the PCI root = bridge memory space. - - @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PR= OTOCOL. - @param Width Signifies the width of the memory operatio= ns. - @param Address The base address of the memory operations. - @param Count The number of memory operations to perform. - @param Buffer For read operations, the destination buffe= r to store the results. For write - operations, the source buffer to write dat= a from. - - @retval EFI_SUCCESS The data was read from or written to the P= CI root bridge. - @retval EFI_OUT_OF_RESOURCES The request could not be completed due to = a lack of resources. - @retval EFI_INVALID_PARAMETER One or more parameters are invalid. - -**/ -EFI_STATUS -EFIAPI -PciRootBridgeIoPciRead ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - if (Buffer =3D=3D NULL) { - return EFI_INVALID_PARAMETER; - } - - return PciRootBridgeIoPciRW (This, FALSE, Width, Address, Count, Buffer); -} - -/** - Enables a PCI driver to access PCI controller registers in the PCI root = bridge memory space. - - @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PR= OTOCOL. - @param Width Signifies the width of the memory operatio= ns. - @param Address The base address of the memory operations. - @param Count The number of memory operations to perform. - @param Buffer For read operations, the destination buffe= r to store the results. For write - operations, the source buffer to write dat= a from. - - @retval EFI_SUCCESS The data was read from or written to the P= CI root bridge. - @retval EFI_OUT_OF_RESOURCES The request could not be completed due to = a lack of resources. - @retval EFI_INVALID_PARAMETER One or more parameters are invalid. - -**/ -EFI_STATUS -EFIAPI -PciRootBridgeIoPciWrite ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - if (Buffer =3D=3D NULL) { - return EFI_INVALID_PARAMETER; - } - - return PciRootBridgeIoPciRW (This, TRUE, Width, Address, Count, Buffer); -} --=20 2.9.3 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel