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28 Mar 2017 20:03:59 -0700 Received: from ray-dev.ccr.corp.intel.com ([10.239.9.25]) by orsmga001.jf.intel.com with ESMTP; 28 Mar 2017 20:03:58 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,239,1486454400"; d="scan'208";a="1113146627" From: Ruiyu Ni To: edk2-devel@lists.01.org Date: Wed, 29 Mar 2017 11:03:46 +0800 Message-Id: <20170329030346.249872-11-ruiyu.ni@intel.com> X-Mailer: git-send-email 2.9.0.windows.1 In-Reply-To: <20170329030346.249872-1-ruiyu.ni@intel.com> References: <20170329030346.249872-1-ruiyu.ni@intel.com> Subject: [edk2] [PATCH 10/10] UefiCpuPkg/MtrrLib: All functions use definitions in Msr.h X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jeff Fan MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni Cc: Jeff Fan --- UefiCpuPkg/Library/MtrrLib/MtrrLib.c | 55 +++++++++++++++++++++-----------= ---- 1 file changed, 33 insertions(+), 22 deletions(-) diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c b/UefiCpuPkg/Library/Mtrr= Lib/MtrrLib.c index 920cc5f..b7af838 100644 --- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c +++ b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c @@ -50,57 +50,57 @@ typedef struct { // CONST FIXED_MTRR mMtrrLibFixedMtrrTable[] =3D { { - MTRR_LIB_IA32_MTRR_FIX64K_00000, + MSR_IA32_MTRR_FIX64K_00000, 0, SIZE_64KB }, { - MTRR_LIB_IA32_MTRR_FIX16K_80000, + MSR_IA32_MTRR_FIX16K_80000, 0x80000, SIZE_16KB }, { - MTRR_LIB_IA32_MTRR_FIX16K_A0000, + MSR_IA32_MTRR_FIX16K_A0000, 0xA0000, SIZE_16KB }, { - MTRR_LIB_IA32_MTRR_FIX4K_C0000, + MSR_IA32_MTRR_FIX4K_C0000, 0xC0000, SIZE_4KB }, { - MTRR_LIB_IA32_MTRR_FIX4K_C8000, + MSR_IA32_MTRR_FIX4K_C8000, 0xC8000, SIZE_4KB }, { - MTRR_LIB_IA32_MTRR_FIX4K_D0000, + MSR_IA32_MTRR_FIX4K_D0000, 0xD0000, SIZE_4KB }, { - MTRR_LIB_IA32_MTRR_FIX4K_D8000, + MSR_IA32_MTRR_FIX4K_D8000, 0xD8000, SIZE_4KB }, { - MTRR_LIB_IA32_MTRR_FIX4K_E0000, + MSR_IA32_MTRR_FIX4K_E0000, 0xE0000, SIZE_4KB }, { - MTRR_LIB_IA32_MTRR_FIX4K_E8000, + MSR_IA32_MTRR_FIX4K_E8000, 0xE8000, SIZE_4KB }, { - MTRR_LIB_IA32_MTRR_FIX4K_F0000, + MSR_IA32_MTRR_FIX4K_F0000, 0xF0000, SIZE_4KB }, { - MTRR_LIB_IA32_MTRR_FIX4K_F8000, + MSR_IA32_MTRR_FIX4K_F8000, 0xF8000, SIZE_4KB } @@ -214,11 +214,15 @@ MtrrGetDefaultMemoryTypeWorker ( IN MTRR_SETTINGS *MtrrSetting ) { + MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType; + if (MtrrSetting =3D=3D NULL) { - return (MTRR_MEMORY_CACHE_TYPE) (AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_= TYPE) & 0x7); + DefType.Uint64 =3D AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE); } else { - return (MTRR_MEMORY_CACHE_TYPE) (MtrrSetting->MtrrDefType & 0x7); + DefType.Uint64 =3D MtrrSetting->MtrrDefType; } + + return (MTRR_MEMORY_CACHE_TYPE) DefType.Bits.Type; } =20 =20 @@ -254,6 +258,7 @@ MtrrLibPreMtrrChange ( OUT MTRR_CONTEXT *MtrrContext ) { + MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType; // // Disable interrupts and save current interrupt state // @@ -278,7 +283,9 @@ MtrrLibPreMtrrChange ( // // Disable MTRRs // - AsmMsrBitFieldWrite64 (MTRR_LIB_IA32_MTRR_DEF_TYPE, 10, 11, 0); + DefType.Uint64 =3D AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE); + DefType.Bits.E =3D 0; + AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, DefType.Uint64); } =20 /** @@ -330,10 +337,14 @@ MtrrLibPostMtrrChange ( IN MTRR_CONTEXT *MtrrContext ) { + MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType; // // Enable Cache MTRR // - AsmMsrBitFieldWrite64 (MTRR_LIB_IA32_MTRR_DEF_TYPE, 10, 11, 3); + DefType.Uint64 =3D AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE); + DefType.Bits.E =3D 1; + DefType.Bits.FE =3D 1; + AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, DefType.Uint64); =20 MtrrLibPostMtrrChangeEnableCache (MtrrContext); } @@ -412,9 +423,9 @@ MtrrGetVariableMtrrWorker ( for (Index =3D 0; Index < VariableMtrrCount; Index++) { if (MtrrSetting =3D=3D NULL) { VariableSettings->Mtrr[Index].Base =3D - AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1)); + AsmReadMsr64 (MSR_IA32_MTRR_PHYSBASE0 + (Index << 1)); VariableSettings->Mtrr[Index].Mask =3D - AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1) + 1); + AsmReadMsr64 (MSR_IA32_MTRR_PHYSMASK0 + (Index << 1)); } else { VariableSettings->Mtrr[Index].Base =3D MtrrSetting->Variables.Mtrr[I= ndex].Base; VariableSettings->Mtrr[Index].Mask =3D MtrrSetting->Variables.Mtrr[I= ndex].Mask; @@ -591,7 +602,7 @@ MtrrGetMemoryAttributeInVariableMtrrWorker ( =20 ZeroMem (VariableMtrr, sizeof (VARIABLE_MTRR) * MTRR_NUMBER_OF_VARIABLE_= MTRR); for (Index =3D 0, UsedMtrr =3D 0; Index < VariableMtrrCount; Index++) { - if ((VariableSettings->Mtrr[Index].Mask & MTRR_LIB_CACHE_MTRR_ENABLED)= !=3D 0) { + if (((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &VariableSettings->Mtrr[Index= ].Mask)->Bits.V !=3D 0) { VariableMtrr[Index].Msr =3D (UINT32)Index; VariableMtrr[Index].BaseAddress =3D (VariableSettings->Mtrr[Index].B= ase & MtrrValidAddressMask); VariableMtrr[Index].Length =3D ((~(VariableSettings->Mtrr[Index= ].Mask & MtrrValidAddressMask)) & MtrrValidBitsMask) + 1; @@ -2206,11 +2217,11 @@ MtrrSetVariableMtrrWorker ( =20 for (Index =3D 0; Index < VariableMtrrCount; Index++) { AsmWriteMsr64 ( - MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1), + MSR_IA32_MTRR_PHYSBASE0 + (Index << 1), VariableSettings->Mtrr[Index].Base ); AsmWriteMsr64 ( - MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1) + 1, + MSR_IA32_MTRR_PHYSMASK0 + (Index << 1), VariableSettings->Mtrr[Index].Mask ); } @@ -2331,7 +2342,7 @@ MtrrGetAllMtrrs ( // // Get MTRR_DEF_TYPE value // - MtrrSetting->MtrrDefType =3D AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE); + MtrrSetting->MtrrDefType =3D AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE); =20 return MtrrSetting; } @@ -2372,7 +2383,7 @@ MtrrSetAllMtrrs ( // // Set MTRR_DEF_TYPE value // - AsmWriteMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE, MtrrSetting->MtrrDefType); + AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, MtrrSetting->MtrrDefType); =20 MtrrLibPostMtrrChangeEnableCache (&MtrrContext); =20 --=20 2.9.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel