From nobody Sun Apr 28 23:24:53 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1489731300975390.02221729132214; Thu, 16 Mar 2017 23:15:00 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 2991C802B3; Thu, 16 Mar 2017 23:14:59 -0700 (PDT) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E7760802B2 for ; Thu, 16 Mar 2017 23:14:57 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Mar 2017 23:14:57 -0700 Received: from zwei4-mobl.ccr.corp.intel.com ([10.239.197.157]) by orsmga003.jf.intel.com with ESMTP; 16 Mar 2017 23:14:56 -0700 X-Original-To: edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1489731298; x=1521267298; h=from:to:subject:date:message-id; bh=Ul0sT+ep/QkRPTnIrQ5BVB+agDD1juF7v2rUSP+SY94=; b=Z2fXo6Rl8m4/YLmoEe2be/awtolweXe5p4YDCZjvcvCnFxFMOPVid+w+ kJZseRfslSkTwlLxt40zizZOZf9gCg==; X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,175,1486454400"; d="scan'208";a="945338722" From: zwei4 To: edk2-devel@lists.01.org Date: Fri, 17 Mar 2017 14:14:50 +0800 Message-Id: <20170317061450.1268-1-david.wei@intel.com> X-Mailer: git-send-email 2.11.0.windows.1 Subject: [edk2] [Patch][edk2-platforms/devel-MinnowBoard3] Enable Processor Power Management. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 --- .../Common/PlatformSettings/PlatformSetupDxe/Cpu.vfi | 6 ++= +--- .../Common/PlatformSettings/PlatformSetupDxe/CpuPower.vfi | 6 ++= +--- Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc | 2 +- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSe= tupDxe/Cpu.vfi b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/Platfo= rmSetupDxe/Cpu.vfi index 81c19bcd3..b2bafa979 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/= Cpu.vfi +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/= Cpu.vfi @@ -1,7 +1,7 @@ // /** @file // CPU Setup formset. // -// Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.
+// Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.
// // This program and the accompanying materials // are licensed and made available under the terms and conditions of the = BSD License @@ -64,8 +64,8 @@ form formid =3D CPU_CONFIGURATION_FORM_ID, oneof varid =3D Setup.ActiveProcessorCores, prompt =3D STRING_TOKEN(STR_ACTIVE_PROCESSOR_CORES_PROMPT), help =3D STRING_TOKEN(STR_ACTIVE_PROCESSOR_CORES_HELP), - option text =3D STRING_TOKEN(STR_DISABLE), value =3D 0, flags =3D MANU= FACTURING | DEFAULT | RESET_REQUIRED; - option text =3D STRING_TOKEN(STR_ENABLE), value =3D 1, flags =3D RESE= T_REQUIRED; =20 + option text =3D STRING_TOKEN(STR_DISABLE), value =3D 0, flags =3D RESE= T_REQUIRED; + option text =3D STRING_TOKEN(STR_ENABLE), value =3D 1, flags =3D MANU= FACTURING | DEFAULT | RESET_REQUIRED; =20 endoneof; =20 grayoutif TRUE; diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSe= tupDxe/CpuPower.vfi b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/P= latformSetupDxe/CpuPower.vfi index e54fc46dd..fe6ba6814 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/= CpuPower.vfi +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/= CpuPower.vfi @@ -1,7 +1,7 @@ // /** @file // CPU Power Setup formset. // -// Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.
+// Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.
// // This program and the accompanying materials // are licensed and made available under the terms and conditions of the = BSD License @@ -64,9 +64,9 @@ form formid =3D CPU_PWR_CONFIGURATION_FORM_ID, oneof varid =3D Setup.MaxPkgCState, prompt =3D STRING_TOKEN(STR_MAX_PKG_CSTATE_SUPPORT_PROMPT), help =3D STRING_TOKEN(STR_MAX_PKG_CSTATE_STATE_SUPPORT_HELP), - option text =3D STRING_TOKEN(STR_MAX_PKG_CSTATE_C2), value =3D 2, f= lags =3D DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text =3D STRING_TOKEN(STR_MAX_PKG_CSTATE_C2), value =3D 2, f= lags =3D RESET_REQUIRED; option text =3D STRING_TOKEN(STR_MAX_PKG_CSTATE_C1), value =3D 1, f= lags =3D RESET_REQUIRED; - option text =3D STRING_TOKEN(STR_MAX_PKG_CSTATE_C0), value =3D 0, f= lags =3D RESET_REQUIRED; + option text =3D STRING_TOKEN(STR_MAX_PKG_CSTATE_C0), value =3D 0, f= lags =3D DEFAULT | MANUFACTURING | RESET_REQUIRED; endoneof; endif; =20 diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc b/Platform= /BroxtonPlatformPkg/PlatformDsc/Defines.dsc index 47bb9200b..e8866a0dc 100644 --- a/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc @@ -67,7 +67,7 @@ DEFINE SHELL_ENABLE =3D TRUE DEFINE ME_ENABLE =3D TRUE DEFINE DTS_ENABLE =3D FALSE - DEFINE PPM_ENABLE =3D FALSE + DEFINE PPM_ENABLE =3D TRUE DEFINE SPI_SERIAL_OUT =3D FALSE # MAX3110 SPI UART for EFI de= bug message out.Verified on pure VP 2.1.2. DEFINE SPI_POST_CODE =3D FALSE # Max6950 SPI UART for POST c= ode.Verified on pure VP 2.1.2. DEFINE CHARGING_ENABLE =3D TRUE --=20 2.11.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel