From nobody Sat Nov 2 14:28:34 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1489545937946464.0402267265656; Tue, 14 Mar 2017 19:45:37 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id A9736803F2; Tue, 14 Mar 2017 19:45:36 -0700 (PDT) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E3A7F803EF for ; Tue, 14 Mar 2017 19:45:35 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Mar 2017 19:45:35 -0700 Received: from jfan12-desk.ccr.corp.intel.com ([10.239.158.57]) by orsmga002.jf.intel.com with ESMTP; 14 Mar 2017 19:45:33 -0700 X-Original-To: edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1489545935; x=1521081935; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=9hNCaBn0JE3tGL9Ncq0tWW3tdV8tMw5OdQMTw3+b9Ls=; b=KFIomitzgfqvQs6wJq+tz8AItcGwd3pY403yPU9HJRjXO5dd7b3peOLS MbqDtS6PoIX4ZMtM5t4lV9q3ewTpBA==; X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,167,1486454400"; d="scan'208";a="60473995" From: Jeff Fan To: edk2-devel@lists.01.org Date: Wed, 15 Mar 2017 10:45:17 +0800 Message-Id: <20170315024517.9776-3-jeff.fan@intel.com> X-Mailer: git-send-email 2.9.3.windows.2 In-Reply-To: <20170315024517.9776-1-jeff.fan@intel.com> References: <20170315024517.9776-1-jeff.fan@intel.com> Subject: [edk2] [PATCH v2 10/11] UefiCpuPkg: Add NULL CPU Common Features Library instance X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Kinney , Feng Tian MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" This NULL CPU common Features Library instance will register some CPU featu= res defined in Intel(R) 64 and IA-32 Architectures Software Developer's Manual, Volume 3, September 2016, Chapter 35 Model-Specific-Registers (MSR). Add PCD PcdCpuClockModulationDutyCycle and PcdIsPowerOnReset consumed by NU= LL CPU Common Features Library instance. v2: 1. Using MSR_IA32_EFER to enable/disable NX feature instead of using MSR_IA32_MISC_ENABLE. 2. Fix bug that SMX and VMX feature is swapped. Cc: Feng Tian Cc: Michael Kinney Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan --- UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c | 94 +++ UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c | 79 ++ .../Library/CpuCommonFeaturesLib/ClockModulation.c | 106 +++ .../CpuCommonFeaturesLib/CpuCommonFeatures.h | 852 +++++++++++++++++= ++++ .../CpuCommonFeaturesLib/CpuCommonFeaturesLib.c | 227 ++++++ .../CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 68 ++ .../CpuCommonFeaturesLib/CpuCommonFeaturesLib.uni | 25 + UefiCpuPkg/Library/CpuCommonFeaturesLib/Eist.c | 81 ++ .../Library/CpuCommonFeaturesLib/ExecuteDisable.c | 91 +++ .../Library/CpuCommonFeaturesLib/FastStrings.c | 52 ++ .../Library/CpuCommonFeaturesLib/FeatureControl.c | 314 ++++++++ .../CpuCommonFeaturesLib/LimitCpuIdMaxval.c | 82 ++ .../Library/CpuCommonFeaturesLib/MachineCheck.c | 231 ++++++ .../Library/CpuCommonFeaturesLib/MonitorMwait.c | 79 ++ .../Library/CpuCommonFeaturesLib/PendingBreak.c | 90 +++ UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c | 81 ++ UefiCpuPkg/UefiCpuPkg.dec | 11 + 17 files changed, 2563 insertions(+) create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/ClockModulation= .c create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatur= es.h create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatur= esLib.c create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatur= esLib.inf create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatur= esLib.uni create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/Eist.c create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/FastStrings.c create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxva= l.c create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/PendingBreak.c create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c b/UefiCpuPkg/L= ibrary/CpuCommonFeaturesLib/Aesni.c new file mode 100644 index 0000000..6aebf0d --- /dev/null +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c @@ -0,0 +1,94 @@ +/** @file + AESNI feature. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include "CpuCommonFeatures.h" + +/** + Detects if AESNI feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE AESNI feature is supported. + @retval FALSE AESNI feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +AesniSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ) +{ + if (IS_SANDY_BRIDGE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayM= odel) || + IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayMod= el) || + IS_XEON_5600_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayMode= l) || + IS_XEON_PHI_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel= )) { + return (CpuInfo->CpuIdVersionInfoEcx.Bits.AESNI =3D=3D 1); + } + return FALSE; +} + +/** + Initializes AESNI feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the AESNI feature must be ena= bled. + If FALSE, then the AESNI feature must be di= sabled. + + @retval RETURN_SUCCESS AESNI feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +AesniInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + // + // SANDY_BRIDGE, SILVERMONT, XEON_5600 and XEON_PHI have the same MSR in= dex, + // Simply use MSR_SANDY_BRIDGE_FEATURE_CONFIG here + // + // + // SANDY_BRIDGE, SILVERMONT, XEON_5600 and XEON_PHI have the same MSR in= dex, + // Simply use MSR_SANDY_BRIDGE_FEATURE_CONFIG here + // + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_SANDY_BRIDGE_FEATURE_CONFIG, + MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER, + Bits.AESConfiguration, + BIT1 | ((State) ? 0 : BIT0) + ); + + return RETURN_SUCCESS; +} diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c b/UefiCpuPkg/Lib= rary/CpuCommonFeaturesLib/C1e.c new file mode 100644 index 0000000..116590f --- /dev/null +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c @@ -0,0 +1,79 @@ +/** @file + C1E feature. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include "CpuCommonFeatures.h" + +/** + Detects if C1E feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE C1E feature is supported. + @retval FALSE C1E feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +C1eSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ) +{ + return IS_NEHALEM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayMod= el); +} + +/** + Initializes C1E feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the C1E feature must be enabl= ed. + If FALSE, then the C1E feature must be disa= bled. + + @retval RETURN_SUCCESS C1E feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +C1eInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_NEHALEM_POWER_CTL, + MSR_NEHALEM_POWER_CTL_REGISTER, + Bits.C1EEnable, + (State) ? 1 : 0 + ); + return RETURN_SUCCESS; +} diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ClockModulation.c b/Ue= fiCpuPkg/Library/CpuCommonFeaturesLib/ClockModulation.c new file mode 100644 index 0000000..adbe075 --- /dev/null +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ClockModulation.c @@ -0,0 +1,106 @@ +/** @file + Clock Modulation feature. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include "CpuCommonFeatures.h" + +/** + Detects if Clock Modulation feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE Clock Modulation feature is supported. + @retval FALSE Clock Modulation feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +ClockModulationSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ) +{ + return (CpuInfo->CpuIdVersionInfoEdx.Bits.ACPI =3D=3D 1); +} + +/** + Initializes Clock Modulation feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Clock Modulation feature = must be enabled. + If FALSE, then the Clock Modulation feature= must be disabled. + + @retval RETURN_SUCCESS Clock Modulation feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +ClockModulationInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + if (IS_SANDY_BRIDGE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayM= odel)) { + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION, + MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION_REGISTER, + Bits.OnDemandClockModulationDutyCycle, + PcdGet8 (PcdCpuClockModulationDutyCycle) + ); + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION, + MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION_REGISTER, + Bits.OnDemandClockModulationEnable, + (State) ? 1 : 0 + ); + } else { + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_IA32_CLOCK_MODULATION, + MSR_IA32_CLOCK_MODULATION_REGISTER, + Bits.OnDemandClockModulationDutyCycle, + PcdGet8 (PcdCpuClockModulationDutyCycle) + ); + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_IA32_CLOCK_MODULATION, + MSR_IA32_CLOCK_MODULATION_REGISTER, + Bits.OnDemandClockModulationEnable, + (State) ? 1 : 0 + ); + } + return RETURN_SUCCESS; +} diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h b/= UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h new file mode 100644 index 0000000..51c9d5b --- /dev/null +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h @@ -0,0 +1,852 @@ +/** @file + CPU Common features library header file. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#ifndef _CPU_COMMON_FEATURES_H_ +#define _CPU_COMMON_FEATURES_H_ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +/** + Detects if AESNI feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE AESNI feature is supported. + @retval FALSE AESNI feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +AesniSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ); + +/** + Initializes AESNI feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the AESNI feature must be ena= bled. + If FALSE, then the AESNI feature must be di= sabled. + + @retval RETURN_SUCCESS AESNI feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +AesniInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + +/** + Detects if Clock Modulation feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE Clock Modulation feature is supported. + @retval FALSE Clock Modulation feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +ClockModulationSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ); + +/** + Initializes Clock Modulation feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Clock Modulation feature = must be enabled. + If FALSE, then the Clock Modulation feature= must be disabled. + + @retval RETURN_SUCCESS Clock Modulation feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +ClockModulationInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + +/** + Detects if Enhanced Intel SpeedStep feature supported on current process= or. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE Enhanced Intel SpeedStep feature is supported. + @retval FALSE Enhanced Intel SpeedStep feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +EistSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ); + +/** + Initializes Enhanced Intel SpeedStep feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Enhanced Intel SpeedStep = feature + must be enabled. + If FALSE, then the Enhanced Intel SpeedStep= feature + must be disabled. + + @retval RETURN_SUCCESS Enhanced Intel SpeedStep feature is initial= ized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +EistInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + +/** + Detects if Execute Disable feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE Execute Disable feature is supported. + @retval FALSE Execute Disable feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +ExecuteDisableSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ); + +/** + Initializes Execute Disable feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Execute Disable feature m= ust be enabled. + If FALSE, then the Execute Disable feature = must be disabled. + + @retval RETURN_SUCCESS Execute Disable feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +ExecuteDisableInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + +/** + Initializes Fast-Strings feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Fast-Strings feature must= be enabled. + If FALSE, then the Fast-Strings feature mus= t be disabled. + + @retval RETURN_SUCCESS Fast-Strings feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +FastStringsInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + +/** + Detects if MONITOR/MWAIT feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE MONITOR/MWAIT feature is supported. + @retval FALSE MONITOR/MWAIT feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +MonitorMwaitSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ); + +/** + Initializes MONITOR/MWAIT feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the MONITOR/MWAIT feature mus= t be enabled. + If FALSE, then the MONITOR/MWAIT feature mu= st be disabled. + + @retval RETURN_SUCCESS MONITOR/MWAIT feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +MonitorMwaitInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + +/** + Detects if VMX feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE VMX feature is supported. + @retval FALSE VMX feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +VmxSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ); + +/** + Initializes VMX inside SMX feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the VMX inside SMX feature mu= st be enabled. + If FALSE, then the VMX inside SMX feature m= ust be disabled. + + @retval RETURN_SUCCESS VMX inside SMX feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +VmxInsideSmxInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + +/** + Initializes SENTER feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the SENTER feature must be en= abled. + If FALSE, then the SENTER feature must be d= isabled. + + @retval RETURN_SUCCESS SENTER feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +SenterInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + +/** + Detects if Lock Feature Control Register feature supported on current pr= ocessor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE Lock Feature Control Register feature is supported. + @retval FALSE Lock Feature Control Register feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +LockFeatureControlRegisterSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ); + +/** + Initializes Lock Feature Control Register feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Lock Feature Control Regi= ster feature must be enabled. + If FALSE, then the Lock Feature Control Reg= ister feature must be disabled. + + @retval RETURN_SUCCESS Lock Feature Control Register feature is in= itialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +LockFeatureControlRegisterInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + +/** + Detects if SMX feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE SMX feature is supported. + @retval FALSE SMX feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +SmxSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ); + +/** + Initializes VMX outside SMX feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the VMX outside SMX feature m= ust be enabled. + If FALSE, then the VMX outside SMX feature = must be disabled. + + @retval RETURN_SUCCESS VMX outside SMX feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +VmxOutsideSmxInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + +/** + Detects if LimitCpuidMaxval feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE LimitCpuidMaxval feature is supported. + @retval FALSE LimitCpuidMaxval feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +LimitCpuidMaxvalSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ); + +/** + Initializes LimitCpuidMaxval feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the LimitCpuidMaxval feature = must be enabled. + If FALSE, then the LimitCpuidMaxval feature= must be disabled. + + @retval RETURN_SUCCESS LimitCpuidMaxval feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +LimitCpuidMaxvalInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + +/** + Detects if Machine Check Exception feature supported on current processo= r. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE Machine Check Exception feature is supported. + @retval FALSE Machine Check Exception feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +MceSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ); + +/** + Initializes Machine Check Exception feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Machine Check Exception f= eature must be enabled. + If FALSE, then the Machine Check Exception = feature must be disabled. + + @retval RETURN_SUCCESS Machine Check Exception feature is initiali= zed. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +MceInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + +/** + Detects if Machine Check Architecture feature supported on current proce= ssor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE Machine Check Architecture feature is supported. + @retval FALSE Machine Check Architecture feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +McaSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ); + +/** + Initializes Machine Check Architecture feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Machine Check Architectur= e feature must be enabled. + If FALSE, then the Machine Check Architectu= re feature must be disabled. + + @retval RETURN_SUCCESS Machine Check Architecture feature is initi= alized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +McaInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + +/** + Detects if IA32_MCG_CTL feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE IA32_MCG_CTL feature is supported. + @retval FALSE IA32_MCG_CTL feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +McgCtlSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ); + +/** + Initializes IA32_MCG_CTL feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the IA32_MCG_CTL feature must= be enabled. + If FALSE, then the IA32_MCG_CTL feature mus= t be disabled. + + @retval RETURN_SUCCESS IA32_MCG_CTL feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +McgCtlInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + +/** + Detects if Pending Break feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE Pending Break feature is supported. + @retval FALSE Pending Break feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +PendingBreakSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ); + +/** + Initializes Pending Break feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Pending Break feature mus= t be enabled. + If FALSE, then the Pending Break feature mu= st be disabled. + + @retval RETURN_SUCCESS Pending Break feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +PendingBreakInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + +/** + Detects if C1E feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE C1E feature is supported. + @retval FALSE C1E feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +C1eSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ); + +/** + Initializes C1E feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the C1E feature must be enabl= ed. + If FALSE, then the C1E feature must be disa= bled. + + @retval RETURN_SUCCESS C1E feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +C1eInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + +/** + Detects if X2Apci feature supported on current processor. + + Detect if X2Apci has been already enabled. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE X2Apci feature is supported. + @retval FALSE X2Apci feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +X2ApicSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ); + +/** + Initializes X2Apci feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the X2Apci feature must be en= abled. + If FALSE, then the X2Apci feature must be d= isabled. + + @retval RETURN_SUCCESS X2Apci feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +X2ApicInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + +/** + Prepares for the data used by CPU feature detection and initialization. + + @param[in] NumberOfProcessors The number of CPUs in the platform. + + @return Pointer to a buffer of CPU related configuration data. + + @note This service could be called by BSP only. +**/ +VOID * +EFIAPI +FeatureControlGetConfigData ( + IN UINTN NumberOfProcessors + ); + +#endif diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c= b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c new file mode 100644 index 0000000..0d22ec7 --- /dev/null +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c @@ -0,0 +1,227 @@ +/** @file + This library registers CPU features defined in Intel(R) 64 and IA-32 + Architectures Software Developer's Manual. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include "CpuCommonFeatures.h" + +/** + Register CPU features. + + @retval RETURN_SUCCESS Register successfully +**/ +RETURN_STATUS +EFIAPI +CpuCommonFeaturesLibConstructor ( + VOID + ) +{ + RETURN_STATUS Status; + + if (IsCpuFeatureSupported (CPU_FEATURE_AESNI)) { + Status =3D RegisterCpuFeature ( + "AESNI", + NULL, + AesniSupport, + AesniInitialize, + CPU_FEATURE_AESNI, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } + if (IsCpuFeatureSupported (CPU_FEATURE_MWAIT)) { + Status =3D RegisterCpuFeature ( + "MWAIT", + NULL, + MonitorMwaitSupport, + MonitorMwaitInitialize, + CPU_FEATURE_MWAIT, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } + if (IsCpuFeatureSupported (CPU_FEATURE_ACPI)) { + Status =3D RegisterCpuFeature ( + "ACPI", + NULL, + ClockModulationSupport, + ClockModulationInitialize, + CPU_FEATURE_ACPI, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } + if (IsCpuFeatureSupported (CPU_FEATURE_EIST)) { + Status =3D RegisterCpuFeature ( + "EIST", + NULL, + EistSupport, + EistInitialize, + CPU_FEATURE_EIST, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } + if (IsCpuFeatureSupported (CPU_FEATURE_XD)) { + Status =3D RegisterCpuFeature ( + "Execute Disable", + NULL, + ExecuteDisableSupport, + ExecuteDisableInitialize, + CPU_FEATURE_XD, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } + if (IsCpuFeatureSupported (CPU_FEATURE_FASTSTRINGS)) { + Status =3D RegisterCpuFeature ( + "FastStrings", + NULL, + NULL, + FastStringsInitialize, + CPU_FEATURE_FASTSTRINGS, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } + if (IsCpuFeatureSupported (CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER)) { + Status =3D RegisterCpuFeature ( + "Lock Feature Control Register", + FeatureControlGetConfigData, + LockFeatureControlRegisterSupport, + LockFeatureControlRegisterInitialize, + CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } + if (IsCpuFeatureSupported (CPU_FEATURE_SENTER)) { + Status =3D RegisterCpuFeature ( + "SENTER", + FeatureControlGetConfigData, + VmxSupport, + SenterInitialize, + CPU_FEATURE_SENTER, + CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEF= ORE, + CPU_FEATURE_SMX | CPU_FEATURE_AFTER, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } + if (IsCpuFeatureSupported (CPU_FEATURE_SMX)) { + Status =3D RegisterCpuFeature ( + "SMX", + FeatureControlGetConfigData, + SmxSupport, + VmxInsideSmxInitialize, + CPU_FEATURE_SMX, + CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEF= ORE, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } + if (IsCpuFeatureSupported (CPU_FEATURE_VMX)) { + Status =3D RegisterCpuFeature ( + "VMX", + FeatureControlGetConfigData, + SmxSupport, + VmxOutsideSmxInitialize, + CPU_FEATURE_VMX, + CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEF= ORE, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } + if (IsCpuFeatureSupported (CPU_FEATURE_LIMIT_CPUID_MAX_VAL)) { + Status =3D RegisterCpuFeature ( + "Limit CpuId Maximum Value", + NULL, + LimitCpuidMaxvalSupport, + LimitCpuidMaxvalInitialize, + CPU_FEATURE_LIMIT_CPUID_MAX_VAL, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } + if (IsCpuFeatureSupported (CPU_FEATURE_MCE)) { + Status =3D RegisterCpuFeature ( + "Machine Check Enable", + NULL, + MceSupport, + MceInitialize, + CPU_FEATURE_MCE, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } + if (IsCpuFeatureSupported (CPU_FEATURE_MCA)) { + Status =3D RegisterCpuFeature ( + "Machine Check Architect", + NULL, + McaSupport, + McaInitialize, + CPU_FEATURE_MCA, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } + if (IsCpuFeatureSupported (CPU_FEATURE_MCG_CTL)) { + Status =3D RegisterCpuFeature ( + "MCG_CTL", + NULL, + McgCtlSupport, + McgCtlInitialize, + CPU_FEATURE_MCG_CTL, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } + if (IsCpuFeatureSupported (CPU_FEATURE_PENDING_BREAK)) { + Status =3D RegisterCpuFeature ( + "Pending Break", + NULL, + PendingBreakSupport, + PendingBreakInitialize, + CPU_FEATURE_PENDING_BREAK, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } + if (IsCpuFeatureSupported (CPU_FEATURE_C1E)) { + Status =3D RegisterCpuFeature ( + "C1E", + NULL, + C1eSupport, + C1eInitialize, + CPU_FEATURE_C1E, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } + if (IsCpuFeatureSupported (CPU_FEATURE_X2APIC)) { + Status =3D RegisterCpuFeature ( + "X2Apic", + NULL, + X2ApicSupport, + X2ApicInitialize, + CPU_FEATURE_X2APIC, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } + + return RETURN_SUCCESS; +} + + + diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.i= nf b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf new file mode 100644 index 0000000..7287d4e --- /dev/null +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf @@ -0,0 +1,68 @@ +## @file +# NULL instance to register CPU features. +# +# This library registers CPU features defined in Intel(R) 64 and IA-32 +# Architectures Software Developer's Manual. +# +# Copyright (c) 2017, Intel Corporation. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may b= e found at +# http://opensource.org/licenses/bsd-license.php +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D CpuCommonFeaturesLib + MODULE_UNI_FILE =3D CpuCommonFeaturesLib.uni + FILE_GUID =3D 387A2490-81FC-4E7C-8E0A-3E58C30FCD0B + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D NULL + + CONSTRUCTOR =3D CpuCommonFeaturesLibConstructor + +# +# The following information is for reference only and not required by the = build tools. +# +# VALID_ARCHITECTURES =3D IA32 X64 +# + +[Sources] + CpuCommonFeaturesLib.c + CpuCommonFeatures.h + Aesni.c + C1e.c + ClockModulation.c + Eist.c + ExecuteDisable.c + FastStrings.c + FeatureControl.c + LimitCpuIdMaxval.c + MachineCheck.c + MonitorMwait.c + PendingBreak.c + X2Apic.c + +[Packages] + MdePkg/MdePkg.dec + UefiCpuPkg/UefiCpuPkg.dec + +[LibraryClasses] + BaseLib + PcdLib + DebugLib + RegisterCpuFeaturesLib + BaseMemoryLib + MemoryAllocationLib + LocalApicLib + +[Pcd] + gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSupport # CONSUMES + gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle # SOMETIME_CO= NSUMES + gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset # SOMETIME_CO= NSUMES + diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.u= ni b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.uni new file mode 100644 index 0000000..992df9e --- /dev/null +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.uni @@ -0,0 +1,25 @@ +// /** @file +// Dxe Crc32 Guided Section Extract library. +// +// This library doesn't produce any library class. The constructor functio= n uses +// ExtractGuidedSectionLib service to register CRC32 guided section handler +// that parses CRC32 encapsulation section and extracts raw data. +//=20 +// It uses UEFI boot service CalculateCrc32 to authenticate 32 bit CRC val= ue. +// +// Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.
+// +// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the B= SD License +// which accompanies this distribution. The full text of the license may b= e found at +// http://opensource.org/licenses/bsd-license.php +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +// +// **/ + + +#string STR_MODULE_ABSTRACT #language en-US "Dxe Crc32 Guided = Section Extract library." + +#string STR_MODULE_DESCRIPTION #language en-US "This library does= n't produce any library class. The constructor function uses ExtractGuidedS= ectionLib service to register CRC32 guided section handler that parses CRC3= 2 encapsulation section and extracts raw data. It uses UEFI boot service Ca= lculateCrc32 to authenticate 32 bit CRC value." + diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Eist.c b/UefiCpuPkg/Li= brary/CpuCommonFeaturesLib/Eist.c new file mode 100644 index 0000000..e1d3d42 --- /dev/null +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Eist.c @@ -0,0 +1,81 @@ +/** @file + Enhanced Intel SpeedStep feature. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include "CpuCommonFeatures.h" + +/** + Detects if Enhanced Intel SpeedStep feature supported on current process= or. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE Enhanced Intel SpeedStep feature is supported. + @retval FALSE Enhanced Intel SpeedStep feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +EistSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ) +{ + return (CpuInfo->CpuIdVersionInfoEcx.Bits.EIST =3D=3D 1); +} + +/** + Initializes Enhanced Intel SpeedStep feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Enhanced Intel SpeedStep = feature + must be enabled. + If FALSE, then the Enhanced Intel SpeedStep= feature + must be disabled. + + @retval RETURN_SUCCESS Enhanced Intel SpeedStep feature is initial= ized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +EistInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_IA32_MISC_ENABLE, + MSR_IA32_MISC_ENABLE_REGISTER, + Bits.EIST, + (State) ? 1 : 0 + ); + return RETURN_SUCCESS; +} diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c b/Uef= iCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c new file mode 100644 index 0000000..dd4293e --- /dev/null +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c @@ -0,0 +1,91 @@ +/** @file + Execute Disable feature. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include "CpuCommonFeatures.h" + +/** + Detects if Execute Disable feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE Execute Disable feature is supported. + @retval FALSE Execute Disable feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +ExecuteDisableSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ) +{ + UINT32 Eax; + CPUID_EXTENDED_CPU_SIG_EDX Edx; + + AsmCpuid (CPUID_EXTENDED_FUNCTION, &Eax, NULL, NULL, NULL); + if (Eax <=3D CPUID_EXTENDED_FUNCTION) { + // + // Extended CPUID functions are not supported on this processor. + // + return FALSE; + } + + AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &Edx.Uint32); + return (Edx.Bits.NX !=3D 0); +} + +/** + Initializes Execute Disable feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Execute Disable feature m= ust be enabled. + If FALSE, then the Execute Disable feature = must be disabled. + + @retval RETURN_SUCCESS Execute Disable feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +ExecuteDisableInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_IA32_EFER, + MSR_IA32_EFER_REGISTER, + Bits.NXE, + (State) ? 1 : 0 + ); + return RETURN_SUCCESS; +} diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FastStrings.c b/UefiCp= uPkg/Library/CpuCommonFeaturesLib/FastStrings.c new file mode 100644 index 0000000..4c3000d --- /dev/null +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/FastStrings.c @@ -0,0 +1,52 @@ +/** @file + Fast-Strings feature. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include "CpuCommonFeatures.h" + +/** + Initializes Fast-Strings feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Fast-Strings feature must= be enabled. + If FALSE, then the Fast-Strings feature mus= t be disabled. + + @retval RETURN_SUCCESS Fast-Strings feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +FastStringsInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_IA32_MISC_ENABLE, + MSR_IA32_MISC_ENABLE_REGISTER, + Bits.FastStrings, + (State) ? 1 : 0 + ); + return RETURN_SUCCESS; +} diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c b/Uef= iCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c new file mode 100644 index 0000000..e627a65 --- /dev/null +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c @@ -0,0 +1,314 @@ +/** @file + Features in MSR_IA32_FEATURE_CONTROL register. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include "CpuCommonFeatures.h" + +/** + Prepares for the data used by CPU feature detection and initialization. + + @param[in] NumberOfProcessors The number of CPUs in the platform. + + @return Pointer to a buffer of CPU related configuration data. + + @note This service could be called by BSP only. +**/ +VOID * +EFIAPI +FeatureControlGetConfigData ( + IN UINTN NumberOfProcessors + ) +{ + VOID *ConfigData; + + ConfigData =3D AllocateZeroPool (sizeof (MSR_IA32_FEATURE_CONTROL_REGIST= ER) * NumberOfProcessors); + ASSERT (ConfigData !=3D NULL); + return ConfigData; +} + +/** + Detects if VMX feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE VMX feature is supported. + @retval FALSE VMX feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +VmxSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ) +{ + MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister; + + ASSERT (ConfigData !=3D NULL); + MsrRegister =3D (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData; + MsrRegister[ProcessorNumber].Uint64 =3D AsmReadMsr64 (MSR_IA32_FEATURE_C= ONTROL); + return (CpuInfo->CpuIdVersionInfoEcx.Bits.VMX =3D=3D 1); +} + +/** + Initializes VMX inside SMX feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the VMX inside SMX feature mu= st be enabled. + If FALSE, then the VMX inside SMX feature m= ust be disabled. + + @retval RETURN_SUCCESS VMX inside SMX feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +VmxInsideSmxInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister; + + ASSERT (ConfigData !=3D NULL); + MsrRegister =3D (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData; + if (MsrRegister[ProcessorNumber].Bits.Lock =3D=3D 0) { + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_IA32_FEATURE_CONTROL, + MSR_IA32_FEATURE_CONTROL_REGISTER, + Bits.EnableVmxInsideSmx, + (State) ? 1 : 0 + ); + } + return RETURN_SUCCESS; +} + +/** + Initializes SENTER feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the SENTER feature must be en= abled. + If FALSE, then the SENTER feature must be d= isabled. + + @retval RETURN_SUCCESS SENTER feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +SenterInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister; + + ASSERT (ConfigData !=3D NULL); + MsrRegister =3D (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData; + if (MsrRegister[ProcessorNumber].Bits.Lock =3D=3D 0) { + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_IA32_FEATURE_CONTROL, + MSR_IA32_FEATURE_CONTROL_REGISTER, + Bits.SenterLocalFunctionEnables, + (State) ? 0x7F : 0 + ); + + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_IA32_FEATURE_CONTROL, + MSR_IA32_FEATURE_CONTROL_REGISTER, + Bits.SenterGlobalEnable, + (State) ? 1 : 0 + ); + } + return RETURN_SUCCESS; +} + +/** + Detects if Lock Feature Control Register feature supported on current pr= ocessor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE Lock Feature Control Register feature is supported. + @retval FALSE Lock Feature Control Register feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +LockFeatureControlRegisterSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ) +{ + MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister; + + ASSERT (ConfigData !=3D NULL); + MsrRegister =3D (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData; + MsrRegister[ProcessorNumber].Uint64 =3D AsmReadMsr64 (MSR_IA32_FEATURE_C= ONTROL); + return TRUE; +} + +/** + Initializes Lock Feature Control Register feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Lock Feature Control Regi= ster feature must be enabled. + If FALSE, then the Lock Feature Control Reg= ister feature must be disabled. + + @retval RETURN_SUCCESS Lock Feature Control Register feature is in= itialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +LockFeatureControlRegisterInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister; + + ASSERT (ConfigData !=3D NULL); + MsrRegister =3D (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData; + if (MsrRegister[ProcessorNumber].Bits.Lock =3D=3D 0) { + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_IA32_FEATURE_CONTROL, + MSR_IA32_FEATURE_CONTROL_REGISTER, + Bits.Lock, + 1 + ); + } + return RETURN_SUCCESS; +} + +/** + Detects if SMX feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE SMX feature is supported. + @retval FALSE SMX feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +SmxSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ) +{ + MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister; + + ASSERT (ConfigData !=3D NULL); + MsrRegister =3D (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData; + MsrRegister[ProcessorNumber].Uint64 =3D AsmReadMsr64 (MSR_IA32_FEATURE_C= ONTROL); + return (CpuInfo->CpuIdVersionInfoEcx.Bits.SMX =3D=3D 1); +} + +/** + Initializes VMX outside SMX feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the VMX outside SMX feature m= ust be enabled. + If FALSE, then the VMX outside SMX feature = must be disabled. + + @retval RETURN_SUCCESS VMX outside SMX feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +VmxOutsideSmxInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister; + + ASSERT (ConfigData !=3D NULL); + MsrRegister =3D (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData; + if (MsrRegister[ProcessorNumber].Bits.Lock =3D=3D 0) { + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_IA32_FEATURE_CONTROL, + MSR_IA32_FEATURE_CONTROL_REGISTER, + Bits.EnableVmxOutsideSmx, + (State) ? 1 : 0 + ); + } + return RETURN_SUCCESS; +} diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c b/U= efiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c new file mode 100644 index 0000000..0f51fb3 --- /dev/null +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c @@ -0,0 +1,82 @@ +/** @file + LimitCpuidMaxval Feature. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include "CpuCommonFeatures.h" + +/** + Detects if LimitCpuidMaxval feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE LimitCpuidMaxval feature is supported. + @retval FALSE LimitCpuidMaxval feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +LimitCpuidMaxvalSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ) +{ + UINT32 Eax; + + AsmCpuid (CPUID_SIGNATURE, &Eax, NULL, NULL, NULL); + return (Eax > 3); +} + +/** + Initializes LimitCpuidMaxval feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the LimitCpuidMaxval feature = must be enabled. + If FALSE, then the LimitCpuidMaxval feature= must be disabled. + + @retval RETURN_SUCCESS LimitCpuidMaxval feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +LimitCpuidMaxvalInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_IA32_MISC_ENABLE, + MSR_IA32_MISC_ENABLE_REGISTER, + Bits.LimitCpuidMaxval, + (State) ? 1 : 0 + ); + return RETURN_SUCCESS; +} diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c b/UefiC= puPkg/Library/CpuCommonFeaturesLib/MachineCheck.c new file mode 100644 index 0000000..2d9501b --- /dev/null +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c @@ -0,0 +1,231 @@ +/** @file + Machine Check features. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include "CpuCommonFeatures.h" + +/** + Detects if Machine Check Exception feature supported on current processo= r. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE Machine Check Exception feature is supported. + @retval FALSE Machine Check Exception feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +MceSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ) +{ + return (CpuInfo->CpuIdVersionInfoEdx.Bits.MCE =3D=3D 1); +} + +/** + Initializes Machine Check Exception feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Machine Check Exception f= eature must be enabled. + If FALSE, then the Machine Check Exception = feature must be disabled. + + @retval RETURN_SUCCESS Machine Check Exception feature is initiali= zed. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +MceInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + // + // Set MCE bit in CR4 + // + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + ControlRegister, + 4, + IA32_CR4, + Bits.MCE, + (State) ? 1 : 0 + ); + return RETURN_SUCCESS; +} + +/** + Detects if Machine Check Architecture feature supported on current proce= ssor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE Machine Check Architecture feature is supported. + @retval FALSE Machine Check Architecture feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +McaSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ) +{ + return (CpuInfo->CpuIdVersionInfoEdx.Bits.MCA =3D=3D 1); +} + +/** + Initializes Machine Check Architecture feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Machine Check Architectur= e feature must be enabled. + If FALSE, then the Machine Check Architectu= re feature must be disabled. + + @retval RETURN_SUCCESS Machine Check Architecture feature is initi= alized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +McaInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + MSR_IA32_MCG_CAP_REGISTER McgCap; + UINT32 BankIndex; + + McgCap.Uint64 =3D AsmReadMsr64 (MSR_IA32_MCG_CAP); + for (BankIndex =3D 0; BankIndex < (UINT32) McgCap.Bits.Count; BankIndex+= +) { + CPU_REGISTER_TABLE_WRITE64 ( + ProcessorNumber, + Msr, + MSR_IA32_MC0_CTL + BankIndex * 4, + MAX_UINT64 + ); + } + + if (PcdGetBool (PcdIsPowerOnReset)) { + for (BankIndex =3D 0; BankIndex < (UINTN) McgCap.Bits.Count; BankIndex= ++) { + CPU_REGISTER_TABLE_WRITE64 ( + ProcessorNumber, + Msr, + MSR_IA32_MC0_STATUS + BankIndex * 4, + 0 + ); + } + } + + return RETURN_SUCCESS; +} + +/** + Detects if IA32_MCG_CTL feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE IA32_MCG_CTL feature is supported. + @retval FALSE IA32_MCG_CTL feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +McgCtlSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ) +{ + MSR_IA32_MCG_CAP_REGISTER McgCap; + + if (!McaSupport (ProcessorNumber, CpuInfo, ConfigData)) { + return FALSE; + } + McgCap.Uint64 =3D AsmReadMsr64 (MSR_IA32_MCG_CAP); + return (McgCap.Bits.MCG_CTL_P =3D=3D 1); +} + +/** + Initializes IA32_MCG_CTL feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the IA32_MCG_CTL feature must= be enabled. + If FALSE, then the IA32_MCG_CTL feature mus= t be disabled. + + @retval RETURN_SUCCESS IA32_MCG_CTL feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +McgCtlInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + CPU_REGISTER_TABLE_WRITE64 ( + ProcessorNumber, + Msr, + MSR_IA32_MCG_CTL, + (State)? MAX_UINT64 : 0 + ); + return RETURN_SUCCESS; +} + diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c b/UefiC= puPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c new file mode 100644 index 0000000..b1c18bc --- /dev/null +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c @@ -0,0 +1,79 @@ +/** @file + MonitorMwait feature. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include "CpuCommonFeatures.h" + +/** + Detects if MONITOR/MWAIT feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE MONITOR/MWAIT feature is supported. + @retval FALSE MONITOR/MWAIT feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +MonitorMwaitSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ) +{ + return (CpuInfo->CpuIdVersionInfoEcx.Bits.MONITOR =3D=3D 1); +} + +/** + Initializes MONITOR/MWAIT feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the MONITOR/MWAIT feature mus= t be enabled. + If FALSE, then the MONITOR/MWAIT feature mu= st be disabled. + + @retval RETURN_SUCCESS MONITOR/MWAIT feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +MonitorMwaitInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_IA32_MISC_ENABLE, + MSR_IA32_MISC_ENABLE_REGISTER, + Bits.MONITOR, + (State) ? 1 : 0 + ); + return RETURN_SUCCESS; +} diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/PendingBreak.c b/UefiC= puPkg/Library/CpuCommonFeaturesLib/PendingBreak.c new file mode 100644 index 0000000..2a1fd95 --- /dev/null +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/PendingBreak.c @@ -0,0 +1,90 @@ +/** @file + Pending Break feature. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include "CpuCommonFeatures.h" + +/** + Detects if Pending Break feature supported on current processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE Pending Break feature is supported. + @retval FALSE Pending Break feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +PendingBreakSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ) +{ + if (IS_ATOM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) || + IS_CORE2_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) || + IS_CORE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) || + IS_PENTIUM_4_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayMode= l) || + IS_PENTIUM_M_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayMode= l)) { + return (CpuInfo->CpuIdVersionInfoEdx.Bits.PBE =3D=3D 1); + } + return FALSE; +} + +/** + Initializes Pending Break feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Pending Break feature mus= t be enabled. + If FALSE, then the Pending Break feature mu= st be disabled. + + @retval RETURN_SUCCESS Pending Break feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +PendingBreakInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + // + // ATOM, CORE2, CORE, PENTIUM_4 and IS_PENTIUM_M_PROCESSOR have the same= MSR index, + // Simply use MSR_ATOM_IA32_MISC_ENABLE here + // + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_ATOM_IA32_MISC_ENABLE, + MSR_ATOM_IA32_MISC_ENABLE_REGISTER, + Bits.FERR, + (State) ? 1 : 0 + ); + return RETURN_SUCCESS; +} diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c b/UefiCpuPkg/= Library/CpuCommonFeaturesLib/X2Apic.c new file mode 100644 index 0000000..7720540 --- /dev/null +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c @@ -0,0 +1,81 @@ +/** @file + X2Apic feature. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include "CpuCommonFeatures.h" + +/** + Detects if X2Apci feature supported on current processor. + + Detect if X2Apci has been already enabled. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE X2Apci feature is supported. + @retval FALSE X2Apci feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +X2ApicSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ) +{ + return (GetApicMode () =3D=3D LOCAL_APIC_MODE_X2APIC); +} + +/** + Initializes X2Apci feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the X2Apci feature must be en= abled. + If FALSE, then the X2Apci feature must be d= isabled. + + @retval RETURN_SUCCESS X2Apci feature is initialized. + + @note This service could be called by BSP only. +**/ +RETURN_STATUS +EFIAPI +X2ApicInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + PRE_SMM_CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_IA32_APIC_BASE, + MSR_IA32_APIC_BASE_REGISTER, + Bits.EXTD, + (State) ? 1 : 0 + ); + return RETURN_SUCCESS; +} diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index 04c7c1e..745f986 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -245,6 +245,17 @@ # @Prompt User settings for enabling/disabling processor features. gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesUserConfiguration|{0x00, 0x00, 0= x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00000017 =20 + ## Specifies the On-demand clock modulation duty cycle when ACPI feature= is enabled. + # @Prompt The encoded values for target duty cycle modulation. + # @ValidRange 0x80000001 | 0 - 15 + gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle|0x0|UINT8|0x000= 0001A + + ## Indicates if the current boot is a power-on reset.

+ # TRUE - Current boot is a power-on reset.
+ # FALSE - Current boot is not a power-on reset.
+ # @Prompt Current boot is a power-on reset. + gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset|FALSE|BOOLEAN|0x0000001B + [PcdsDynamic, PcdsDynamicEx] ## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DA= TA. # @Prompt The pointer to a CPU S3 data buffer. --=20 2.9.3.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel