From nobody Thu May 2 23:28:49 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1489542880045337.14050339345704; Tue, 14 Mar 2017 18:54:40 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id A3386803D5; Tue, 14 Mar 2017 18:54:38 -0700 (PDT) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5C703803D3 for ; Tue, 14 Mar 2017 18:54:37 -0700 (PDT) Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Mar 2017 18:54:37 -0700 Received: from jfan12-desk.ccr.corp.intel.com ([10.239.158.57]) by fmsmga006.fm.intel.com with ESMTP; 14 Mar 2017 18:54:36 -0700 X-Original-To: edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1489542877; x=1521078877; h=from:to:cc:subject:date:message-id; bh=gMw4VRzuYdnRVXxR66YWPfKQtcB10zVv0OnyolpPXEg=; b=wluICYC4ZOLSeZ5BR6WzhGBziMDY5z3F5koPv+mQ8SdHWsp8utTD7gbB qYuOuyEf39qJH7z0Z7dcE0/sPbh2AQ==; X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,166,1486454400"; d="scan'208";a="76905702" From: Jeff Fan To: edk2-devel@lists.01.org Date: Wed, 15 Mar 2017 09:54:30 +0800 Message-Id: <20170315015430.4800-1-jeff.fan@intel.com> X-Mailer: git-send-email 2.9.3.windows.2 Subject: [edk2] [PATCH] UefiCpuPkg/CpuDxe: Remove MSR_IA32_MISC_ENABLE check X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anthony PERARD , Feng Tian , Jiewen Yao MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The architectural MSR MSR_IA32_MISC_ENABLE is not supported by AMD processo= rs. Because reading CPUID.80000001H:EDK[20] is enough to check if XD feature is supported or not, we just remove checking MSR_IA32_MISC_ENABLE(0x1A0). Cc: Anthony PERARD Cc: Jiewen Yao Cc: Feng Tian Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan Reviewed-by: Feng Tian Tested-by: Anthony PERARD --- UefiCpuPkg/CpuDxe/CpuPageTable.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuPkg/CpuDxe/CpuPageTa= ble.c index 65f607a..ab664b4 100644 --- a/UefiCpuPkg/CpuDxe/CpuPageTable.c +++ b/UefiCpuPkg/CpuDxe/CpuPageTable.c @@ -193,12 +193,9 @@ GetCurrentPagingContext ( AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx); if ((RegEdx & BIT20) !=3D 0) { // XD supported - if ((AsmReadMsr64 (0x000001A0) & BIT34) =3D=3D 0) { - // XD enabled - if ((AsmReadMsr64 (0xC0000080) & BIT11) !=3D 0) { - // XD activated - PagingContext->ContextData.Ia32.Attributes |=3D PAGE_TABLE_LIB_P= AGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED; - } + if ((AsmReadMsr64 (0xC0000080) & BIT11) !=3D 0) { + // XD activated + PagingContext->ContextData.Ia32.Attributes |=3D PAGE_TABLE_LIB_PAG= ING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED; } } if ((RegEdx & BIT26) !=3D 0) { --=20 2.9.3.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel