From nobody Fri Apr 19 11:09:55 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 148788924249480.74620850464794; Thu, 23 Feb 2017 14:34:02 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 63DD782177; Thu, 23 Feb 2017 14:34:01 -0800 (PST) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id D29EA82152 for ; Thu, 23 Feb 2017 14:33:59 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BF0DC687; Thu, 23 Feb 2017 14:33:59 -0800 (PST) Received: from u200856.usa.arm.com (u201426.usa.arm.com [10.118.28.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6B6D53F483; Thu, 23 Feb 2017 14:33:59 -0800 (PST) X-Original-To: edk2-devel@lists.01.org From: Jeremy Linton To: edk2-devel@lists.01.org Date: Thu, 23 Feb 2017 16:33:48 -0600 Message-Id: <20170223223355.11383-2-jeremy.linton@arm.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170223223355.11383-1-jeremy.linton@arm.com> References: <20170223223355.11383-1-jeremy.linton@arm.com> Subject: [edk2] [PATCH v3 1/7] EmbeddedPkg: SiI3132: Note that ARM is using this Dxe X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ard.biesheuvel@linaro.org, Steve.Capper@arm.com, ryan.harkin@linaro.org, leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton --- MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf b/MdeModulePkg/Bu= s/Ata/AtaBusDxe/AtaBusDxe.inf index 4aab75b..fcd2044 100644 --- a/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf +++ b/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf @@ -29,7 +29,7 @@ # # The following information is for reference only and not required by the = build tools. # -# VALID_ARCHITECTURES =3D IA32 X64 IPF EBC +# VALID_ARCHITECTURES =3D IA32 X64 IPF EBC ARM AARCH64 # # DRIVER_BINDING =3D gAtaBusDriverBinding # COMPONENT_NAME =3D gAtaBusComponentName --=20 2.9.3 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri Apr 19 11:09:55 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1487889244459273.0688343262108; Thu, 23 Feb 2017 14:34:04 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 9E28082187; Thu, 23 Feb 2017 14:34:01 -0800 (PST) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id BA70482176 for ; Thu, 23 Feb 2017 14:34:00 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A756C28; Thu, 23 Feb 2017 14:34:00 -0800 (PST) Received: from u200856.usa.arm.com (u201426.usa.arm.com [10.118.28.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 528C83F483; Thu, 23 Feb 2017 14:34:00 -0800 (PST) X-Original-To: edk2-devel@lists.01.org From: Jeremy Linton To: edk2-devel@lists.01.org Date: Thu, 23 Feb 2017 16:33:49 -0600 Message-Id: <20170223223355.11383-3-jeremy.linton@arm.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170223223355.11383-1-jeremy.linton@arm.com> References: <20170223223355.11383-1-jeremy.linton@arm.com> Subject: [edk2] [PATCH v3 2/7] MdePkg IndustryStandard/Scsi.h: Add sense code macro X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ard.biesheuvel@linaro.org, Steve.Capper@arm.com, ryan.harkin@linaro.org, leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Add some definitions to mask the sense key from sense data, and check the validity of the returned sense data. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton --- MdePkg/Include/IndustryStandard/Scsi.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MdePkg/Include/IndustryStandard/Scsi.h b/MdePkg/Include/Indust= ryStandard/Scsi.h index 0d81314..802479e 100644 --- a/MdePkg/Include/IndustryStandard/Scsi.h +++ b/MdePkg/Include/IndustryStandard/Scsi.h @@ -369,6 +369,8 @@ typedef struct { // // Sense Key // +#define EFI_SCSI_REQUEST_SENSE_ERROR (0x70) +#define EFI_SCSI_SK_VALUE(byte) (byte&0x0F) #define EFI_SCSI_SK_NO_SENSE (0x0) #define EFI_SCSI_SK_RECOVERY_ERROR (0x1) #define EFI_SCSI_SK_NOT_READY (0x2) --=20 2.9.3 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri Apr 19 11:09:55 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1487889246484120.79355389229386; Thu, 23 Feb 2017 14:34:06 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id D349782184; Thu, 23 Feb 2017 14:34:03 -0800 (PST) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id A26B482188 for ; Thu, 23 Feb 2017 14:34:01 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8DA5B687; Thu, 23 Feb 2017 14:34:01 -0800 (PST) Received: from u200856.usa.arm.com (u201426.usa.arm.com [10.118.28.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2F0B73F483; Thu, 23 Feb 2017 14:34:01 -0800 (PST) X-Original-To: edk2-devel@lists.01.org From: Jeremy Linton To: edk2-devel@lists.01.org Date: Thu, 23 Feb 2017 16:33:50 -0600 Message-Id: <20170223223355.11383-4-jeremy.linton@arm.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170223223355.11383-1-jeremy.linton@arm.com> References: <20170223223355.11383-1-jeremy.linton@arm.com> Subject: [edk2] [PATCH v3 3/7] EmbeddedPkg: SiI3132: Add ScsiProtocol callbacks X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ard.biesheuvel@linaro.org, Steve.Capper@arm.com, ryan.harkin@linaro.org, leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Create a new module that adds the callbacks to support the EFI SCSI pass-through protocol. These callbacks wrap around the existing ATA pass-through callbacks. In particular the SCSI command submission routine takes the SCSI command and wraps it with an SATA FIS and sets the protocol to ATAPI. It then forwards the FIS to a new routine we will break out of the ATA pass-through callback that manages the FIS submission to the adapter. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton --- .../Drivers/SataSiI3132Dxe/SiI3132ScsiPassThru.c | 431 +++++++++++++++++= ++++ 1 file changed, 431 insertions(+) create mode 100644 EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132ScsiPassThru.c diff --git a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132ScsiPassThru.c b/Emb= eddedPkg/Drivers/SataSiI3132Dxe/SiI3132ScsiPassThru.c new file mode 100644 index 0000000..6858426 --- /dev/null +++ b/EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132ScsiPassThru.c @@ -0,0 +1,431 @@ +/** @file +* ATAPI support for the Silicon Image I3132 +* +* Copyright (c) 2016, ARM Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + + +#include "SataSiI3132.h" + +#include +#include +#include + +EFI_STATUS +SiI3132IDiscoverAtapi ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN INT32 Port + ) +{ + SATA_SI3132_INSTANCE *SataInstance; + SATA_SI3132_PORT *SataPort; + EFI_ATA_PASS_THRU_COMMAND_PACKET Packet; + ATA_IDENTIFY_DATA *Data; + EFI_STATUS Status; + EFI_ATA_STATUS_BLOCK *Asb; + EFI_ATA_COMMAND_BLOCK *Acb; + + SataInstance =3D INSTANCE_FROM_SCSIPASSTHRU_THIS (This); + SataPort =3D &SataInstance->Ports[Port]; + + Asb=3DAllocateAlignedPages (EFI_SIZE_TO_PAGES (sizeof (EFI_ATA_STATUS_BL= OCK)), EFI_PAGE_SIZE); + Acb=3DAllocateAlignedPages (EFI_SIZE_TO_PAGES (sizeof (EFI_ATA_COMMAND_B= LOCK)), EFI_PAGE_SIZE); + Data=3DAllocateAlignedPages (EFI_SIZE_TO_PAGES (sizeof (ATA_IDENTIFY_DAT= A)), EFI_PAGE_SIZE); + ZeroMem (Acb, sizeof (EFI_ATA_COMMAND_BLOCK)); + Acb->AtaCommand =3D ATA_CMD_IDENTIFY_DEVICE; + Acb->AtaDeviceHead =3D (UINT8) (BIT7 | BIT6 | BIT5 ); + + ZeroMem (&Packet, sizeof (EFI_ATA_PASS_THRU_COMMAND_PACKET)); + Packet.Acb=3DAcb; + Packet.Asb=3DAsb; + Packet.InDataBuffer =3D Data; + Packet.InTransferLength =3D sizeof (ATA_IDENTIFY_DATA); + Packet.Protocol =3D EFI_ATA_PASS_THRU_PROTOCOL_PIO_DATA_IN; + Packet.Length =3D EFI_ATA_PASS_THRU_LENGTH_BYTES | EFI_ATA_PASS_THRU_L= ENGTH_SECTOR_COUNT; + + Status =3D SiI3132AtaPassThruCommand (SataInstance, SataPort, 0, &Packet= , NULL); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_WARN, "SiI ATAPI IDENTIFY DEVICE FAILURE %d\n", Status)); + } + else + { + Data->ModelName[39]=3D0; + } + + FreeAlignedPages (Data, EFI_SIZE_TO_PAGES (sizeof (ATA_IDENTIFY_DATA))); + FreeAlignedPages (Acb, EFI_SIZE_TO_PAGES (sizeof (EFI_ATA_COMMAND_BLOCK)= )); + FreeAlignedPages (Asb, EFI_SIZE_TO_PAGES (sizeof (EFI_ATA_STATUS_BLOCK))= ); + + return Status; +} + +EFI_STATUS +SiI3132ScsiPassRead ( + IN SATA_SI3132_INSTANCE *SataInstance, + IN SATA_SI3132_PORT *SataPort, + IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet) +{ + EFI_STATUS Status; + EFI_PCI_IO_PROTOCOL *PciIo; + VOID* PciAllocMapping; + EFI_PHYSICAL_ADDRESS PhysBuffer; + UINTN InDataBufferLength; + VOID *AtaSense; + BOOLEAN RequestSense; + + Status =3D EFI_SUCCESS; + PciIo =3D SataInstance->PciIo; + PciAllocMapping =3D NULL; + InDataBufferLength =3D Packet->InTransferLength; + AtaSense =3D AllocateAlignedPages (EFI_SIZE_TO_PAGES (sizeof (EFI_ATA_ST= ATUS_BLOCK)), + EFI_PAGE_SIZE);; + RequestSense =3D FALSE; + + DEBUG ((DEBUG_VERBOSE, "SiI3132ScsiPassRead() CDB[0]:%X len=3D%d\n", + ((UINT8*)Packet->Cdb)[0], Packet->InTransferLength)); + + if (AtaSense) { + if (Packet->InTransferLength) { + Status =3D PciIo->Map (SataInstance->PciIo, EfiPciIoOperationBusMast= erRead, + Packet->InDataBuffer, &InDataBufferLength, + &PhysBuffer, &PciAllocMapping); + + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "SiI map() failure %d\n", Status)); + return Status; + } + } else { + PhysBuffer=3D0; + } + do { + // SI "The host driver must populate the area normaly used for the f= irst SGE + // with the desired ATAPI command". AKA, put the SCSI CDB itself (no= t the address) + // in the 12 bytes comprising the SGE[0]. + ZeroMem (&SataPort->HostPRB->Sge[0], sizeof (SATA_SI3132_SGE)); + CopyMem (&SataPort->HostPRB->Sge[0], (UINT8*)Packet->Cdb, Packet->Cd= bLength); + + // The SGE for the data buffer + SataPort->HostPRB->Sge[1].DataAddressLow =3D (UINT64)PhysBuffer; + SataPort->HostPRB->Sge[1].DataAddressHigh =3D ((UINT64)(PhysBuffer) = >> 32); + SataPort->HostPRB->Sge[1].Attributes =3D SGE_TRM; + SataPort->HostPRB->Sge[1].DataCount =3D Packet->InTransferLength; + + // Create the ATA FIS + SataPort->HostPRB->Control =3D (Packet->InTransferLength ? PRB_CTRL_= PKT_READ:0); + SataPort->HostPRB->ProtocolOverride =3D 0; + + // This is an ATA PACKET command, which encapuslates the ATAPI(sorta= SCSI) command + SataPort->HostPRB->Fis.FisType =3D SII_FIS_REGISTER_H2D; // Registe= r - Host to Device FIS + SataPort->HostPRB->Fis.Control =3D SII_FIS_CONTROL_CMD; // Is a co= mmand + SataPort->HostPRB->Fis.Command =3D ATA_CMD_PACKET; + SataPort->HostPRB->Fis.Features =3D 1; + SataPort->HostPRB->Fis.Fis[0] =3D 0; + SataPort->HostPRB->Fis.Fis[1] =3D (UINT8) (((UINT64)PhysBuffer) & = 0x00ff); + SataPort->HostPRB->Fis.Fis[2] =3D (UINT8) (((UINT64)PhysBuffer) >>= 8); + SataPort->HostPRB->Fis.Fis[3] =3D 0x40; + + // Issue this as an ATA command + Status =3D SiI3132IssueCommand (SataPort, PciIo, Packet->Timeout, At= aSense); + + if (RequestSense) { + // If we were trying to send a request sense in response to a fail= ure + // Check conditions are a normal part of SCSI operation, its expec= ted + // that most devices will do a 6/2900 (reset) and 2/2800 (media ch= ange) + // at startup. + UINT8 *sense; + + sense =3D (UINT8 *)Packet->SenseData; + RequestSense=3DFALSE; + Packet->InTransferLength =3D 0; + Packet->HostAdapterStatus =3D EFI_EXT_SCSI_STATUS_HOST_ADAPTER_OK; + Packet->TargetStatus =3D EFI_EXT_SCSI_STATUS_TARGET_CHECK_CONDITIO= N; + if ((Packet->SenseDataLength > 13) && + (sense[0] & EFI_SCSI_REQUEST_SENSE_ERROR)) { + DEBUG ((DEBUG_INFO, "SiI3132ScsiPassRead() Key %X ASC(Q) %02X%02= X\n", + EFI_SCSI_SK_VALUE (sense[2]), sense[12], sense[13])); + } + Status =3D EFI_SUCCESS; + } else if (!EFI_ERROR (Status)) { + Packet->HostAdapterStatus =3D EFI_EXT_SCSI_STATUS_HOST_ADAPTER_OK; + Packet->TargetStatus =3D EFI_EXT_SCSI_STATUS_TARGET_GOOD; + ZeroMem (Packet->SenseData, Packet->SenseDataLength); + Packet->SenseDataLength =3D 0; + } else if (Status =3D=3D EFI_TIMEOUT) { + SiI3132HwResetPort (SataPort); + Packet->HostAdapterStatus =3D EFI_EXT_SCSI_STATUS_HOST_ADAPTER_OTH= ER; + Packet->SenseDataLength =3D 0; + Packet->InTransferLength =3D 0; + } else { + // Assume for now, that if we didn't succeed that it was a check c= ondition. + // ATAPI can't autosense on SiI, so lets emulate it with an explic= it + // request sense into the sense buffer. + Packet->HostAdapterStatus =3D EFI_EXT_SCSI_STATUS_HOST_ADAPTER_OTH= ER; + if ((RequestSense =3D=3D FALSE) && (Packet->SenseDataLength)) { + if (Packet->SenseDataLength >=3D SI_MAX_SENSE) { + Packet->SenseDataLength =3D SI_MAX_SENSE - 1; + } + Packet->CdbLength =3D 6; //Request Sense is a 6 byte CDB + ZeroMem (Packet->Cdb, SI_MAX_CDB); + ((char*)Packet->Cdb)[0] =3D EFI_SCSI_OP_REQUEST_SENSE; + ((char*)Packet->Cdb)[4] =3D Packet->SenseDataLength; + + ZeroMem (SataPort->HostPRB, sizeof (SATA_SI3132_PRB)); + if (PciAllocMapping) { + PciIo->Unmap (PciIo, PciAllocMapping); + } + + Packet->InTransferLength =3D Packet->SenseDataLength; + InDataBufferLength =3D Packet->SenseDataLength; + Status =3D PciIo->Map (SataInstance->PciIo, EfiPciIoOperationBus= MasterRead, + Packet->SenseData, &InDataBufferLength, &Ph= ysBuffer, &PciAllocMapping); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "SiI map() sense failure %d\n", Status)); + Packet->SenseDataLength =3D 0; + } else { + // Everything seems ok, lets issue a SCSI sense + RequestSense =3D TRUE; + } + } + } + } while (RequestSense); + + if (PciAllocMapping) { + PciIo->Unmap (PciIo, PciAllocMapping); + } + } else { + DEBUG ((DEBUG_ERROR, "SCSI PassThru Unable to allocate sense buffer\n"= )); + Status =3D EFI_OUT_OF_RESOURCES; + } + return Status; +} + +EFI_STATUS +SiI3132ScsiPassThru ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN UINT8 *Target, + IN UINT64 Lun, + IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet, + IN EFI_EVENT Event OPTIONAL + ) +{ + EFI_STATUS Status; + SATA_SI3132_INSTANCE *SataInstance; + SATA_SI3132_PORT *SataPort; + + Status =3D EFI_SUCCESS; + SataInstance =3D INSTANCE_FROM_SCSIPASSTHRU_THIS (This); + SataPort =3D &SataInstance->Ports[Target[0]]; + ZeroMem (SataPort->HostPRB, sizeof (SATA_SI3132_PRB)); + + switch (Packet->DataDirection) { + case EFI_EXT_SCSI_DATA_DIRECTION_READ: + Status =3D SiI3132ScsiPassRead (SataInstance,SataPort, Packet); + break; + case EFI_EXT_SCSI_DATA_DIRECTION_WRITE: + // TODO, fill this in if we ever want to connect something + // besides a simple CDROM/DVDROM + default: + DEBUG ((DEBUG_ERROR, "SCSI PassThru Unsupported direction\n")); + } + + return Status; +} + +UINT8 mScsiId[TARGET_MAX_BYTES] =3D { + 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF +}; + +// With ATA, there are potentially three levels of addressing: port, portm= ultiplier, lun +// although I'm not sure there are any actual multilun devices anymore (cd= autoloaders/etc) +// on ATA the common disk/cdroms generally are single lun devices. So, let= s skip the LUN +// scanning/addressing. Futher, the standard ATAPI spec doesn't support lu= n's. +EFI_STATUS +SiI3132GetNextTargetLun ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN OUT UINT8 **Target, + IN OUT UINT64 *Lun + ) +{ + EFI_STATUS Status; + SATA_SI3132_INSTANCE *SataInstance; + UINT8 *Target8; + + Status =3D EFI_NOT_FOUND; + SataInstance =3D INSTANCE_FROM_SCSIPASSTHRU_THIS (This); + DEBUG ((DEBUG_INFO, "SCSI GetNextTargetLun L:%d\n",*Lun)); + if (!SataInstance) { + DEBUG ((DEBUG_ERROR, "SCSI GetNextTargetLun no instance\n",Lun)); + return EFI_INVALID_PARAMETER; + } + + if (Target =3D=3D NULL || Lun =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + if (*Target =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + if (*Lun > 0) { + DEBUG ((DEBUG_ERROR, "SCSI GetNextTargetLun Only supports lun0 at the = moment\n",Lun)); + return EFI_INVALID_PARAMETER; + } + + Target8 =3D *Target; + + // look for first device + if (CompareMem (Target8, mScsiId, TARGET_MAX_BYTES) =3D=3D 0) { + BOOLEAN Found; + INT32 Index; + + Found =3D FALSE; + Target8 =3D *Target; + for (Index =3D 0; ((Index < SATA_SII3132_MAXPORT) && (!Found)); Index+= +) { + SATA_SI3132_PORT *SataPort; + LIST_ENTRY *List; + INT32 Multiplier; + + SataPort =3D &(SataInstance->Ports[Index]); + List =3D SataPort->Devices.ForwardLink; + Multiplier =3D 0; + while ((List !=3D &SataPort->Devices) && (!Found)) { + SATA_SI3132_DEVICE* SataDevice; + + SataDevice =3D (SATA_SI3132_DEVICE*)List; + if (SataDevice->Atapi) { + Found =3D TRUE; + Target8[0] =3D Index; + Target8[1] =3D Multiplier; //the device on this port (for port m= ultipliers) + DEBUG ((DEBUG_INFO, "SCSI GetNextTargetLun found device at %d %d= \n",Index,Multiplier)); + SiI3132IDiscoverAtapi (This, Index); + + Status =3D EFI_SUCCESS; + break; + } + List =3D List->ForwardLink; + Multiplier++; + } + } + } else { + //todo find the next device, + } + + return Status; +} + +EFI_STATUS +SiI3132GetNextTargetLun2 ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN UINT8 *Target, + IN UINT64 Lun, + IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath + ) +{ + EFI_STATUS Status; + + Status =3D EFI_SUCCESS; + DEBUG ((DEBUG_INFO, "SCSI GetNextTargetLun2\n")); + return Status; +} + +EFI_STATUS +SiI3132ScsiBuildDevicePath ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN UINT8 *Target, + IN UINT64 Lun, + IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath + ) +{ + SATA_SI3132_INSTANCE *SataInstance; + + SataInstance =3D INSTANCE_FROM_SCSIPASSTHRU_THIS (This); + DEBUG ((DEBUG_INFO, "SCSI BuildDevicePath T:%d L:%d\n",*Target,Lun)); + + if (Lun<1) { + return SiI3132BuildDevicePath (&SataInstance->AtaPassThruProtocol, Tar= get[0], Target[1], DevicePath); + } + return EFI_NOT_FOUND; +} + +EFI_STATUS +SiI3132GetTargetLun ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN EFI_DEVICE_PATH_PROTOCOL *DevicePath, + OUT UINT8 **Target, + OUT UINT64 *Lun + ) +{ + EFI_STATUS Status; + + Status =3D EFI_SUCCESS; + DEBUG ((DEBUG_INFO, "SCSI GetNextTarget T:%d L:%d\n",*Target,Lun)); + return Status; +} + +// So normally we would want to do a ATA port reset here (which is general= ly +// frowned on with modern SCSI transports (sas, fc, etc) unless all the +// attached devices are in an error state). But the EFI SCSI protocol isn't +// specific enough to specify a device for which we want to reset the port. +// This means we are basically stuck simulating it by resetting all the po= rts +// which is bad karma. So lets just claim its unsupported and if we discov= er +// that port resets are needed as part of the target/lun reset then consid= er +// doing it automatically as part of that path. +EFI_STATUS +SiI3132ResetChannel ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This + ) +{ + EFI_STATUS Status; + Status =3D EFI_UNSUPPORTED; + + DEBUG ((DEBUG_ERROR, "SCSI ResetChannel\n")); + return Status; +} + +// Just do a device reset here, in the future if we find out that is insuf= ficient +// try to just reset the SATA port the device is attached to as well. +EFI_STATUS +SiI3132ResetTargetLun ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN UINT8 *Target, + IN UINT64 Lun + ) +{ + EFI_STATUS Status; + SATA_SI3132_INSTANCE *SataInstance; + + Status =3D EFI_NOT_FOUND; + SataInstance =3D INSTANCE_FROM_SCSIPASSTHRU_THIS (This); + + DEBUG ((DEBUG_ERROR, "SCSI ResetTargetLun\n")); + + if (Lun<1) { + Status =3D SiI3132ResetDevice (&SataInstance->AtaPassThruProtocol, + Target[0], Target[1]); + } + return Status; +} + +EFI_STATUS +SiI3132GetNextTarget ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN OUT UINT8 **Target + ) +{ + EFI_STATUS Status; + + Status =3D EFI_SUCCESS; + DEBUG ((DEBUG_VERBOSE, "SCSI GetNextTarget\n")); + return Status; +} --=20 2.9.3 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri Apr 19 11:09:55 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1487889248540569.1233333110677; Thu, 23 Feb 2017 14:34:08 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 1660082193; Thu, 23 Feb 2017 14:34:04 -0800 (PST) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id ADA8582152 for ; Thu, 23 Feb 2017 14:34:02 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9A6BDC28; Thu, 23 Feb 2017 14:34:02 -0800 (PST) Received: from u200856.usa.arm.com (u201426.usa.arm.com [10.118.28.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3A6B03F483; Thu, 23 Feb 2017 14:34:02 -0800 (PST) X-Original-To: edk2-devel@lists.01.org From: Jeremy Linton To: edk2-devel@lists.01.org Date: Thu, 23 Feb 2017 16:33:51 -0600 Message-Id: <20170223223355.11383-5-jeremy.linton@arm.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170223223355.11383-1-jeremy.linton@arm.com> References: <20170223223355.11383-1-jeremy.linton@arm.com> Subject: [edk2] [PATCH v3 4/7] EmbeddedPkg: SiI3132: Add SCSI protocol support to header X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ard.biesheuvel@linaro.org, Steve.Capper@arm.com, ryan.harkin@linaro.org, leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Add EXT_SCSI_PASS_THRU structures to SI3132_PORT structure, along with helpers and new entry points. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton Reviewed-by: Ard Biesheuvel --- EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.h | 93 ++++++++++++++++++++= ++-- 1 file changed, 88 insertions(+), 5 deletions(-) diff --git a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.h b/EmbeddedPkg= /Drivers/SataSiI3132Dxe/SataSiI3132.h index a7bc956..4cfef29 100644 --- a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.h +++ b/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.h @@ -20,6 +20,7 @@ =20 #include #include +#include =20 #include #include @@ -57,6 +58,7 @@ #define SII3132_PORT_SLOTSTATUS_REG 0x1800 #define SII3132_PORT_CMDACTIV_REG 0x1C00 #define SII3132_PORT_SSTATUS_REG 0x1F04 +#define SII3132_PORT_SERROR_REG 0x1F08 =20 #define SII3132_PORT_CONTROL_RESET (1 << 0) #define SII3132_PORT_DEVICE_RESET (1 << 1) @@ -81,6 +83,7 @@ #define PRB_CTRL_INT_MASK 0x40 #define PRB_CTRL_SRST 0x80 =20 +#define PRB_PROT_DEFAULT 0x00 #define PRB_PROT_PACKET 0x01 #define PRB_PROT_LEGACY_QUEUE 0x02 #define PRB_PROT_NATIVE_QUEUE 0x04 @@ -88,11 +91,18 @@ #define PRB_PROT_WRITE 0x10 #define PRB_PROT_TRANSPARENT 0x20 =20 +#define SII_FIS_REGISTER_H2D 0x27 //Register FIS - Host to Device +#define SII_FIS_CONTROL_CMD (1 << 7) //Indicate FIS is a command + #define SGE_XCF (1 << 28) #define SGE_DRD (1 << 29) #define SGE_LNK (1 << 30) #define SGE_TRM 0x80000000 =20 +#define SI_MAX_CDB 12 //MAX supported CDB +#define SI_MAX_SENSE 256 +#define SI_DEFAULT_TIMEOUT 50000 + typedef struct _SATA_SI3132_SGE { UINT32 DataAddressLow; UINT32 DataAddressHigh; @@ -121,6 +131,8 @@ typedef struct _SATA_SI3132_DEVICE { UINTN Index; struct _SATA_SI3132_PORT *Port; //Parent Port UINT32 BlockSize; + BOOLEAN Atapi; //ATAPI device + BOOLEAN Cdb16; //Uses 16byte CDB transfers (or 12) } SATA_SI3132_DEVICE; =20 typedef struct _SATA_SI3132_PORT { @@ -140,14 +152,16 @@ typedef struct _SATA_SI3132_INSTANCE { UINTN Signature; =20 SATA_SI3132_PORT Ports[SATA_SII3132_MAXPORT]; - - EFI_ATA_PASS_THRU_PROTOCOL AtaPassThruProtocol; - + EFI_ATA_PASS_THRU_MODE AtaPassThruMode; + EFI_ATA_PASS_THRU_PROTOCOL AtaPassThruProtocol; + EFI_EXT_SCSI_PASS_THRU_MODE ExtScsiPassThruMode; + EFI_EXT_SCSI_PASS_THRU_PROTOCOL ExtScsiPassThru; EFI_PCI_IO_PROTOCOL *PciIo; } SATA_SI3132_INSTANCE; =20 #define SATA_SII3132_SIGNATURE SIGNATURE_32('s', 'i', '3', '2= ') -#define INSTANCE_FROM_ATAPASSTHRU_THIS(a) CR(a, SATA_SI3132_INSTANCE, At= aPassThruProtocol, SATA_SII3132_SIGNATURE) +#define INSTANCE_FROM_ATAPASSTHRU_THIS(a) CR (a, SATA_SI3132_INSTANCE, A= taPassThruProtocol, SATA_SII3132_SIGNATURE) +#define INSTANCE_FROM_SCSIPASSTHRU_THIS(a) CR (a, SATA_SI3132_INSTANCE, E= xtScsiPassThru, SATA_SII3132_SIGNATURE) =20 #define SATA_GLOBAL_READ32(Offset, Value) PciIo->Mem.Read (PciIo, EfiPciI= oWidthUint32, 0, Offset, 1, Value) #define SATA_GLOBAL_WRITE32(Offset, Value) { UINT32 Value32 =3D Value; Pci= Io->Mem.Write (PciIo, EfiPciIoWidthUint32, 0, Offset, 1, &Value32); } @@ -155,7 +169,7 @@ typedef struct _SATA_SI3132_INSTANCE { #define SATA_PORT_READ32(Offset, Value) PciIo->Mem.Read (PciIo, EfiPciIoW= idthUint32, 1, Offset, 1, Value) #define SATA_PORT_WRITE32(Offset, Value) { UINT32 Value32 =3D Value; PciIo= ->Mem.Write (PciIo, EfiPciIoWidthUint32, 1, Offset, 1, &Value32); } =20 -#define SATA_TRACE(txt) DEBUG((EFI_D_VERBOSE, "ARM_SATA: " txt "\n")) +#define SATA_TRACE(txt) DEBUG ((DEBUG_VERBOSE, "ARM_SATA: " txt "\n")) =20 extern EFI_COMPONENT_NAME_PROTOCOL gSataSiI3132ComponentName; extern EFI_COMPONENT_NAME2_PROTOCOL gSataSiI3132ComponentName2; @@ -266,4 +280,73 @@ EFI_STATUS SiI3132ResetDevice ( IN UINT16 PortMultiplierPort ); =20 +/** + * EFI ATA Pass Thru Entry points for SCSI Protocol + */ +SATA_SI3132_DEVICE* GetSataDevice ( + IN SATA_SI3132_INSTANCE *SataInstance, + IN UINT16 Port, + IN UINT16 PortMultiplierPort + ); + +EFI_STATUS SiI3132IssueCommand ( + IN SATA_SI3132_PORT *SataPort, + EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT32 Timeout, + VOID *StatusBlock + ); + +/** + * EFI SCSI Pass Thru Protocol + */ +EFI_STATUS SiI3132ScsiPassThru ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN UINT8 *Target, + IN UINT64 Lun, + IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet, + IN EFI_EVENT Event OPTIONAL + ); + +EFI_STATUS SiI3132GetNextTargetLun ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN OUT UINT8 **Target, + IN OUT UINT64 *Lun +); + +EFI_STATUS SiI3132GetNextTargetLun2 ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN UINT8 *Target, + IN UINT64 Lun, + IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath + ); + +EFI_STATUS SiI3132ScsiBuildDevicePath ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN UINT8 *Target, + IN UINT64 Lun, + IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath + ); + +EFI_STATUS SiI3132GetTargetLun ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN EFI_DEVICE_PATH_PROTOCOL *DevicePath, + OUT UINT8 **Target, + OUT UINT64 *Lun + ); + +EFI_STATUS SiI3132ResetChannel ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This + ); + +EFI_STATUS SiI3132ResetTargetLun ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN UINT8 *Target, + IN UINT64 Lun + ); + +EFI_STATUS SiI3132GetNextTarget ( + IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This, + IN OUT UINT8 **Target + ); + #endif --=20 2.9.3 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri Apr 19 11:09:55 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1487889251923475.94360955633397; Thu, 23 Feb 2017 14:34:11 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 4A51882192; Thu, 23 Feb 2017 14:34:07 -0800 (PST) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id D287C82176 for ; Thu, 23 Feb 2017 14:34:03 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BE02828; Thu, 23 Feb 2017 14:34:03 -0800 (PST) Received: from u200856.usa.arm.com (u201426.usa.arm.com [10.118.28.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 685BA3F483; Thu, 23 Feb 2017 14:34:03 -0800 (PST) X-Original-To: edk2-devel@lists.01.org From: Jeremy Linton To: edk2-devel@lists.01.org Date: Thu, 23 Feb 2017 16:33:52 -0600 Message-Id: <20170223223355.11383-6-jeremy.linton@arm.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170223223355.11383-1-jeremy.linton@arm.com> References: <20170223223355.11383-1-jeremy.linton@arm.com> Subject: [edk2] [PATCH v3 5/7] EmbeddedPkg: SiI3132: Break out FIS command submission X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ard.biesheuvel@linaro.org, Steve.Capper@arm.com, ryan.harkin@linaro.org, leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The existing ATA pass-through routine builds the FIS and handles submission to the hardware. Break out the FIS submission part so that it can be utilized by the SCSI pass-through. Also, tighten up the error handling a bit. Starting with removal of the ASSERTs on errors. ATAPI like SCSI uses check conditions to indicate device state changes. So these error paths can get exercised on CD disk change/etc. Further we want the clamp the timeouts within a range rather than spinning forever if the port fails to become ready. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton --- .../Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c | 225 +++++++++++++----= ---- OpenPlatformPkg | 2 +- 2 files changed, 138 insertions(+), 89 deletions(-) diff --git a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c b/Embe= ddedPkg/Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c index 2fb5fd6..601583d 100644 --- a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c +++ b/EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c @@ -22,7 +22,8 @@ GetSataDevice ( IN SATA_SI3132_INSTANCE* SataInstance, IN UINT16 Port, IN UINT16 PortMultiplierPort -) { + ) +{ LIST_ENTRY *List; SATA_SI3132_PORT *SataPort; SATA_SI3132_DEVICE *SataDevice; @@ -44,6 +45,124 @@ GetSataDevice ( return NULL; } =20 +UINT32 +SiI3231DeviceReady ( + IN SATA_SI3132_PORT *SataPort, + IN EFI_PCI_IO_PROTOCOL *PciIo + ) +{ + UINT32 Value32; + UINT32 Timeout; + Timeout =3D SI_DEFAULT_TIMEOUT; + + do { + SATA_PORT_READ32 (SataPort->RegBase + SII3132_PORT_STATUS_REG, &Value3= 2); + Timeout--; + } while (Timeout && !(Value32 & SII3132_PORT_STATUS_PORTREADY)); + if (Timeout =3D=3D 0) { + DEBUG ((DEBUG_WARN, "SiI3132AtaPassThru() Device not ready, try anyway= \n")); + //Consider doing a device reset here. + } + + return Timeout; +} + +EFI_STATUS +SiI3132IssueCommand ( + IN SATA_SI3132_PORT *SataPort, + EFI_PCI_IO_PROTOCOL *PciIo, + IN UINT32 Timeout, + VOID *StatusBlock + ) +{ + UINT32 IrqMask; + UINT32 Value32, Error; + UINTN EmptySlot; + EFI_STATUS Status; + + IrqMask =3D (SII3132_PORT_INT_CMDCOMPL | SII3132_PORT_INT_CMDERR) << 16; + EmptySlot =3D 0; + SiI3231DeviceReady (SataPort, PciIo); + // Clear IRQ + SATA_PORT_WRITE32 (SataPort->RegBase + SII3132_PORT_INTSTATUS_REG, IrqMa= sk); + + if (!FeaturePcdGet (PcdSataSiI3132FeatureDirectCommandIssuing)) { + // Indirect Command Issuance + + //TODO: Find which slot is free (maybe use the Cmd FIFO) + //SATA_PORT_READ32 (SataPort->RegBase + SII3132_PORT_CMDEXECFIFO_REG, = &EmptySlot); + SATA_PORT_WRITE32 (SataPort->RegBase + SII3132_PORT_CMDACTIV_REG + (Em= ptySlot * 8), + (UINT32)(SataPort->PhysAddrHostPRB & 0xFFFFFFFF)); + SATA_PORT_WRITE32 (SataPort->RegBase + SII3132_PORT_CMDACTIV_REG + (Em= ptySlot * 8) + 4, + (UINT32)((SataPort->PhysAddrHostPRB >> 32) & 0xFFFFFF= FF)); + } else { + // Direct Command Issuance + DEBUG ((DEBUG_ERROR ,"SiI3132AtaPassThru() Untested path\n")); + Status =3D PciIo->Mem.Write (PciIo, EfiPciIoWidthUint32, 1, // Bar 1 + SataPort->RegBase + (EmptySlot * 0x80), + sizeof (SATA_SI3132_PRB) / 4, + SataPort->HostPRB); + ASSERT_EFI_ERROR (Status); + + SATA_PORT_WRITE32 (SataPort->RegBase + SII3132_PORT_CMDEXECFIFO_REG, E= mptySlot); + } + + // Clamp the timeout range + if (Timeout < 1) { + Timeout =3D SI_DEFAULT_TIMEOUT; + } else if (Timeout > SI_DEFAULT_TIMEOUT) { + Timeout =3D SI_DEFAULT_TIMEOUT; + } + + SATA_PORT_READ32 (SataPort->RegBase + SII3132_PORT_INTSTATUS_REG, &Value= 32); + while (Timeout && !(Value32 & IrqMask)) { + gBS->Stall (1); + SATA_PORT_READ32 (SataPort->RegBase + SII3132_PORT_INTSTATUS_REG, &Val= ue32); + Timeout--; + } + + // Fill Packet Ata Status Block + Status =3D PciIo->Mem.Read (PciIo, EfiPciIoWidthUint32, 1, // Bar 1 + SataPort->RegBase + 0x08, + sizeof (EFI_ATA_STATUS_BLOCK) / 4, + StatusBlock); + + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "SiI3132AtaPassThru() status (%d) block %X %X\n",= Status, SataPort->RegBase, StatusBlock)); + } + + if (Timeout =3D=3D 0) { + DEBUG ((DEBUG_ERROR, "SiI3132AtaPassThru() Err:Timeout\n")); + // Flush the command, reinit port + SATA_PORT_WRITE32 (SataPort->RegBase + SII3132_PORT_CONTROLSET_REG, SI= I3132_PORT_CONTROL_INT); + SiI3231DeviceReady (SataPort, PciIo); + Status =3D EFI_TIMEOUT; + + } else if (Value32 & (SII3132_PORT_INT_CMDERR << 16)) { + UINT32 Serror; + + SATA_PORT_READ32 (SataPort->RegBase + SII3132_PORT_CMDERROR_REG, &Erro= r); + SATA_PORT_READ32 (SataPort->RegBase + SII3132_PORT_SERROR_REG, &Serror= ); + SATA_PORT_WRITE32 (SataPort->RegBase + SII3132_PORT_INTSTATUS_REG, Val= ue32 & 0xFF00); //clear error bits + + DEBUG ((DEBUG_INFO, "SiI3132AtaPassThru() CmdErr:0x%X (SiI3132 Err:0x%= X) (STATUS: %X ERROR:%X) SERROR=3D%X\n", + Value32, Error, SataPort->HostPRB->Fis.Command,SataPort->HostP= RB->Fis.Features, Serror)); + + // clear port status + SATA_PORT_WRITE32 (SataPort->RegBase + SII3132_PORT_CONTROLSET_REG, SI= I3132_PORT_CONTROL_INT); + SiI3231DeviceReady (SataPort, PciIo); + Status =3D EFI_DEVICE_ERROR; + + } else if (Value32 & (SII3132_PORT_INT_CMDCOMPL << 16)) { + // Clear Command Complete + SATA_PORT_WRITE32 (SataPort->RegBase + SII3132_PORT_INTSTATUS_REG, SII= 3132_PORT_INT_CMDCOMPL << 16); + Status =3D EFI_SUCCESS; + + } + + return Status; +} + EFI_STATUS SiI3132AtaPassThruCommand ( IN SATA_SI3132_INSTANCE *SataSiI3132Instance, @@ -58,18 +177,14 @@ SiI3132AtaPassThruCommand ( UINTN InDataBufferLength =3D 0; EFI_PHYSICAL_ADDRESS PhysOutDataBuffer; UINTN OutDataBufferLength; - CONST UINTN EmptySlot =3D 0; UINTN Control =3D PRB_CTRL_ATA; - UINTN Protocol =3D 0; - UINT32 Value32, Error, Timeout =3D 0; - CONST UINT32 IrqMask =3D (SII3132_PORT_INT_CMDCOMPL | SII3132= _PORT_INT_CMDERR) << 16; + UINTN Protocol =3D PRB_PROT_DEFAULT; EFI_STATUS Status; VOID* PciAllocMapping =3D NULL; EFI_PCI_IO_PROTOCOL *PciIo; =20 PciIo =3D SataSiI3132Instance->PciIo; ZeroMem (SataPort->HostPRB, sizeof (SATA_SI3132_PRB)); - // Construct Si3132 PRB switch (Packet->Protocol) { case EFI_ATA_PASS_THRU_PROTOCOL_ATA_HARDWARE_RESET: @@ -92,7 +207,8 @@ SiI3132AtaPassThruCommand ( case EFI_ATA_PASS_THRU_PROTOCOL_PIO_DATA_IN: // Fixup the size for block transfer. Following UEFI Specification, 'I= nTransferLength' should // be in number of bytes. But for most data transfer commands, the val= ue is in number of blocks - if (Packet->Acb->AtaCommand =3D=3D ATA_CMD_IDENTIFY_DRIVE) { + if ( (Packet->Acb->AtaCommand =3D=3D ATA_CMD_IDENTIFY_DRIVE) || + (Packet->Acb->AtaCommand =3D=3D ATA_CMD_IDENTIFY_DEVICE) ) { InDataBufferLength =3D Packet->InTransferLength; } else { SataDevice =3D GetSataDevice (SataSiI3132Instance, SataPort->Index, = PortMultiplierPort); @@ -108,6 +224,7 @@ SiI3132AtaPassThruCommand ( Packet->InDataBuffer, &InDataBufferLength, &PhysInDataBuffe= r, &PciAllocMapping ); if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "SiI map() failure %d\n", Status)); return Status; } =20 @@ -121,8 +238,8 @@ SiI3132AtaPassThruCommand ( CopyMem (&SataPort->HostPRB->Fis, Packet->Acb, sizeof (EFI_ATA_COMMAND= _BLOCK)); =20 // Fixup the FIS - SataPort->HostPRB->Fis.FisType =3D 0x27; // Register - Host to Device = FIS - SataPort->HostPRB->Fis.Control =3D 1 << 7; // Is a command + SataPort->HostPRB->Fis.FisType =3D SII_FIS_REGISTER_H2D; // Register -= Host to Device FIS + SataPort->HostPRB->Fis.Control =3D SII_FIS_CONTROL_CMD; // Is a command if (FeaturePcdGet (PcdSataSiI3132FeaturePMPSupport)) { SataPort->HostPRB->Fis.Control |=3D PortMultiplierPort & 0xFF; } @@ -188,81 +305,10 @@ SiI3132AtaPassThruCommand ( SataPort->HostPRB->Control =3D Control; SataPort->HostPRB->ProtocolOverride =3D Protocol; =20 - // Clear IRQ - SATA_PORT_WRITE32 (SataPort->RegBase + SII3132_PORT_INTSTATUS_REG, IrqMa= sk); - - if (!FeaturePcdGet (PcdSataSiI3132FeatureDirectCommandIssuing)) { - // Indirect Command Issuance - - //TODO: Find which slot is free (maybe use the Cmd FIFO) - //SATA_PORT_READ32 (SataPort->RegBase + SII3132_PORT_CMDEXECFIFO_REG, = &EmptySlot); - - SATA_PORT_WRITE32 (SataPort->RegBase + SII3132_PORT_CMDACTIV_REG + (Em= ptySlot * 8), - (UINT32)(SataPort->PhysAddrHostPRB & 0xFFFFFFFF)); - SATA_PORT_WRITE32 (SataPort->RegBase + SII3132_PORT_CMDACTIV_REG + (Em= ptySlot * 8) + 4, - (UINT32)((SataPort->PhysAddrHostPRB >> 32) & 0xFFFFFF= FF)); - } else { - // Direct Command Issuance - Status =3D PciIo->Mem.Write (PciIo, EfiPciIoWidthUint32, 1, // Bar 1 - SataPort->RegBase + (EmptySlot * 0x80), - sizeof (SATA_SI3132_PRB) / 4, - SataPort->HostPRB); - ASSERT_EFI_ERROR (Status); - - SATA_PORT_WRITE32 (SataPort->RegBase + SII3132_PORT_CMDEXECFIFO_REG, E= mptySlot); - } - -#if 0 - // Could need to be implemented if we run multiple command in parallel t= o know which slot has been completed - SATA_PORT_READ32 (SataPort->RegBase + SII3132_PORT_SLOTSTATUS_REG, &Valu= e32); - Timeout =3D Packet->Timeout; - while (!Timeout && !Value32) { - gBS->Stall (1); - SATA_PORT_READ32 (SataPort->RegBase + SII3132_PORT_SLOTSTATUS_REG, &Va= lue32); - Timeout--; - } -#else - SATA_PORT_READ32 (SataPort->RegBase + SII3132_PORT_INTSTATUS_REG, &Value= 32); - if (!Packet->Timeout) { - while (!(Value32 & IrqMask)) { - gBS->Stall (1); - SATA_PORT_READ32 (SataPort->RegBase + SII3132_PORT_INTSTATUS_REG, &V= alue32); - } - } else { - Timeout =3D Packet->Timeout; - while (Timeout && !(Value32 & IrqMask)) { - gBS->Stall (1); - SATA_PORT_READ32 (SataPort->RegBase + SII3132_PORT_INTSTATUS_REG, &V= alue32); - Timeout--; - } - } -#endif - // Fill Packet Ata Status Block - Status =3D PciIo->Mem.Read (PciIo, EfiPciIoWidthUint32, 1, // Bar 1 - SataPort->RegBase + 0x08, - sizeof (EFI_ATA_STATUS_BLOCK) / 4, - Packet->Asb); - ASSERT_EFI_ERROR (Status); - - - if ((Packet->Timeout !=3D 0) && (Timeout =3D=3D 0)) { - DEBUG ((EFI_D_ERROR, "SiI3132AtaPassThru() Err:Timeout\n")); - //ASSERT (0); - return EFI_TIMEOUT; - } else if (Value32 & (SII3132_PORT_INT_CMDERR << 16)) { - SATA_PORT_READ32 (SataPort->RegBase + SII3132_PORT_CMDERROR_REG, &Erro= r); - DEBUG ((EFI_D_ERROR, "SiI3132AtaPassThru() CmdErr:0x%X (SiI3132 Err:0x= %X)\n", Value32, Error)); - ASSERT (0); - return EFI_DEVICE_ERROR; - } else if (Value32 & (SII3132_PORT_INT_CMDCOMPL << 16)) { - // Clear Command Complete - SATA_PORT_WRITE32 (SataPort->RegBase + SII3132_PORT_INTSTATUS_REG, SII= 3132_PORT_INT_CMDCOMPL << 16); - - if (PciAllocMapping) { - Status =3D PciIo->Unmap (PciIo, PciAllocMapping); - ASSERT (!EFI_ERROR (Status)); - } + Status =3D SiI3132IssueCommand (SataPort, PciIo, Packet->Timeout, Packet= ->Asb); =20 + if (!EFI_ERROR (Status)) + { // If the command was ATA_CMD_IDENTIFY_DRIVE then we need to update th= e BlockSize if (Packet->Acb->AtaCommand =3D=3D ATA_CMD_IDENTIFY_DRIVE) { ATA_IDENTIFY_DATA *IdentifyData =3D (ATA_IDENTIFY_DATA*)Packet->InDa= taBuffer; @@ -279,11 +325,14 @@ SiI3132AtaPassThruCommand ( SataDevice->BlockSize =3D 0x200; } } - return EFI_SUCCESS; - } else { - ASSERT (0); - return EFI_DEVICE_ERROR; } + + if (PciAllocMapping) { + Status =3D PciIo->Unmap (PciIo, PciAllocMapping); + } + + return Status; + } =20 /** @@ -339,8 +388,7 @@ SiI3132AtaPassThru ( } SataPort =3D SataDevice->Port; =20 - DEBUG ((EFI_D_INFO, "SiI3132AtaPassThru(%d,%d) : AtaCmd:0x%X Prot:%d\n",= Port, PortMultiplierPort, + DEBUG ((DEBUG_VERBOSE, "SiI3132AtaPassThru(%p,%d,%d) : AtaCmd:0x%X Prot:= %d\n", SataPort, Port, PortMultiplierPort, Packet->Acb->AtaCommand, Packet->Protocol)); =20 return SiI3132AtaPassThruCommand (SataSiI3132Instance, SataPort, PortMul= tiplierPort, Packet, Event); --=20 2.9.3 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri Apr 19 11:09:55 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1487889253073752.9071286205708; Thu, 23 Feb 2017 14:34:13 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 8421282199; Thu, 23 Feb 2017 14:34:07 -0800 (PST) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id EC01882196 for ; Thu, 23 Feb 2017 14:34:04 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D88A4687; Thu, 23 Feb 2017 14:34:04 -0800 (PST) Received: from u200856.usa.arm.com (u201426.usa.arm.com [10.118.28.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 78C7B3F483; Thu, 23 Feb 2017 14:34:04 -0800 (PST) X-Original-To: edk2-devel@lists.01.org From: Jeremy Linton To: edk2-devel@lists.01.org Date: Thu, 23 Feb 2017 16:33:53 -0600 Message-Id: <20170223223355.11383-7-jeremy.linton@arm.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170223223355.11383-1-jeremy.linton@arm.com> References: <20170223223355.11383-1-jeremy.linton@arm.com> Subject: [edk2] [PATCH v3 6/7] EmbeddedPkg: SiI3132: Cleanup device node creation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ard.biesheuvel@linaro.org, Steve.Capper@arm.com, ryan.harkin@linaro.org, leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" There can be either ATA or ATAPI devices connected to each SATA port. We want to detect if the device is ATA and create a SATA_DP path or a SCSI_DP for ATAPI devices. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton --- .../Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c | 43 ++++++++++++++----= ---- 1 file changed, 28 insertions(+), 15 deletions(-) diff --git a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c b/Embe= ddedPkg/Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c index 601583d..3fb5f75 100644 --- a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c +++ b/EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c @@ -521,16 +521,19 @@ SiI3132GetNextDevice ( SataPort =3D &(SataSiI3132Instance->Ports[Port]); =20 if (*PortMultiplierPort =3D=3D 0xFFFF) { + SATA_TRACE ("SiI3132GetNextDevice() PortMultiplier"); List =3D SataPort->Devices.ForwardLink; - if (List !=3D &SataPort->Devices) { + if ((List !=3D &SataPort->Devices) && + (((SATA_SI3132_DEVICE*)List)->Atapi =3D=3D FALSE)) { // The list is not empty, return the first device *PortMultiplierPort =3D ((SATA_SI3132_DEVICE*)List)->Index; } else { Status =3D EFI_NOT_FOUND; } } else { + SATA_TRACE ("SiI3132GetNextDevice()"); SataDevice =3D GetSataDevice (SataSiI3132Instance, Port, *PortMultipli= erPort); - if (SataDevice !=3D NULL) { + if ((SataDevice !=3D NULL) && (SataDevice->Atapi =3D=3D FALSE)) { // We have found the previous port multiplier, return the next one List =3D SataDevice->Link.ForwardLink; if (List !=3D &SataPort->Devices) { @@ -601,20 +604,30 @@ SiI3132BuildDevicePath ( return EFI_NOT_FOUND; } =20 - SiI3132DevicePath =3D CreateDeviceNode (MESSAGING_DEVICE_PATH, MSG_SATA_= DP, sizeof (SATA_DEVICE_PATH)); - if (SiI3132DevicePath =3D=3D NULL) { - return EFI_OUT_OF_RESOURCES; - } + if (SataDevice->Atapi) { + SiI3132DevicePath =3D CreateDeviceNode (MESSAGING_DEVICE_PATH, MSG_SCS= I_DP, sizeof (SCSI_DEVICE_PATH)); + if (SiI3132DevicePath =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + ((SCSI_DEVICE_PATH*)SiI3132DevicePath)->Pun =3D Port; + ((SCSI_DEVICE_PATH*)SiI3132DevicePath)->Lun =3D 0; =20 - ((SATA_DEVICE_PATH*)SiI3132DevicePath)->HBAPortNumber =3D Port; - if (FeaturePcdGet (PcdSataSiI3132FeaturePMPSupport)) { - ((SATA_DEVICE_PATH*)SiI3132DevicePath)->PortMultiplierPortNumber =3D P= ortMultiplierPort; - } else { - //Temp:((SATA_DEVICE_PATH*)SiI3132DevicePath)->PortMultiplierPortNumbe= r =3D SATA_HBA_DIRECT_CONNECT_FLAG; - ((SATA_DEVICE_PATH*)SiI3132DevicePath)->PortMultiplierPortNumber =3D 0; } - ((SATA_DEVICE_PATH*)SiI3132DevicePath)->Lun =3D Port; //TODO: Search inf= ormation how to define properly LUN (Logical Unit Number) + else { + SiI3132DevicePath =3D CreateDeviceNode (MESSAGING_DEVICE_PATH, MSG_SAT= A_DP, sizeof (SATA_DEVICE_PATH)); + if (SiI3132DevicePath =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } =20 + ((SATA_DEVICE_PATH*)SiI3132DevicePath)->HBAPortNumber =3D Port; + if (FeaturePcdGet (PcdSataSiI3132FeaturePMPSupport)) { + ((SATA_DEVICE_PATH*)SiI3132DevicePath)->PortMultiplierPortNumber =3D= PortMultiplierPort; + } else { + //Temp:((SATA_DEVICE_PATH*)SiI3132DevicePath)->PortMultiplierPortN= umber =3D SATA_HBA_DIRECT_CONNECT_FLAG; + ((SATA_DEVICE_PATH*)SiI3132DevicePath)->PortMultiplierPortNumber =3D= 0; + } + ((SATA_DEVICE_PATH*)SiI3132DevicePath)->Lun =3D 0; // Only support lun= 0 on ATA + } *DevicePath =3D SiI3132DevicePath; return EFI_SUCCESS; } @@ -680,7 +693,7 @@ SiI3132GetDevice ( return EFI_INVALID_PARAMETER; } =20 - if (((SATA_DEVICE_PATH*)DevicePath)->Lun >=3D SATA_SII3132_MAXPORT) { + if (((SATA_DEVICE_PATH*)DevicePath)->HBAPortNumber >=3D SATA_SII3132_MAX= PORT) { return EFI_NOT_FOUND; } =20 @@ -688,7 +701,7 @@ SiI3132GetDevice ( ASSERT (0); //TODO: Implement me! return EFI_UNSUPPORTED; } else { - *Port =3D ((SATA_DEVICE_PATH*)DevicePath)->Lun; + *Port =3D ((SATA_DEVICE_PATH*)DevicePath)->HBAPortNumber; // Return the first Sata Sevice as there should be only one directly c= onnected *PortMultiplierPort =3D ((SATA_SI3132_DEVICE*)SataSiI3132Instance->Por= ts[*Port].Devices.ForwardLink)->Index; return EFI_SUCCESS; --=20 2.9.3 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri Apr 19 11:09:55 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1487889257161542.8137632833642; Thu, 23 Feb 2017 14:34:17 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id BD02F8219D; Thu, 23 Feb 2017 14:34:07 -0800 (PST) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id DCE8082152 for ; Thu, 23 Feb 2017 14:34:05 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C77F328; Thu, 23 Feb 2017 14:34:05 -0800 (PST) Received: from u200856.usa.arm.com (u201426.usa.arm.com [10.118.28.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 72D183F483; Thu, 23 Feb 2017 14:34:05 -0800 (PST) X-Original-To: edk2-devel@lists.01.org From: Jeremy Linton To: edk2-devel@lists.01.org Date: Thu, 23 Feb 2017 16:33:54 -0600 Message-Id: <20170223223355.11383-8-jeremy.linton@arm.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170223223355.11383-1-jeremy.linton@arm.com> References: <20170223223355.11383-1-jeremy.linton@arm.com> Subject: [edk2] [PATCH v3 7/7] EmbeddedPkg: SiI3132: Enable SCSI pass-through protocol X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ard.biesheuvel@linaro.org, Steve.Capper@arm.com, ryan.harkin@linaro.org, leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Now that everything is in place, lets export the protocol, build the module, and remove the ATAPI unsupported flags. Now when we detect an ATAPI device on a port we flag it as such. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton --- EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.c | 49 ++++++++++++++----= ---- .../Drivers/SataSiI3132Dxe/SataSiI3132Dxe.inf | 2 + 2 files changed, 33 insertions(+), 18 deletions(-) diff --git a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.c b/EmbeddedPkg= /Drivers/SataSiI3132Dxe/SataSiI3132.c index f494655..5bf8da0 100644 --- a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.c +++ b/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.c @@ -1,7 +1,7 @@ /** @file * PCIe Sata support for the Silicon Image I3132 * -* Copyright (c) 2011-2015, ARM Limited. All rights reserved. +* Copyright (c) 2011-2016, ARM Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the B= SD License @@ -16,6 +16,7 @@ #include "SataSiI3132.h" =20 #include +#include =20 #include #include @@ -88,7 +89,6 @@ SataSiI3132Constructor ( ) { SATA_SI3132_INSTANCE *Instance; - EFI_ATA_PASS_THRU_MODE *AtaPassThruMode; =20 if (!SataSiI3132Instance) { return EFI_INVALID_PARAMETER; @@ -102,16 +102,15 @@ SataSiI3132Constructor ( Instance->Signature =3D SATA_SII3132_SIGNATURE; Instance->PciIo =3D PciIo; =20 - AtaPassThruMode =3D (EFI_ATA_PASS_THRU_MODE*)AllocatePool (sizeof (EFI_A= TA_PASS_THRU_MODE)); - AtaPassThruMode->Attributes =3D EFI_ATA_PASS_THRU_ATTRIBUTES_PHYSICAL | = EFI_ATA_PASS_THRU_ATTRIBUTES_LOGICAL; - AtaPassThruMode->IoAlign =3D 0x1000; + Instance->AtaPassThruMode.Attributes =3D EFI_ATA_PASS_THRU_ATTRIBUTES_PH= YSICAL | EFI_ATA_PASS_THRU_ATTRIBUTES_LOGICAL; + Instance->AtaPassThruMode.IoAlign =3D 0x4; =20 // Initialize SiI3132 ports SataSiI3132PortConstructor (Instance, 0); SataSiI3132PortConstructor (Instance, 1); =20 // Set ATA Pass Thru Protocol - Instance->AtaPassThruProtocol.Mode =3D AtaPassThruMode; + Instance->AtaPassThruProtocol.Mode =3D &Instance->AtaPassThru= Mode; Instance->AtaPassThruProtocol.PassThru =3D SiI3132AtaPassThru; Instance->AtaPassThruProtocol.GetNextPort =3D SiI3132GetNextPort; Instance->AtaPassThruProtocol.GetNextDevice =3D SiI3132GetNextDevice; @@ -120,6 +119,20 @@ SataSiI3132Constructor ( Instance->AtaPassThruProtocol.ResetPort =3D SiI3132ResetPort; Instance->AtaPassThruProtocol.ResetDevice =3D SiI3132ResetDevice; =20 + Instance->ExtScsiPassThruMode.Attributes =3D EFI_EXT_SCSI_PASS_THRU_ATTR= IBUTES_PHYSICAL | + EFI_EXT_SCSI_PASS_THRU_ATTRIB= UTES_LOGICAL; + Instance->ExtScsiPassThruMode.IoAlign =3D 0x4; + + // Set SCSI Pass Thru Protocol + Instance->ExtScsiPassThru.Mode =3D &Instance->ExtScsiPass= ThruMode; + Instance->ExtScsiPassThru.PassThru =3D SiI3132ScsiPassThru; + Instance->ExtScsiPassThru.GetNextTargetLun =3D SiI3132GetNextTargetLu= n; + Instance->ExtScsiPassThru.BuildDevicePath =3D SiI3132ScsiBuildDevice= Path; + Instance->ExtScsiPassThru.GetTargetLun =3D SiI3132GetTargetLun; + Instance->ExtScsiPassThru.ResetChannel =3D SiI3132ResetChannel; + Instance->ExtScsiPassThru.ResetTargetLun =3D SiI3132ResetTargetLun; + Instance->ExtScsiPassThru.GetNextTarget =3D SiI3132GetNextTarget; + *SataSiI3132Instance =3D Instance; =20 return EFI_SUCCESS; @@ -165,6 +178,7 @@ SataSiI3132PortInitialization ( UINT32 Signature; EFI_STATUS Status; EFI_PCI_IO_PROTOCOL* PciIo; + BOOLEAN Atapi =3D FALSE; =20 Status =3D SiI3132HwResetPort (Port); if (EFI_ERROR (Status)) { @@ -177,24 +191,23 @@ SataSiI3132PortInitialization ( Status =3D SATA_PORT_READ32 (Port->RegBase + SII3132_PORT_SSTATUS_REG, &= Value32); if (!EFI_ERROR (Status) && (Value32 & 0x3)) { // Do a soft reset to see if it is a port multiplier - SATA_TRACE ("SataSiI3132PortInitialization: soft reset - it is a port = multiplier\n"); + SATA_TRACE ("SataSiI3132PortInitialization: soft reset - is it a port = multiplier?\n"); Status =3D SiI3132SoftResetCommand (Port, &Signature); if (!EFI_ERROR (Status)) { if (Signature =3D=3D SII3132_PORT_SIGNATURE_PMP) { - SATA_TRACE ("SataSiI3132PortInitialization(): a Port Multiplier is= present"); + DEBUG ((DEBUG_ERROR, "SataSiI3132PortInitialization(): a Port Mult= iplier is present")); if (FeaturePcdGet (PcdSataSiI3132FeaturePMPSupport)) { ASSERT (0); // Not supported yet } else { return EFI_UNSUPPORTED; } } else if (Signature =3D=3D SII3132_PORT_SIGNATURE_ATAPI) { - ASSERT (0); // Not supported yet SATA_TRACE ("SataSiI3132PortInitialization(): an ATAPI device is p= resent"); - return EFI_UNSUPPORTED; + Atapi =3D TRUE; } else if (Signature =3D=3D SII3132_PORT_SIGNATURE_ATA) { SATA_TRACE ("SataSiI3132PortInitialization(): an ATA device is pre= sent"); } else { - SATA_TRACE ("SataSiI3132PortInitialization(): Present device unkno= wn!"); + DEBUG ((DEBUG_ERROR, "SataSiI3132PortInitialization(): Present dev= ice unknown!")); ASSERT (0); // Not supported return EFI_UNSUPPORTED; } @@ -204,6 +217,7 @@ SataSiI3132PortInitialization ( Device->Index =3D Port->Index; //TODO: Could need to be fixed wh= en SATA Port Multiplier support Device->Port =3D Port; Device->BlockSize =3D 0; + Device->Atapi =3D Atapi; =20 // Attached the device to the Sata Port InsertTailList (&Port->Devices, &Device->Link); @@ -432,13 +446,12 @@ SataSiI3132DriverBindingStart ( return Status; } =20 - // Install Ata Pass Thru Protocol - Status =3D gBS->InstallProtocolInterface ( - &Controller, - &gEfiAtaPassThruProtocolGuid, - EFI_NATIVE_INTERFACE, - &(SataSiI3132Instance->AtaPassThruProtocol) - ); + Status =3D gBS->InstallMultipleProtocolInterfaces (&Controller, + &gEfiAtaPassThruProtoco= lGuid, + &(SataSiI3132Instance->= AtaPassThruProtocol), + &gEfiExtScsiPassThruPro= tocolGuid, + &(SataSiI3132Instance->= ExtScsiPassThru), + NULL); if (EFI_ERROR (Status)) { goto FREE_POOL; } diff --git a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132Dxe.inf b/Embedd= edPkg/Drivers/SataSiI3132Dxe/SataSiI3132Dxe.inf index 69aaab3..eb6e2bd 100644 --- a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132Dxe.inf +++ b/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132Dxe.inf @@ -35,10 +35,12 @@ SataSiI3132.c ComponentName.c SiI3132AtaPassThru.c + SiI3132ScsiPassThru.c =20 [Protocols] gEfiPciIoProtocolGuid # Consumed gEfiAtaPassThruProtocolGuid # Produced + gEfiExtScsiPassThruProtocolGuid # Produced =20 [Pcd] gEmbeddedTokenSpaceGuid.PcdSataSiI3132FeaturePMPSupport --=20 2.9.3 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri Apr 19 11:09:55 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1487889257189493.7169827196975; Thu, 23 Feb 2017 14:34:17 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id F082E82175; Thu, 23 Feb 2017 14:34:09 -0800 (PST) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id F275882152 for ; Thu, 23 Feb 2017 14:34:06 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DF115687; Thu, 23 Feb 2017 14:34:06 -0800 (PST) Received: from u200856.usa.arm.com (u201426.usa.arm.com [10.118.28.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 803943F483; Thu, 23 Feb 2017 14:34:06 -0800 (PST) X-Original-To: edk2-devel@lists.01.org From: Jeremy Linton To: edk2-devel@lists.01.org Date: Thu, 23 Feb 2017 16:33:55 -0600 Message-Id: <20170223223355.11383-9-jeremy.linton@arm.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170223223355.11383-1-jeremy.linton@arm.com> References: <20170223223355.11383-1-jeremy.linton@arm.com> Subject: [edk2] [PATCH] Platforms/ARM/Juno: Add SCSI pass-through protocol X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ard.biesheuvel@linaro.org, Steve.Capper@arm.com, ryan.harkin@linaro.org, leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Now that the SiI adapter supports ATAPI add the SCSI pass- through protocol. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton --- Platforms/ARM/Juno/ArmJuno.dsc | 3 +++ Platforms/ARM/Juno/ArmJuno.fdf | 2 ++ 2 files changed, 5 insertions(+) diff --git a/Platforms/ARM/Juno/ArmJuno.dsc b/Platforms/ARM/Juno/ArmJuno.dsc index 4080c0b..1e3e551 100644 --- a/Platforms/ARM/Juno/ArmJuno.dsc +++ b/Platforms/ARM/Juno/ArmJuno.dsc @@ -49,6 +49,7 @@ =20 # USB Requirements UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf + UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf =20 [LibraryClasses.common.SEC] PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf @@ -285,6 +286,8 @@ # SATA Controller # MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf + MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf + MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132Dxe.inf =20 # diff --git a/Platforms/ARM/Juno/ArmJuno.fdf b/Platforms/ARM/Juno/ArmJuno.fdf index beee7af..b20367e 100644 --- a/Platforms/ARM/Juno/ArmJuno.fdf +++ b/Platforms/ARM/Juno/ArmJuno.fdf @@ -166,6 +166,8 @@ FvNameGuid =3D B73FE497-B92E-416e-8326-45AD0D27= 0092 # SATA Controller # INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf + INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf + INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf INF EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132Dxe.inf =20 # --=20 2.9.3 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel