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False X-Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Aug 2019 18:12:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,445,1559545200"; d="scan'208";a="265165317" X-Received: from paagyema-desk2.amr.corp.intel.com ([10.7.159.148]) by orsmga001.jf.intel.com with ESMTP; 29 Aug 2019 18:12:28 -0700 From: "Agyeman, Prince" To: devel@edk2.groups.io Cc: Liming Gao , David Y Wei , Michael Kubacki , Nate DeSimone , Chasel Chiu Subject: [edk2-devel] [edk2-platforms] ClevoOpenBoardPkg: Update board gpios Date: Thu, 29 Aug 2019 18:12:28 -0700 Message-Id: <1b3a0b39093f7736b8f0b965f27bfbf4631224fb.1567127470.git.prince.agyeman@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,prince.agyeman@intel.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1567127550; bh=cVhG+lOZnhgL6+04OmyBa9rhV5AYvQ2TlByKNr7eo8U=; h=Cc:Date:From:Reply-To:Subject:To; b=B8oMwfQvDPko/GZo/GDexCh0J1y1P/8EoSNFyWxnWn4EU0RrB2w9kPeOuKVn2m+Ywop +GqPbfkCdSBQpblHrhNn7zXJBkMBkoK5JstDwQeExQIn/IFk0c8hzupRp+LFjKS8Srlj1 UzHHceNL2zuQo2Cy4qrvoAiBKCbj1qMIYeM= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Updated board GPIOS Cc: Liming Gao Cc: David Y Wei Cc: Michael Kubacki Cc: Nate DeSimone Cc: Chasel Chiu Signed-off-by: Agyeman Reviewed-by: Chasel Chiu Reviewed-by: Michael Kubacki Reviewed-by: Nate DeSimone --- .../Library/BoardInitLib/N1xxWUGpioTable.c | 329 +++++++++--------- 1 file changed, 165 insertions(+), 164 deletions(-) diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N= 1xxWUGpioTable.c b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardIni= tLib/N1xxWUGpioTable.c index d055fda8c3..c99b83753f 100644 --- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGp= ioTable.c +++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGp= ioTable.c @@ -20,170 +20,171 @@ SPDX-License-Identifier: BSD-2-Clause-Patent =20 GPIO_INIT_CONFIG mGpioTableN1xxWU[] =3D { -//skip for eSPI function {GPIO_SKL_LP_GPP_A0, {GpioPadModeNative1, GpioHo= stOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, Gp= ioTermNone}},//H_RCIN_N -//skip for eSPI function {GPIO_SKL_LP_GPP_A1, {GpioPadModeNative1, GpioHo= stOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, Gp= ioTermWpd20K}},//LPC_AD0_ESPI_IO0 -//skip for eSPI function {GPIO_SKL_LP_GPP_A2, {GpioPadModeNative1, GpioHo= stOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, Gp= ioTermWpd20K}},//LPC_AD1_ESPI_IO1 -//skip for eSPI function {GPIO_SKL_LP_GPP_A3, {GpioPadModeNative1, GpioHo= stOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, Gp= ioTermWpd20K}},//LPC_AD2_ESPI_IO2 -//skip for eSPI function {GPIO_SKL_LP_GPP_A4, {GpioPadModeNative1, GpioHo= stOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, Gp= ioTermWpd20K}},//LPC_AD3_ESPI_IO3 -//skip for eSPI function {GPIO_SKL_LP_GPP_A5, {GpioPadModeNative1, GpioH= ostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, G= pioTermNone}},//LPC_FRAME_ESPI_CS_N -//skip for eSPI function {GPIO_SKL_LP_GPP_A6, {GpioPadModeNative1, GpioH= ostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, G= pioTermNone}},//INT_SERIRQ - {GPIO_SKL_LP_GPP_A7, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, = GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//PM_SLP_S= 0ix_R_N -// skip for PM_CLKRUN_N {GPIO_SKL_LP_GPP_A8, {GpioPadModeNative1, GpioHos= tOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, Gpi= oTermNone}},//PM_CLKRUN_N -//skip for eSPI function {GPIO_SKL_LP_GPP_A9, {GpioPadModeNative1, Gpi= oHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, = GpioTermWpd20K}},//LPC_CLK_ESPI_CLK -// skip for PCH_CLK_PCI_TPM {GPIO_SKL_LP_GPP_A10, {GpioPadModeNative1, Gpi= oHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, = GpioTermWpd20K}},//PCH_CLK_PCI_TPM - {GPIO_SKL_LP_GPP_A11, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, = GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset, GpioTermN= one}},//EC_HID_INTR - {GPIO_SKL_LP_GPP_A12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, = GpioOutLow, GpioIntDis, GpioResumeReset, GpioTermNone}},//M.2_WWAN_GN= SS_UART_RST_N -//skip for SUS_PWR_ACK_R {GPIO_SKL_LP_GPP_A13, {GpioPadModeNative1, GpioH= ostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, G= pioTermNone}},//SUS_PWR_ACK_R -//skip for eSPI function {GPIO_SKL_LP_GPP_A14, {GpioPadModeNative1, Gpi= oHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, = GpioTermNone}},//PM_SUS_STAT_ESPI_RST_N -//skip for SUSACK_R_N {GPIO_SKL_LP_GPP_A15, {GpioPadModeNative1, GpioHost= OwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, Gpio= TermWpd20K}},//SUSACK_R_N - {GPIO_SKL_LP_GPP_A16, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn, = GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_1P8_S= EL - {GPIO_SKL_LP_GPP_A17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_PWR_E= N_N - {GPIO_SKL_LP_GPP_A18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_GP_0= _SENSOR - {GPIO_SKL_LP_GPP_A19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_GP_1= _SENSOR - {GPIO_SKL_LP_GPP_A20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_GP_2= _SENSOR - {GPIO_SKL_LP_GPP_A21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//GNSS_CHU= B_IRQ - {GPIO_SKL_LP_GPP_A22, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, = GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//FPS_SLP_N - {GPIO_SKL_LP_GPP_A23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, = GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset, GpioTermN= one}},//FPS_DRDY - {GPIO_SKL_LP_GPP_B0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//V0.85A_V= ID0 - {GPIO_SKL_LP_GPP_B1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//V0.85A_V= ID1 - {GPIO_SKL_LP_GPP_B2, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//GP_VRALE= RTB - {GPIO_SKL_LP_GPP_B3, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, = GpioOutDefault, GpioIntLevel | GpioIntApic, GpioPlatformReset, GpioTermN= one}},//TCH_PAD_INTR_R_N - {GPIO_SKL_LP_GPP_B4, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, = GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//BT_RF_KI= LL_N - {GPIO_SKL_LP_GPP_B5, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, = GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset, GpioTermN= one}},//M.2_BT_UART_WAKE_N - // {GPIO_SKL_LP_GPP_B6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//CLK_R= EQ_SLOT1_N - // {GPIO_SKL_LP_GPP_B7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//CLK_R= EQ_SLOT2_LAN_N - // {GPIO_SKL_LP_GPP_B8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//CLK_R= EQ_M.2_SSD_SLOT3_N - // {GPIO_SKL_LP_GPP_B9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//CLK_R= EQ_M.2_WIGIG_N - // {GPIO_SKL_LP_GPP_B10, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//CLK_R= EQ_M.2_WLAN_N - {GPIO_SKL_LP_GPP_B11, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//MPHY_EXT= _PWR_GATEB - {GPIO_SKL_LP_GPP_B12, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//PCH_SLP_= S0_N - {GPIO_SKL_LP_GPP_B13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//PLT_RST_N - {GPIO_SKL_LP_GPP_B14, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, = GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//TCH_PN= L_PWREN - // {GPIO_SKL_LP_GPP_B15, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutLow, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//PCH_N= FC_DFU, NOT OWNED BY BIOS - {GPIO_SKL_LP_GPP_B16, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv= , GpioOutDefault, GpioIntLevel | GpioIntSci, GpioPlatformReset, GpioTermNo= ne}},//M.2_WLAN_WIFI_WAKE_N - {GPIO_SKL_LP_GPP_B17, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv= , GpioOutDefault, GpioIntEdge | GpioIntSci, GpioPlatformReset, GpioTermWpu= 20K}},//TBT_CIO_PLUG_EVENT_N - {GPIO_SKL_LP_GPP_B18, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv= , GpioOutDefault, GpioIntLevel | GpioIntSci, GpioPlatformReset, GpioTermWp= u20K}},//PCH_SLOT1_WAKE_N - {GPIO_SKL_LP_GPP_B19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//FPS_GSP= I1_CS_R1_N - {GPIO_SKL_LP_GPP_B20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//FPS_GS= PI1_CLK_R1 - {GPIO_SKL_LP_GPP_B21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//FPS_GS= PI1_MISO_R1 - {GPIO_SKL_LP_GPP_B22, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//FPS_GS= PI1_MOSI_R1 - {GPIO_SKL_LP_GPP_B23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, = GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//DISCRE= TE_GNSS_RESET_N - {GPIO_SKL_LP_GPP_C0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SMB_CLK - {GPIO_SKL_LP_GPP_C1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//SMB_DA= TA - {GPIO_SKL_LP_GPP_C2, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, = GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//SKIN_T= HRM_SNSR_ALERT_N - {GPIO_SKL_LP_GPP_C3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SML0_CLK - {GPIO_SKL_LP_GPP_C4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SML0_DATA - {GPIO_SKL_LP_GPP_C5, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirInInv= , GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset, GpioTermWp= d20K}},//M.2_WIGIG_WAKE_N - {GPIO_SKL_LP_GPP_C6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SML1_CLK= , OWNED BY ME - {GPIO_SKL_LP_GPP_C7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//SML1_D= ATA, OWNED BY ME - {GPIO_SKL_LP_GPP_C8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO= _UART0_RXD - {GPIO_SKL_LP_GPP_C9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO= _UART0_TXD - {GPIO_SKL_LP_GPP_C10, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO= _UART0_RTS_N - {GPIO_SKL_LP_GPP_C11, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO= _UART0_CTS_N - {GPIO_SKL_LP_GPP_C12, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO= _UART1_ISH_UART1_RXD - {GPIO_SKL_LP_GPP_C13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO= _UART1_ISH_UART1_TXD - {GPIO_SKL_LP_GPP_C14, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO= _UART1_ISH_UART1_RTS_N - {GPIO_SKL_LP_GPP_C15, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO= _UART1_ISH_UART1_CTS_N - {GPIO_SKL_LP_GPP_C16, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO= _I2C0_SDA - {GPIO_SKL_LP_GPP_C17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO= _I2C0_SCL - {GPIO_SKL_LP_GPP_C18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO= _I2C1_SDA - {GPIO_SKL_LP_GPP_C19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO= _I2C1_SCL - {GPIO_SKL_LP_GPP_C20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO= _UART2_RXD - {GPIO_SKL_LP_GPP_C21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO= _UART2_TXD - {GPIO_SKL_LP_GPP_C22, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO= _UART2_RTS_N - {GPIO_SKL_LP_GPP_C23, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO= _UART2_CTS_N - {GPIO_SKL_LP_GPP_D0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SPI1_TCH= PNL_CS_N - {GPIO_SKL_LP_GPP_D1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SPI1_TCH= PNL_CLK - {GPIO_SKL_LP_GPP_D2, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SPI1_TCH= PNL_MISO - {GPIO_SKL_LP_GPP_D3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SPI1_TCH= PNL_MOSI - {GPIO_SKL_LP_GPP_D4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//CSI2_FLA= SH_STROBE - {GPIO_SKL_LP_GPP_D5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_I2C0= _SDA - {GPIO_SKL_LP_GPP_D6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_I2C0= _SCL - {GPIO_SKL_LP_GPP_D7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_I2C1= _SDA - {GPIO_SKL_LP_GPP_D8, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, = GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_I2C1= _SCL/SB_BLON - {GPIO_SKL_LP_GPP_D9, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, = GpioOutDefault, GpioIntLevel | GpioIntDis, GpioHostDeepReset, GpioTermNo= ne}},//HOME_BTN - {GPIO_SKL_LP_GPP_D10, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, = GpioOutDefault, GpioIntLevel | GpioIntDis, GpioHostDeepReset, GpioTermNo= ne}},//SCREEN_LOCK_PCH - {GPIO_SKL_LP_GPP_D11, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, = GpioOutDefault, GpioIntLevel | GpioIntDis, GpioHostDeepReset, GpioTermNo= ne}},//VOL_UP_PCH - {GPIO_SKL_LP_GPP_D12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, = GpioOutDefault, GpioIntLevel | GpioIntDis, GpioHostDeepReset, GpioTermNo= ne}},//VOL_DOWN_PCH - {GPIO_SKL_LP_GPP_D13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_UART= 0_RXD_SML0B_DATA - {GPIO_SKL_LP_GPP_D14, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_UART= 0_TXD_SML0B_CLK - {GPIO_SKL_LP_GPP_D15, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_UART= 0_RTS_N - {GPIO_SKL_LP_GPP_D16, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_UART= 0_CTS_SML0B_ALERT_N - {GPIO_SKL_LP_GPP_D17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//DMIC_CLK= _1 - {GPIO_SKL_LP_GPP_D18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//DMIC_D= ATA_1 - {GPIO_SKL_LP_GPP_D19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//DMIC_CLK= _0 - {GPIO_SKL_LP_GPP_D20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//DMIC_D= ATA_0 - {GPIO_SKL_LP_GPP_D21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SPI1_TCH= PNL_IO2 - {GPIO_SKL_LP_GPP_D22, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SPI1_TCH= PNL_IO3 - {GPIO_SKL_LP_GPP_D23, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SSP_MCLK - {GPIO_SKL_LP_GPP_E0, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirInInv= , GpioOutDefault, GpioIntEdge | GpioIntApic, GpioHostDeepReset, GpioTermNo= ne}},//SPI_TPM_HDR_IRQ_N - {GPIO_SKL_LP_GPP_E1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SATA_ODD= _PRSNT_N - {GPIO_SKL_LP_GPP_E2, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntLvlEdgDis | GpioIntApic, GpioHostDeepReset, GpioT= ermNone}},//M.2_SSD_SATA2_PCIE3_DET_N - {GPIO_SKL_LP_GPP_E3, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, = GpioOutHigh, GpioIntDis, GpioResumeReset, GpioTermNone}},//EINK_SSR_D= FU_N - {GPIO_SKL_LP_GPP_E4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//PCH_NFC_= RESET - {GPIO_SKL_LP_GPP_E5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SATA1_PH= YSLP1_DIRECT_R - // {GPIO_SKL_LP_GPP_E6, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutLow, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SATA2= _PHYSLP2_M.2SSD_R, NOT OWNED BY BIOS - {GPIO_SKL_LP_GPP_E8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//PCH_SATA= _LED_N - {GPIO_SKL_LP_GPP_E9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//USB_OC_0= _WP1_OTG_N - {GPIO_SKL_LP_GPP_E10, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//USB_OC_1= _WP4_N - {GPIO_SKL_LP_GPP_E11, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//USB_OC_2= _WP2_WP3_WP5_R_N - // {GPIO_SKL_LP_GPP_E12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn= , GpioOutDefault, GpioIntLevel | GpioIntDis, GpioHostDeepReset, GpioTer= mNone}},//PCH_NFC_IRQ, NOT OWNED BY BIOS - {GPIO_SKL_LP_GPP_E13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//DDI1_HPD= _Q - {GPIO_SKL_LP_GPP_E14, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//DDI2_HPD= _Q - {GPIO_SKL_LP_GPP_E15, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv= , GpioOutDefault, GpioIntEdge | GpioIntSmi, GpioHostDeepReset, GpioTermNon= e}},//SMC_EXTSMI_R_N - {GPIO_SKL_LP_GPP_E16, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv= , GpioOutDefault, GpioIntLevel | GpioIntSci, GpioPlatformReset, GpioTermNo= ne}},//SMC_RUNTIME_SCI_R_N - {GPIO_SKL_LP_GPP_E17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EDP_HPD - {GPIO_SKL_LP_GPP_E18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//DDI1_CTR= L_CLK - {GPIO_SKL_LP_GPP_E19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//DDI1_C= TRL_DATA - {GPIO_SKL_LP_GPP_E20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//DDI2_CTR= L_CLK - {GPIO_SKL_LP_GPP_E21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//DDI2_C= TRL_DATA - {GPIO_SKL_LP_GPP_E22, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirInInv= , GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset, GpioTermN= one}},//PCH_CODEC_IRQ - {GPIO_SKL_LP_GPP_E23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, = GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//TCH_PN= L_RST_N - {GPIO_SKL_LP_GPP_F0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SSP2_SCLK - {GPIO_SKL_LP_GPP_F1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SSP2_SFRM - {GPIO_SKL_LP_GPP_F2, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SSP2_TXD - {GPIO_SKL_LP_GPP_F3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SSP2_RXD - {GPIO_SKL_LP_GPP_F4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTolerance1v8 | GpioTer= mNone}},//SERIALIO_I2C2_SDA - {GPIO_SKL_LP_GPP_F5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTolerance1v8 | GpioTer= mNone}},//SERIALIO_I2C2_SCL - {GPIO_SKL_LP_GPP_F6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTolerance1v8 | GpioTer= mNone}},//SERIALIO_I2C3_SDA - {GPIO_SKL_LP_GPP_F7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTolerance1v8 | GpioTer= mNone}},//SERIALIO_I2C3_SCL - {GPIO_SKL_LP_GPP_F8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTolerance1v8 | GpioTer= mNone}},//SERIALIO_I2C4_SDA - {GPIO_SKL_LP_GPP_F9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTolerance1v8 | GpioTer= mNone}},//SERIALIO_I2C4_SCL - {GPIO_SKL_LP_GPP_F10, {GpioPadModeNative2, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTolerance1v8 | GpioTer= mNone}},//SERIALIO_I2C5_ISH_12C2_SDA - {GPIO_SKL_LP_GPP_F11, {GpioPadModeNative2, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTolerance1v8 | GpioTer= mNone}},//SERIALIO_I2C5_ISH_12C2_SCL - {GPIO_SKL_LP_GPP_F12, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_CMD - {GPIO_SKL_LP_GPP_F13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_DAT= A0 - {GPIO_SKL_LP_GPP_F14, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_DAT= A1 - {GPIO_SKL_LP_GPP_F15, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_DAT= A2 - {GPIO_SKL_LP_GPP_F16, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_DAT= A3 - {GPIO_SKL_LP_GPP_F17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_DAT= A4 - {GPIO_SKL_LP_GPP_F18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_DAT= A5 - {GPIO_SKL_LP_GPP_F19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_DAT= A6 - {GPIO_SKL_LP_GPP_F20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_DAT= A7 - {GPIO_SKL_LP_GPP_F21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_RCLK - {GPIO_SKL_LP_GPP_F22, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_CLK - {GPIO_SKL_LP_GPP_F23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, = GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset, GpioTermN= one}},//PCH_M.2_WWAN_UIM_SIM_DET - {GPIO_SKL_LP_GPP_G0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_CMD - {GPIO_SKL_LP_GPP_G1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_DATA0 - {GPIO_SKL_LP_GPP_G2, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_DATA1 - {GPIO_SKL_LP_GPP_G3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_DATA2 - {GPIO_SKL_LP_GPP_G4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_DATA3 - {GPIO_SKL_LP_GPP_G5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_CDB - {GPIO_SKL_LP_GPP_G6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_CLK - {GPIO_SKL_LP_GPP_G7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,= GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_WP - {GPIO_SKL_LP_GPD0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, = GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//PM_BATLOW_R_N - {GPIO_SKL_LP_GPD1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, = GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//AC_PRESENT_R - {GPIO_SKL_LP_GPD2, {GpioPadModeNative1, GpioHostOwnAcpi, GpioDirIn, = GpioOutDefault, GpioIntLevel | GpioIntSci, GpioDswReset, GpioTermNone}},/= /LANWAKE_SMC_WAKE_SCI_N - {GPIO_SKL_LP_GPD3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, = GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermWpu20K}},//PM_PWRBTN_R_N - {GPIO_SKL_LP_GPD4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, = GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//SLP_S3_R_N - {GPIO_SKL_LP_GPD5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, = GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//SLP_S4_R_N - {GPIO_SKL_LP_GPD6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, = GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//SLP_M_R_N - {GPIO_SKL_LP_GPD7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, = GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//USB_WAKEOUT_IN= TRUDET_N - {GPIO_SKL_LP_GPD8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, = GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//SUS_CLK - {GPIO_SKL_LP_GPD9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, = GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//PCH_SLP_WLAN_N - {GPIO_SKL_LP_GPD10, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, = GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//SLP_S5_R_N - {GPIO_SKL_LP_GPD11, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, = GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//PM_LANPHY_ENAB= LE - {END_OF_GPIO_TABLE, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirNone, = GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//Marking End of= Table + {GPIO_SKL_LP_GPP_A0, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirIn= , GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //RCI= NB_TIME_SYNC_1 + {GPIO_SKL_LP_GPP_A1, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirIn= Out, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNative}}, //L= AD_0_ESPI_IO_0 + {GPIO_SKL_LP_GPP_A2, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirIn= Out, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //LAD= _1_ESPI_IO_1 + {GPIO_SKL_LP_GPP_A3, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirIn= Out, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNative}}, //L= AD_2_ESPI_IO_2 + {GPIO_SKL_LP_GPP_A4, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirIn= Out, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //LAD= _3_ESPI_IO_3 + {GPIO_SKL_LP_GPP_A5, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //LFR= AMEB_ESPI_CSB + {GPIO_SKL_LP_GPP_A6, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirIn= Out, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SER= IRQ + {GPIO_SKL_LP_GPP_A7, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn= , GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //PIR= QAB_GSPI0_CS1B + {GPIO_SKL_LP_GPP_A8, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CLK= RUNB + {GPIO_SKL_LP_GPP_A9, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}}, //C= LKOUT_LPC_0_ESPI_CLK + {GPIO_SKL_LP_GPP_A10, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}}, //C= LKOUT_LPC_1 + {GPIO_SKL_LP_GPP_A11, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpu20K}}, //P= MEB_GSPI1_CS1B + {GPIO_SKL_LP_GPP_A12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //BM_= BUSYB_ISH_GP_6 + {GPIO_SKL_LP_GPP_A13, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SUS= WARNB_SUSPWRDNACK + {GPIO_SKL_LP_GPP_A14, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SUS= _STATB_ESPI_RESETB + {GPIO_SKL_LP_GPP_A15, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirIn= , GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpu20K}}, //S= USACKB + {GPIO_SKL_LP_GPP_A16, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SD_= 1P8_SEL + {GPIO_SKL_LP_GPP_A17, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SD_= VDD1_PWR_EN_B_ISH_GP_7 + {GPIO_SKL_LP_GPP_A18, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH= _GP_0 + {GPIO_SKL_LP_GPP_A19, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirOu= t, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH= _GP_1 + {GPIO_SKL_LP_GPP_A20, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH= _GP_2 + {GPIO_SKL_LP_GPP_A21, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioPlatformReset, GpioTermNone}}, //ISH= _GP_3 + {GPIO_SKL_LP_GPP_A22, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioResumeReset, GpioTermNone}}, //ISH= _GP_4 + {GPIO_SKL_LP_GPP_A23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioResumeReset, GpioTermNone}}, //ISH= _GP_5 + {GPIO_SKL_LP_GPP_B0, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //COR= E_VID_0 + {GPIO_SKL_LP_GPP_B1, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //COR= E_VID_1 + {GPIO_SKL_LP_GPP_B2, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //VRA= LERTB + {GPIO_SKL_LP_GPP_B3, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CPU= _GP_2 + {GPIO_SKL_LP_GPP_B4, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CPU= _GP_3 + {GPIO_SKL_LP_GPP_B5, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SRC= CLKREQB_0 + {GPIO_SKL_LP_GPP_B6, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SRC= CLKREQB_1 + {GPIO_SKL_LP_GPP_B7, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SRC= CLKREQB_2 + {GPIO_SKL_LP_GPP_B8, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SRC= CLKREQB_3 + {GPIO_SKL_LP_GPP_B9, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutLow, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SRC= CLKREQB_4 + {GPIO_SKL_LP_GPP_B10, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SRC= CLKREQB_5 + {GPIO_SKL_LP_GPP_B11, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EXT= _PWR_GATEB + {GPIO_SKL_LP_GPP_B12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SLP= _S0B + {GPIO_SKL_LP_GPP_B13, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //PLT= RSTB + {GPIO_SKL_LP_GPP_B14, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}}, //S= PKR + {GPIO_SKL_LP_GPP_B15, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GSP= I0_CS0B + {GPIO_SKL_LP_GPP_B16, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GSP= I0_CLK + {GPIO_SKL_LP_GPP_B17, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GSP= I0_MISO + {GPIO_SKL_LP_GPP_B18, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpu20K}}, //G= SPI0_MOSI + {GPIO_SKL_LP_GPP_B19, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GSP= I1_CS0B + {GPIO_SKL_LP_GPP_B20, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GSP= I1_CLK_NFC_CLK + {GPIO_SKL_LP_GPP_B21, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GSP= I1_MISO_NFC_CLKREQ + {GPIO_SKL_LP_GPP_B22, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}}, //G= SPI1_MOSI + {GPIO_SKL_LP_GPP_B23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SML= 1ALERTB_PCHHOTB + {GPIO_SKL_LP_GPP_G0, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GPP= C_G_0_SD3_CMD + {GPIO_SKL_LP_GPP_G1, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn= , GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GPP= C_G_1_SD3_D0_SD4_RCLK_P + {GPIO_SKL_LP_GPP_G2, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GPP= C_G_2_SD3_D1_SD4_RCLK_N + {GPIO_SKL_LP_GPP_G3, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GPP= C_G_3_SD3_D2 + {GPIO_SKL_LP_GPP_G4, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GPP= C_G_4_SD3_D3 + {GPIO_SKL_LP_GPP_G5, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GPP= C_G_5_SD3_CDB + {GPIO_SKL_LP_GPP_G6, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GPP= C_G_6_SD3_CLK + {GPIO_SKL_LP_GPP_G7, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GPP= C_G_7_SD3_WP + {GPIO_SKL_LP_GPP_D0, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SPI= 1_CSB_BK_0 + {GPIO_SKL_LP_GPP_D1, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SPI= 1_CLK_BK_1 + {GPIO_SKL_LP_GPP_D2, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SPI= 1_MISO_IO_1_BK_2 + {GPIO_SKL_LP_GPP_D3, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SPI= 1_MOSI_IO_0_BK_3 + {GPIO_SKL_LP_GPP_D4, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //IMG= CLKOUT_0_BK_4 + {GPIO_SKL_LP_GPP_D5, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH= _I2C0_SDA + {GPIO_SKL_LP_GPP_D6, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH= _I2C0_SCL + {GPIO_SKL_LP_GPP_D7, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH= _I2C1_SDA + {GPIO_SKL_LP_GPP_D8, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH= _I2C1_SCL + {GPIO_SKL_LP_GPP_D9, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH= _SPI_CSB + {GPIO_SKL_LP_GPP_D10, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH= _SPI_CLK + {GPIO_SKL_LP_GPP_D11, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH= _SPI_MISO_GP_BSSB_CLK + {GPIO_SKL_LP_GPP_D12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH= _SPI_MOSI_GP_BSSB_DI + {GPIO_SKL_LP_GPP_D13, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH= _UART0_RXD_SML0BDATA + {GPIO_SKL_LP_GPP_D14, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH= _UART0_TXD_SML0BCLK + {GPIO_SKL_LP_GPP_D15, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH= _UART0_RTSB_GSPI2_CS1B + {GPIO_SKL_LP_GPP_D16, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH= _UART0_CTSB_SML0BALERTB + {GPIO_SKL_LP_GPP_D17, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DMI= C_CLK_1_SNDW3_CLK + {GPIO_SKL_LP_GPP_D18, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DMI= C_DATA_1_SNDW3_DATA + {GPIO_SKL_LP_GPP_D19, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DMI= C_CLK_0_SNDW4_CLK + {GPIO_SKL_LP_GPP_D20, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DMI= C_DATA_0_SNDW4_DATA + {GPIO_SKL_LP_GPP_D21, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn= , GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SPI= 1_IO_2 + {GPIO_SKL_LP_GPP_D22, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SPI= 1_IO_3 + {GPIO_SKL_LP_GPP_D23, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SSP= _MCLK + {GPIO_SKL_LP_GPP_F0, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV= _GNSS_PA_BLANKING + {GPIO_SKL_LP_GPP_F1, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV= _GNSS_FTA + {GPIO_SKL_LP_GPP_F2, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV= _GNSS_SYSCK + {GPIO_SKL_LP_GPP_F3, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, // + {GPIO_SKL_LP_GPP_F4, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV= _BRI_DT_UART0_RTSB + {GPIO_SKL_LP_GPP_F5, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV= _BRI_RSP_UART0_RXD + {GPIO_SKL_LP_GPP_F6, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV= _RGI_DT_UART0_TXD + {GPIO_SKL_LP_GPP_F7, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV= _RGI_RSP_UART0_CTSB + {GPIO_SKL_LP_GPP_F8, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV= _MFUART2_RXD + {GPIO_SKL_LP_GPP_F9, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV= _MFUART2_TXD + {GPIO_SKL_LP_GPP_F10, {GpioPadModeNative2, GpioHostOwnDefault, GpioDirDe= fault, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, // + {GPIO_SKL_LP_GPP_F11, {GpioPadModeNative2, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMM= C_CMD + {GPIO_SKL_LP_GPP_F12, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMM= C_DATA0 + {GPIO_SKL_LP_GPP_F13, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMM= C_DATA1 + {GPIO_SKL_LP_GPP_F14, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMM= C_DATA2 + {GPIO_SKL_LP_GPP_F15, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMM= C_DATA3 + {GPIO_SKL_LP_GPP_F16, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMM= C_DATA4 + {GPIO_SKL_LP_GPP_F17, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMM= C_DATA5 + {GPIO_SKL_LP_GPP_F18, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMM= C_DATA6 + {GPIO_SKL_LP_GPP_F19, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMM= C_DATA7 + {GPIO_SKL_LP_GPP_F20, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMM= C_RCLK + {GPIO_SKL_LP_GPP_F21, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMM= C_CLK + {GPIO_SKL_LP_GPP_F22, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMM= C_RESETB + {GPIO_SKL_LP_GPP_F23, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirIn= , GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset, GpioT= ermNone}}, //A4WP_PRESENT + {GPIO_SKL_LP_GPD0, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, //BATL= OWB + {GPIO_SKL_LP_GPD1, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNative}}, //AC= PRESENT + {GPIO_SKL_LP_GPD2, {GpioPadModeNative1, GpioHostOwnAcpi, GpioDirIn= Inv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioResetDefault, GpioTer= mNone}}, //LAN_WAKEB + {GPIO_SKL_LP_GPD3, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermWpu20K}}, //PW= RBTNB + {GPIO_SKL_LP_GPD4, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, //SLP_= S3B + {GPIO_SKL_LP_GPD5, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, //SLP_= S4B + {GPIO_SKL_LP_GPD6, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, //SLP_= AB + {GPIO_SKL_LP_GPD7, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, // + {GPIO_SKL_LP_GPD8, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, //SUSC= LK + {GPIO_SKL_LP_GPD9, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, //SLP_= WLANB + {GPIO_SKL_LP_GPD10, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, //SLP_= S5B + {GPIO_SKL_LP_GPD11, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirIn= , GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, //LANP= HYPC + {GPIO_SKL_LP_GPP_C0, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SMB= CLK + {GPIO_SKL_LP_GPP_C1, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SMB= DATA + {GPIO_SKL_LP_GPP_C2, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}}, //S= MBALERTB + {GPIO_SKL_LP_GPP_C3, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SML= 0CLK + {GPIO_SKL_LP_GPP_C4, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SML= 0DATA + {GPIO_SKL_LP_GPP_C5, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SML= 0ALERTB + {GPIO_SKL_LP_GPP_C6, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SML= 1CLK + {GPIO_SKL_LP_GPP_C7, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SML= 1DATA + {GPIO_SKL_LP_GPP_C8, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UAR= T0_RXD + {GPIO_SKL_LP_GPP_C9, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UAR= T0_TXD + {GPIO_SKL_LP_GPP_C10, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UAR= T0_RTSB + {GPIO_SKL_LP_GPP_C11, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UAR= T0_CTSB + {GPIO_SKL_LP_GPP_C12, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UAR= T1_RXD_ISH_UART1_RXD + {GPIO_SKL_LP_GPP_C13, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirIn= Inv, GpioOutDefault, GpioIntEdge | GpioIntSci, GpioPlatformReset, GpioTer= mNone}}, //UART1_TXD_ISH_UART1_TXD + {GPIO_SKL_LP_GPP_C14, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UAR= T1_RTSB_ISH_UART1_RTSB + {GPIO_SKL_LP_GPP_C15, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UAR= T1_CTSB_ISH_UART1_CTSB + {GPIO_SKL_LP_GPP_C16, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutLow, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //I2C= 0_SDA + {GPIO_SKL_LP_GPP_C17, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //I2C= 0_SCL + {GPIO_SKL_LP_GPP_C18, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //I2C= 1_SDA + {GPIO_SKL_LP_GPP_C19, GpioPadModeGpio, GpioHostOwnAcpi, GpioDirIn= Inv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioHostDeepReset, GpioTe= rmNone}, //I2C1_SCL + {GPIO_SKL_LP_GPP_C20, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutLow, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UAR= T2_RXD + {GPIO_SKL_LP_GPP_C21, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UAR= T2_TXD + {GPIO_SKL_LP_GPP_C22, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UAR= T2_RTSB + {GPIO_SKL_LP_GPP_C23, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UAR= T2_CTSB + {GPIO_SKL_LP_GPP_E0, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn= , GpioOutDefault, GpioIntEdge | GpioIntApic, GpioHostDeepReset, GpioTe= rmWpd20K}}, //SATAXPCIE_0_SATAGP_0 + {GPIO_SKL_LP_GPP_E1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SAT= AXPCIE_1_SATAGP_1 + {GPIO_SKL_LP_GPP_E2, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn= , GpioOutLow, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SAT= AXPCIE_2_SATAGP_2 + {GPIO_SKL_LP_GPP_E3, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn= Out, GpioOutLow, GpioIntLevel | GpioIntDis, GpioHostDeepReset, GpioTe= rmNone}}, //CPU_GP_0 + {GPIO_SKL_LP_GPP_E4, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioResumeReset, GpioTermNone}}, //SATA_= DEVSLP_0 + {GPIO_SKL_LP_GPP_E5, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioResumeReset, GpioTermNone}}, //SATA_= DEVSLP_1 + {GPIO_SKL_LP_GPP_E6, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SAT= A_DEVSLP_2 + {GPIO_SKL_LP_GPP_E7, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn= , GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CPU= _GP_1 + {GPIO_SKL_LP_GPP_E8, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SAT= A_LEDB + {GPIO_SKL_LP_GPP_E9, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //USB= 2_OCB_0_GP_BSSB_CLk + {GPIO_SKL_LP_GPP_E10, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //USB= 2_OCB_1_GP_BSSB_DI + {GPIO_SKL_LP_GPP_E11, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //USB= 2_OCB_2 + {GPIO_SKL_LP_GPP_E12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //USB= 2_OCB_3 + {GPIO_SKL_LP_GPP_E13, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DDS= P_HPD_0_DISP_MISC_0 + {GPIO_SKL_LP_GPP_E14, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DDS= P_HPD_1_DISP_MISC_1 + {GPIO_SKL_LP_GPP_E15, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirIn= Inv, GpioOutDefault, GpioIntEdge | GpioIntSmi, GpioHostDeepReset, GpioTer= mNone}}, //DDSP_HPD_2_DISP_MISC_2 + {GPIO_SKL_LP_GPP_E16, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirIn= Inv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioPlatformReset, GpioTe= rmNone}}, //DDSP_HPD_3_DISP_MISC_3 + {GPIO_SKL_LP_GPP_E17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EDP= _HPD_DISP_MISC_4 + {GPIO_SKL_LP_GPP_E18, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDe= fault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DDP= B_CTRLCLK + {GPIO_SKL_LP_GPP_E19, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DDP= B_CTRLDATA + {GPIO_SKL_LP_GPP_E20, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DDP= C_CTRLCLK + {GPIO_SKL_LP_GPP_E21, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DDP= C_CTRLDATA + {GPIO_SKL_LP_GPP_E22, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn= Out, GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset, GpioT= ermNone}}, //DDPD_CTRLCLK + {GPIO_SKL_LP_GPP_E23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOu= t, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DDP= D_CTRLDATA + {END_OF_GPIO_TABLE, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirNo= ne, GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//Marking = End of Table }; =20 UINT16 mGpioTableN1xxWUSize =3D sizeof (mGpioTableN1xxWU) / sizeof (GPIO_I= NIT_CONFIG) - 1; --=20 2.19.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#46606): https://edk2.groups.io/g/devel/message/46606 Mute This Topic: https://groups.io/mt/33075157/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-