From nobody Tue Feb 10 11:33:23 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+65970+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+65970+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=oss.nxp.com ARC-Seal: i=1; a=rsa-sha256; t=1602066948; cv=none; d=zohomail.com; s=zohoarc; b=G2PGwoYSU4pTwt9MOwVhagvUDG7FxtaE2flt6Kbh7oSOuFOPWNTRg/6vUXR0Ky6lMh1Qubq1EJ3fJmFHSJu971wLwfnXmVB0sGV5/h8ko4qC/A0VUPtihr2kDhsa+J8rKdDDznsUzLslxG/gmGy7hnY2hPSD9jKIYimX8mGwsfE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1602066948; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=7LdEQq9I8e3+FqyLs0PnzAGYG4POpn24gQhXbjoxj0Q=; b=DnhdcLE+HYHdxCxo3bXzhbXHeCzzCRm6fCzeLw0kbIUkqI+nLO/9ru1YPsNz4k9FsT4jte88P1yCEClO+2Bn0MpLJzrlDX9Lcsk7SbQ8bBR0rUCcTnlRCI6WWFW/wamfKeHEGHWZXQ5Hkr3pJF6VZ/f1TY0+Dwqa2CEFSh2UHsk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+65970+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1602066948152218.92689007162278; Wed, 7 Oct 2020 03:35:48 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id HyZQYY1788612xFYHmgjRD4N; Wed, 07 Oct 2020 03:35:47 -0700 X-Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by mx.groups.io with SMTP id smtpd.web11.9960.1602066567428480038 for ; Wed, 07 Oct 2020 03:29:27 -0700 X-Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id E23361A00C6; Wed, 7 Oct 2020 12:29:25 +0200 (CEST) X-Received: from inv0113.in-blr01.nxp.com (inv0113.in-blr01.nxp.com [165.114.116.118]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 85C631A0114; Wed, 7 Oct 2020 12:29:25 +0200 (CEST) X-Received: from uefi-OptiPlex-790.ap.freescale.net (unknown [10.232.132.78]) by inv0113.in-blr01.nxp.com (Postfix) with ESMTP id 1A17E332; Wed, 7 Oct 2020 15:59:24 +0530 (IST) From: Meenakshi Aggarwal To: ard.biesheuvel@arm.com, leif@nuviainc.com, michael.d.kinney@intel.com, devel@edk2.groups.io Cc: v.sethi@nxp.com, Meenakshi Aggarwal , Meenakshi Aggarwal Subject: [edk2-devel] [edk2-platforms v2 2/6] Platform/NXP/LS1046aFrwyPkg: MUX changes for USB Date: Wed, 7 Oct 2020 21:40:37 +0530 Message-Id: <1602087041-8009-3-git-send-email-meenakshi.aggarwal@oss.nxp.com> In-Reply-To: <1602087041-8009-1-git-send-email-meenakshi.aggarwal@oss.nxp.com> References: <1600187343-18732-1-git-send-email-meenakshi.aggarwal@oss.nxp.com> <1602087041-8009-1-git-send-email-meenakshi.aggarwal@oss.nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,meenakshi.aggarwal@oss.nxp.com X-Gm-Message-State: OoecwEeAn00HSayxGS5FUPeex1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1602066947; bh=u4+YJHTc4sjMBtAwBsdD5QGuMMzwQARLNm4Dh1TxU7Q=; h=Cc:Date:From:Reply-To:Subject:To; b=VzSzyLPY+UcjErTzFvuWwgQeXpfXJBgT2os1gg4DsCn596ZEOfX65A38FQhipR0SUXM oRkrk1FmZCLZcjt9a/fKVCVxv7Jsa54xSc+sBqSoDpcN4cn6sQmKOvkvqPR2UBTKI8yG9 OmUCL8UHGKUsrpVPEqBxwQf8r6VjN/w7Pkk= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Second USB controller is muxed with I2c through GPIO. Setting GPIO bit to configure for second USB controller. Co-authored-by: Pramod Kumar Signed-off-by: Meenakshi Aggarwal Reviewed-by: Leif Lindholm --- Silicon/NXP/NxpQoriqLs.dec | 8 ++++++++ Silicon/NXP/LS1046A/LS1046A.dsc.inc | 5 +++++ Silicon/NXP/NxpQoriqLs.dsc.inc | 2 ++ .../Library/ArmPlatformLib/ArmPlatformLib.inf | 1 + .../Library/ArmPlatformLib/ArmPlatformLib.c | 21 +++++++++++++++++= ++++ 5 files changed, 37 insertions(+) diff --git a/Silicon/NXP/NxpQoriqLs.dec b/Silicon/NXP/NxpQoriqLs.dec index 0c3608696569..3a568c0437e7 100644 --- a/Silicon/NXP/NxpQoriqLs.dec +++ b/Silicon/NXP/NxpQoriqLs.dec @@ -29,6 +29,7 @@ [PcdsFeatureFlag] gNxpQoriqLsTokenSpaceGuid.PcdDcfgBigEndian|FALSE|BOOLEAN|0x00000316 gNxpQoriqLsTokenSpaceGuid.PcdPciLutBigEndian|FALSE|BOOLEAN|0x00000317 gNxpQoriqLsTokenSpaceGuid.PcdSataErratumA009185|FALSE|BOOLEAN|0x00000318 + gNxpQoriqLsTokenSpaceGuid.PcdGpioControllerBigEndian|FALSE|BOOLEAN|0x000= 00319 =20 [PcdsFixedAtBuild.common] # Pcds for PCI Express @@ -48,6 +49,13 @@ [PcdsFixedAtBuild.common] gNxpQoriqLsTokenSpaceGuid.PcdSataSize|0x0|UINT32|0x00000351 gNxpQoriqLsTokenSpaceGuid.PcdNumSataController|0x0|UINT32|0x00000352 =20 + # + # Pcds for Gpio + # + gNxpQoriqLsTokenSpaceGuid.PcdNumGpioController|0|UINT32|0x00000355 + gNxpQoriqLsTokenSpaceGuid.PcdGpioModuleBaseAddress|0|UINT64|0x00000356 + gNxpQoriqLsTokenSpaceGuid.PcdGpioControllerOffset|0|UINT64|0x00000357 + [PcdsDynamic.common] gNxpQoriqLsTokenSpaceGuid.PcdPciCfgShiftEnable|FALSE|BOOLEAN|0x00000600 gNxpQoriqLsTokenSpaceGuid.PcdPciLsGen4Ctrl|FALSE|BOOLEAN|0x00000601 diff --git a/Silicon/NXP/LS1046A/LS1046A.dsc.inc b/Silicon/NXP/LS1046A/LS10= 46A.dsc.inc index dbe7f408fce9..db110553605f 100644 --- a/Silicon/NXP/LS1046A/LS1046A.dsc.inc +++ b/Silicon/NXP/LS1046A/LS1046A.dsc.inc @@ -27,9 +27,14 @@ [PcdsDynamicDefault.common] =20 [PcdsFixedAtBuild.common] gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x021c0500 + gNxpQoriqLsTokenSpaceGuid.PcdNumGpioController|0x04 + gNxpQoriqLsTokenSpaceGuid.PcdGpioModuleBaseAddress|0x02300000 + gNxpQoriqLsTokenSpaceGuid.PcdGpioControllerOffset|0x10000 + =20 [PcdsFeatureFlag] gNxpQoriqLsTokenSpaceGuid.PcdDcfgBigEndian|TRUE + gNxpQoriqLsTokenSpaceGuid.PcdGpioControllerBigEndian|TRUE =20 ##########################################################################= ###### # diff --git a/Silicon/NXP/NxpQoriqLs.dsc.inc b/Silicon/NXP/NxpQoriqLs.dsc.inc index fc600de01d74..21c87df73220 100644 --- a/Silicon/NXP/NxpQoriqLs.dsc.inc +++ b/Silicon/NXP/NxpQoriqLs.dsc.inc @@ -103,6 +103,8 @@ [LibraryClasses.common] MemoryInitPeiLib|Silicon/NXP/Library/MemoryInitPeiLib/MemoryInitPeiLib.i= nf UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf =20 + GpioLib|Silicon/NXP/Library/GpioLib/GpioLib.inf + [LibraryClasses.common.SEC] PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsB= aseLib.inf diff --git a/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatform= Lib.inf b/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib= .inf index 7802696bf39b..2e755842a714 100644 --- a/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.inf +++ b/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.inf @@ -25,6 +25,7 @@ [Packages] [LibraryClasses] ArmLib DebugLib + GpioLib SocLib =20 [Sources.common] diff --git a/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatform= Lib.c b/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.c index e1f20da09337..ef404991add8 100644 --- a/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.c +++ b/Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPlatformLib.c @@ -8,11 +8,18 @@ =20 #include #include +#include #include =20 #include #include =20 +/** + Documents use bit number as per Power PC notation, + so need to convert it to support ARMv8 architecture +**/ +#define USB2_MUX_SEL_GPIO (31 - 23) + ARM_CORE_INFO mLS1046aMpCoreInfoTable[] =3D { { // Cluster 0, Core 0 @@ -89,6 +96,19 @@ NxpPlatformGetClock( } =20 /** + FRWY-LS1046A GPIO 23 use for USB2 + mux seclection +**/ +STATIC VOID MuxSelectUsb2 (VOID) +{ + + GpioSetDirection (GPIO3, USB2_MUX_SEL_GPIO, OUTPUT); + GpioSetData (GPIO3, USB2_MUX_SEL_GPIO, HIGH); + + return; +} + +/** Initialize controllers that must setup in the normal world =20 This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/Pl= atformPei @@ -101,6 +121,7 @@ ArmPlatformInitialize ( ) { SocInit (); + MuxSelectUsb2 (); =20 return EFI_SUCCESS; } --=20 1.9.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#65970): https://edk2.groups.io/g/devel/message/65970 Mute This Topic: https://groups.io/mt/77359492/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-