From nobody Tue Feb 10 10:20:36 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+53481+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+53481+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=nxp.com ARC-Seal: i=1; a=rsa-sha256; t=1579884151; cv=none; d=zohomail.com; s=zohoarc; b=ajOEUJ7wTXnm2Kdex0VSLzr2/CVNV8s2g/eZvteAqQRPwpYBDWBWyjP+TQxXmq91toBt+Yed/lY7QU9NIYQzP2UQc2fXbq4DudvKsVWJMV8NMHQ010pnytzfZPXx0lanjpOOeqFsuwkXIZ186OuqUeRjXLlBjWAnSMwRE1xBO+0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1579884151; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=fXP0jVBttHgb7rR3JwNy10QA0yUh2yAfi+fdBkt5TsU=; b=LA53hK7y28NbGOgVyAT8Z9sHnSjYbyygIsetZPvri08MA3GIDnnS0xY54tg8HHrHHrT5xq48nCf1704h3iOh4wutRLxvaupxGMnfkpiwkLxGpVAJiTBj1F1G3le33n+elWIq2UbcZKnCai8dcmxx6JNT3f2+Z2NfMD1aNWVa1/A= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+53481+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1579884150926388.9275730197593; Fri, 24 Jan 2020 08:42:30 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id XPLaYY1788612x2Pm202ba6t; Fri, 24 Jan 2020 08:42:29 -0800 X-Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by mx.groups.io with SMTP id smtpd.web10.15377.1579884148808947295 for ; Fri, 24 Jan 2020 08:42:29 -0800 X-Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 56E981A4980; Fri, 24 Jan 2020 17:42:27 +0100 (CET) X-Received: from inv0113.in-blr01.nxp.com (inv0113.in-blr01.nxp.com [165.114.116.118]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 003E01A1CAA; Fri, 24 Jan 2020 17:42:27 +0100 (CET) X-Received: from uefi-OptiPlex-790.ap.freescale.net (uefi-OptiPlex-790.ap.freescale.net [10.232.132.78]) by inv0113.in-blr01.nxp.com (Postfix) with ESMTP id 27C2B337; Fri, 24 Jan 2020 22:12:26 +0530 (IST) From: "Meenakshi Aggarwal" To: ard.biesheuvel@linaro.org, leif@nuviainc.com, michael.d.kinney@intel.com, devel@edk2.groups.io Cc: v.sethi@nxp.com, Meenakshi Aggarwal Subject: [edk2-devel] [edk2-platforms] [PATCH v3 08/11] Silicon/NXP : Add MemoryInitPei Library Date: Sat, 25 Jan 2020 03:55:36 +0530 Message-Id: <1579904736-14338-3-git-send-email-meenakshi.aggarwal@nxp.com> In-Reply-To: <1579904736-14338-1-git-send-email-meenakshi.aggarwal@nxp.com> References: <1574353514-23986-1-git-send-email-meenakshi.aggarwal@nxp.com> <1579904736-14338-1-git-send-email-meenakshi.aggarwal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,meenakshi.aggarwal@nxp.com X-Gm-Message-State: drnCwLIsGl53yoBb60iSyRt3x1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1579884149; bh=dI/I4iNS3hHxbQd5apx5fvJfhuzfixa5lRkanpypPJQ=; h=Cc:Date:From:Reply-To:Subject:To; b=ekntoLlyizK0pG2EF8j/+L65r3YrUBqOx3YFF28X6zhBsaADFI+iHh3Cn4sM2FPMkmc ExEkIqd9G2U8jbUtQj1U4t7t2yJzvIFsqEuMRie537/seD+sHY58HP+vUmevtQ+doPcfD eBwdvq5g+fYKCr9ImZsqNQaL2iZpN5rrT54= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add MemoryInitPei Library for NXP platforms. It retreieves DRAM information from TF-A. Signed-off-by: Meenakshi Aggarwal --- Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.inf | 48 +++++++ Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.c | 140 +++++++++++++= +++++++ 2 files changed, 188 insertions(+) diff --git a/Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.inf b/Silic= on/NXP/Library/MemoryInitPei/MemoryInitPeiLib.inf new file mode 100644 index 000000000000..a5bd39415def --- /dev/null +++ b/Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.inf @@ -0,0 +1,48 @@ +#/** @file +# +# Copyright (c) 2011-2014, ARM Ltd. All rights reserved.
+# Copyright 2019-2020 NXP +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + +[Defines] + INF_VERSION =3D 0x0001001A + BASE_NAME =3D ArmMemoryInitPeiLib + FILE_GUID =3D 55ddb6e0-70b5-11e0-b33e-0002a5d5c51b + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D MemoryInitPeiLib|SEC PEIM DXE_DRIVER + +[Sources] + MemoryInitPeiLib.c + + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/NXP/NxpQoriqLs.dec + +[LibraryClasses] + ArmMmuLib + ArmPlatformLib + DebugLib + HobLib + PcdLib + +[Guids] + gEfiMemoryTypeInformationGuid + +[FeaturePcd] + gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob + +[Pcd] + gArmTokenSpaceGuid.PcdSystemMemoryBase + gArmTokenSpaceGuid.PcdSystemMemorySize + +[Depex] + TRUE diff --git a/Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.c b/Silicon= /NXP/Library/MemoryInitPei/MemoryInitPeiLib.c new file mode 100644 index 000000000000..00af4bde1a6a --- /dev/null +++ b/Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.c @@ -0,0 +1,140 @@ +/** @file +* +* Copyright (c) 2011-2015, ARM Limited. All rights reserved. +* +* Copyright 2019-2020 NXP +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include + +VOID +BuildMemoryTypeInformationHob ( + VOID + ); + +VOID +InitMmu ( + IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable + ) +{ + + VOID *TranslationTableBase; + UINTN TranslationTableSize; + RETURN_STATUS Status; + + //Note: Because we called PeiServicesInstallPeiMemory() before + //to call InitMmu() the MMU Page Table resides in DRAM + //(even at the top of DRAM as it is the first permanent memory allocatio= n) + Status =3D ArmConfigureMmu (MemoryTable, &TranslationTableBase, &Transla= tionTableSize); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Error: Failed to enable MMU\n")); + } +} + +/*++ + +Routine Description: + + + +Arguments: + + FileHandle - Handle of the file being invoked. + PeiServices - Describes the list of possible PEI Services. + +Returns: + + Status - EFI_SUCCESS if the boot mode could be set + +--*/ +EFI_STATUS +EFIAPI +MemoryPeim ( + IN EFI_PHYSICAL_ADDRESS UefiMemoryBase, + IN UINT64 UefiMemorySize + ) +{ + ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable; + EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes; + EFI_PEI_HOB_POINTERS NextHob; + BOOLEAN Found; + DRAM_INFO DramInfo; + + // Get Virtual Memory Map from the Platform Library + ArmPlatformGetVirtualMemoryMap (&MemoryTable); + + // + // Ensure MemoryTable[0].Length which is size of DRAM has been set + // by ArmPlatformGetVirtualMemoryMap () + // + ASSERT (MemoryTable[0].Length !=3D 0); + + // + // Now, the permanent memory has been installed, we can call AllocatePag= es() + // + ResourceAttributes =3D ( + EFI_RESOURCE_ATTRIBUTE_PRESENT | + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_TESTED + ); + + if (GetDramBankInfo (&DramInfo)) { + DEBUG ((DEBUG_ERROR, "Failed to get DRAM information, exiting...\n")); + return EFI_UNSUPPORTED; + } + + while (DramInfo.NumOfDrams--) { + // + // Check if the resource for the main system memory has been declared + // + Found =3D FALSE; + NextHob.Raw =3D GetHobList (); + while ((NextHob.Raw =3D GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, = NextHob.Raw)) !=3D NULL) { + if ((NextHob.ResourceDescriptor->ResourceType =3D=3D EFI_RESOURCE_SY= STEM_MEMORY) && + (DramInfo.DramRegion[DramInfo.NumOfDrams].BaseAddress >=3D NextH= ob.ResourceDescriptor->PhysicalStart) && + (NextHob.ResourceDescriptor->PhysicalStart + NextHob.ResourceDes= criptor->ResourceLength <=3D + DramInfo.DramRegion[DramInfo.NumOfDrams].BaseAddress + DramInfo= .DramRegion[DramInfo.NumOfDrams].Size)) + { + Found =3D TRUE; + break; + } + NextHob.Raw =3D GET_NEXT_HOB (NextHob); + } + + if (!Found) { + // Reserved the memory space occupied by the firmware volume + BuildResourceDescriptorHob ( + EFI_RESOURCE_SYSTEM_MEMORY, + ResourceAttributes, + DramInfo.DramRegion[DramInfo.NumOfDrams].BaseAddress, + DramInfo.DramRegion[DramInfo.NumOfDrams].Size + ); + } + } + + // Build Memory Allocation Hob + InitMmu (MemoryTable); + + if (FeaturePcdGet (PcdPrePiProduceMemoryTypeInformationHob)) { + // Optional feature that helps prevent EFI memory map fragmentation. + BuildMemoryTypeInformationHob (); + } + + return EFI_SUCCESS; +} --=20 1.9.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#53481): https://edk2.groups.io/g/devel/message/53481 Mute This Topic: https://groups.io/mt/70074425/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-