From nobody Sun May 5 05:34:33 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+51127+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+51127+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=hpe.com ARC-Seal: i=1; a=rsa-sha256; t=1574390804; cv=none; d=zoho.com; s=zohoarc; b=EJnBjj2FHJinDIcdiQX/w575qh9xrwCFCHYnewENZq4LHIJ2ZgAgU0/0gvMp1n4e3BRL5Z9Tmcx8jkOQWdBhgrEbtNdKgonPHhyZBuPINUD6XaSl5wlo3fjIyVdS8LUsHmkyMrh/L4DTO3U9eFMeETI5SKkCb7M6+sIiNWt4p0I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1574390804; h=Cc:Date:From:List-Id:List-Unsubscribe:Message-ID:Reply-To:Sender:Subject:To; bh=baO0NqNwHiNOF8RvrKzQ7r205s762dYgASPZaGDrhkc=; b=KcOCahiHl86J7uo4tg487X+bWxRRt/knR46EFx16RqR1Y5VnZnbToGrccKQGH3khgzvWN8rje8mzwraykma3VjqWzhsMirtev2V2Mc5ItnOYsVbxKxZq6mS9oRGAo73c9a2rSEwPohw/1mTgwf4fLtMBh4586WpQNRH3V6dACZ0= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+51127+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 157439080452649.539025702750905; Thu, 21 Nov 2019 18:46:44 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id aaaaYY1788612xaaaaaaaaaa; Thu, 21 Nov 2019 18:46:44 -0800 X-Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by mx.groups.io with SMTP id smtpd.web11.1470.1574390803221112220 for ; Thu, 21 Nov 2019 18:46:43 -0800 X-Received: from pps.filterd (m0150241.ppops.net [127.0.0.1]) by mx0a-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id xAM2kehO014865; Fri, 22 Nov 2019 02:46:42 GMT X-Received: from g2t2352.austin.hpe.com (g2t2352.austin.hpe.com [15.233.44.25]) by mx0a-002e3701.pphosted.com with ESMTP id 2we351hd1t-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 22 Nov 2019 02:46:42 +0000 X-Received: from g2t2360.austin.hpecorp.net (g2t2360.austin.hpecorp.net [16.196.225.135]) by g2t2352.austin.hpe.com (Postfix) with ESMTP id 5820EB2; Fri, 22 Nov 2019 02:46:38 +0000 (UTC) X-Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g2t2360.austin.hpecorp.net (Postfix) with ESMTP id 2DEE036; Fri, 22 Nov 2019 02:46:35 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com, Michael D Kinney , Ard Biesheuvel , Leif Lindholm , Gilbert Chen Subject: [edk2-devel] [Platform/devel-riscv-v2 PATCHv5-3] SiFive/U5SeriesPkg: Add PCD of system clock for U5 series platforms Date: Fri, 22 Nov 2019 10:13:50 +0800 Message-Id: <1574388830-1875-1-git-send-email-abner.chang@hpe.com> X-HPE-SCL: -1 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,abner.chang@hpe.com X-Gm-Message-State: aaaaaaaaaaaaaaaaaaaaaaaax1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1574390804; bh=Tgy4nD8Zx7pRyTK41gFslyc0e49Iy2j3xZEx/sEaTVQ=; h=Cc:Date:From:Reply-To:Subject:To; b=Z2H+C6Bc3U0jbe5eMLk3mxVFnep2X7jBE+sxdcAmg3fsQyhhW5reNpeTb7Mz2PWKHCG 7LxGyeuFGRIYqxSR/ANK0zALNroTt1KBwUqPw9z7MW+agqGmBar6mXjXJI2HtchF7xuMb 9Vd7ghC1je/OLX7qBYCjh3y0+gqxKLz6F2Q= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Create PCD for SiFive U5 series platforms clock setting. Signed-off-by: Abner Chang Cc: Michael D Kinney Cc: Ard Biesheuvel Cc: Leif Lindholm Cc: Gilbert Chen --- Platform/SiFive/U5SeriesPkg/U5SeriesPkg.dec | 7 ++++--- .../SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc | 11 ++++++---= -- .../FreedomU540HiFiveUnleashedBoard/U540.fdf.inc | 13 +++++++--= ---- .../Library/OpensbiPlatformLib/OpensbiPlatformLib.inf | 1 + .../Library/OpensbiPlatformLib/OpensbiPlatformLib.inf | 1 + .../SiFive/U5SeriesPkg/Library/SerialIoLib/SerialIoLib.inf | 1 + .../Library/OpensbiPlatformLib/Platform.c | 2 +- .../Library/OpensbiPlatformLib/Platform.c | 2 +- .../SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c | 2 +- 9 files changed, 23 insertions(+), 17 deletions(-) diff --git a/Platform/SiFive/U5SeriesPkg/U5SeriesPkg.dec b/Platform/SiFive/= U5SeriesPkg/U5SeriesPkg.dec index a01135b..7f9de20 100644 --- a/Platform/SiFive/U5SeriesPkg/U5SeriesPkg.dec +++ b/Platform/SiFive/U5SeriesPkg/U5SeriesPkg.dec @@ -23,9 +23,10 @@ gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid =3D {0x725B804B, 0x10B5, 0x43= 26, { 0xAD, 0xFF, 0x59, 0xCE, 0x6E, 0xFD, 0x5B, 0x36 }} =20 [PcdsFixedAtBuild] - gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdNumberofU5Cores|0x8|UINT32|= 0x00001000 - gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdE5MCSupported|TRUE|BOOLEAN|= 0x00001001 - gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdU5UartBase|0x0|UINT32|0x000= 01002 + gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdU5PlatformSystemClock|0x0|U= INT32|0x00001000 + gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdNumberofU5Cores|0x8|UINT32|= 0x00001001 + gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdE5MCSupported|TRUE|BOOLEAN|= 0x00001002 + gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdU5UartBase|0x0|UINT32|0x000= 01003 =20 [PcdsPatchableInModule] =20 diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc= b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc index 936ff22..effff62 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc @@ -46,10 +46,11 @@ SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRam= Base =3D $(CODE_BASE_ADDRES SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamSize =3D 0x10000 =20 =20 -SET gUefiRiscVPkgTokenSpaceGuid.PcdRiscVMachineTimerFrequencyInHerz =3D 10= 00000 -SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount =3D 4 = # Total cores on U500 platform -SET gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdNumberofU5Cores =3D 4 = # Total U5 cores enabled on U500 platform -SET gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdE5MCSupported =3D False= # Enable optional E51 MC core? -SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId =3D 0 = # Boot hart ID +SET gUefiRiscVPkgTokenSpaceGuid.PcdRiscVMachineTimerFrequencyInHerz =3D= 1000000 +SET gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdU5PlatformSystemClock =3D= 100000000 # 100Mhz system clock +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount =3D= 4 # Total cores on U500 platform +SET gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdNumberofU5Cores =3D= 4 # Total U5 cores enabled on U500 platform +SET gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdE5MCSupported =3D= False # Enable optional E51 MC core? +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId =3D= 0 # Boot hart ID =20 SET gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdU5UartBase =3D 0x54000000 diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U5= 40.fdf.inc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U5= 40.fdf.inc index 00a2315..3e8d833 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.= inc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.= inc @@ -46,9 +46,10 @@ SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamB= ase =3D $(CODE_BASE_ADDRES SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamSize =3D 0x10000 =20 =20 -SET gUefiRiscVPkgTokenSpaceGuid.PcdRiscVMachineTimerFrequencyInHerz =3D 10= 00000 -SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount =3D 5 = # Total cores on U540 platform -SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId =3D 1 = # Boot hart ID -SET gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdNumberofU5Cores =3D 4 = # Total U5 cores enabled on U540 platform -SET gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdE5MCSupported =3D True = # E51 MC exists. -SET gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdU5UartBase =3D 0x100= 10000 # Serial port base address +SET gUefiRiscVPkgTokenSpaceGuid.PcdRiscVMachineTimerFrequencyInHerz =3D= 1000000 +SET gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdU5PlatformSystemClock =3D= 1000000000 # 1GHz system clock +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount =3D= 5 # Total cores on U540 platform +SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId =3D= 1 # Boot hart ID +SET gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdNumberofU5Cores =3D= 4 # Total U5 cores enabled on U540 platform +SET gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdE5MCSupported =3D= True # E51 MC exists. +SET gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdU5UartBase =3D= 0x10010000 # Serial port base address diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Library/Open= sbiPlatformLib/OpensbiPlatformLib.inf b/Platform/SiFive/U5SeriesPkg/Freedom= U500VC707Board/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf index 60aec6d..e1b4627 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Library/OpensbiPlat= formLib/OpensbiPlatformLib.inf +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Library/OpensbiPlat= formLib/OpensbiPlatformLib.inf @@ -50,3 +50,4 @@ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdOpenSbiStackSize =20 gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdU5UartBase + gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdU5PlatformSystemClock diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Li= brary/OpensbiPlatformLib/OpensbiPlatformLib.inf b/Platform/SiFive/U5SeriesP= kg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatfo= rmLib.inf index 21710d4..0fdc558 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/O= pensbiPlatformLib/OpensbiPlatformLib.inf +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/O= pensbiPlatformLib/OpensbiPlatformLib.inf @@ -50,3 +50,4 @@ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdOpenSbiStackSize =20 gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdU5UartBase + gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdU5PlatformSystemClock diff --git a/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialIoLib.in= f b/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialIoLib.inf index 0044f84..941e309 100644 --- a/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialIoLib.inf +++ b/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialIoLib.inf @@ -33,6 +33,7 @@ =20 [FixedPcd] gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdU5UartBase + gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdU5PlatformSystemClock =20 [Sources] SerialPortLib.c diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Library/Open= sbiPlatformLib/Platform.c b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Boa= rd/Library/OpensbiPlatformLib/Platform.c index bcdb643..1577b01 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Library/OpensbiPlat= formLib/Platform.c +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Library/OpensbiPlat= formLib/Platform.c @@ -27,7 +27,7 @@ #define U500_HART_STACK_SIZE FixedPcdGet32(PcdOpenSbiStackSize) #define U500_BOOT_HART_ID FixedPcdGet32(PcdBootHartId) =20 -#define U500_SYS_CLK 100000000 +#define U500_SYS_CLK FixedPcdGet32(PcdU5PlatformSystemClock) =20 #define U500_PLIC_ADDR 0xc000000 #define U500_PLIC_NUM_SOURCES 0x35 diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Li= brary/OpensbiPlatformLib/Platform.c b/Platform/SiFive/U5SeriesPkg/FreedomU5= 40HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c index b9deec6..3b36379 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/O= pensbiPlatformLib/Platform.c +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/O= pensbiPlatformLib/Platform.c @@ -27,7 +27,7 @@ #define U540_HART_STACK_SIZE FixedPcdGet32(PcdOpenSbiStackSize) #define U540_BOOT_HART_ID FixedPcdGet32(PcdBootHartId) =20 -#define U540_SYS_CLK 100000000 +#define U540_SYS_CLK FixedPcdGet32(PcdU5PlatformSystemClock) =20 #define U540_PLIC_ADDR 0xc000000 #define U540_PLIC_NUM_SOURCES 0x35 diff --git a/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.= c b/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c index 5e06515..504db0f 100644 --- a/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c +++ b/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c @@ -24,7 +24,7 @@ //--------------------------------------------- =20 #define UART_BAUDRATE 115200 -#define SYS_CLK 100000000 +#define SYS_CLK FixedPcdGet32(PcdU5PlatformSystemClock) =20 BOOLEAN Initiated =3D FALSE; =20 --=20 2.7.4 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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