From nobody Wed Feb 11 00:55:37 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+51041+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+51041+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=nxp.com ARC-Seal: i=1; a=rsa-sha256; t=1574332906; cv=none; d=zoho.com; s=zohoarc; b=MYSNQhO7NT3+HCOM6vd3kqn8exhQlUzmoSYyQ33s7AvxseZCCoSipdiPlFy8sZRzolMOmgliZrwVVM03x/99y0a/t4We9zPQS3IsZBDNfduayUj9MsIw+0RnrgrYyHaPwDGzYKGIO+7of15UPevZ8bIKY2jVGzpGmG040BbGU0Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1574332906; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=QTzD3b0d3LavlN9SuL9ZMYRZzQXtNsOpbydOn4qIJzo=; b=JsebbtcPMSfWCDFvxss+fELftQ7jrTnoRJ+Q4wwoG+/dWOEzQnLqzo8l6FXoHz675mTTcCaDAOqYS5vfHS3x3xY+z3Yp9u20jTtjGftduHc6vVwJgUK7W6x/vvlEZybei9XuY0m7V5OK9lp9FCU5wYzJqf5PXTB459c7QShJTe0= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+51041+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1574332906671380.1084642310092; Thu, 21 Nov 2019 02:41:46 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id aaaaYY1788612xaaaaaaaaaa; Thu, 21 Nov 2019 02:41:46 -0800 X-Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by mx.groups.io with SMTP id smtpd.web10.22187.1574332904929495279 for ; Thu, 21 Nov 2019 02:41:45 -0800 X-Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 8BC801A08CD; Thu, 21 Nov 2019 11:41:43 +0100 (CET) X-Received: from inv0113.in-blr01.nxp.com (inv0113.in-blr01.nxp.com [165.114.116.118]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 38DC01A07B7; Thu, 21 Nov 2019 11:41:43 +0100 (CET) X-Received: from uefi-OptiPlex-790.ap.freescale.net (uefi-OptiPlex-790.ap.freescale.net [10.232.132.78]) by inv0113.in-blr01.nxp.com (Postfix) with ESMTP id 7DE56316; Thu, 21 Nov 2019 16:11:42 +0530 (IST) From: "Meenakshi Aggarwal" To: ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, michael.d.kinney@intel.com, devel@edk2.groups.io Cc: v.sethi@nxp.com, Meenakshi Aggarwal Subject: [edk2-devel] [edk2-platforms] [PATCH v2 07/11] Silicon/NXP : Add MemoryInitPei Library Date: Thu, 21 Nov 2019 21:55:10 +0530 Message-Id: <1574353514-23986-8-git-send-email-meenakshi.aggarwal@nxp.com> In-Reply-To: <1574353514-23986-1-git-send-email-meenakshi.aggarwal@nxp.com> References: <1570639758-30355-1-git-send-email-meenakshi.aggarwal@nxp.com> <1574353514-23986-1-git-send-email-meenakshi.aggarwal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,meenakshi.aggarwal@nxp.com X-Gm-Message-State: aaaaaaaaaaaaaaaaaaaaaaaax1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1574332906; bh=K/zdwI/H58Vcb42bXxD7HW9Tku94bYccTpn+JMmDRRE=; h=Cc:Date:From:Reply-To:Subject:To; b=LipACNyxrzIAoBB5KF/IOB7j7ijZalVcQjUUSerzYZf1eCwrhHrF5HfMnQYfGMXJgTi 40xlr95gzuNMg9cF8MUnJ6CaWH/TbpaVXovvALS/5NQEkXBB4RTQW1dRFnqGtJ4B+s1PP HDrVy+/qMqSQfIuCM5r1zdhGRa84DtnYWr8= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add MemoryInitPei Library for NXP platforms. It has changes to get DRAM information from TFA. Signed-off-by: Meenakshi Aggarwal --- Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.inf | 48 +++++++ Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.c | 139 +++++++++++++= +++++++ 2 files changed, 187 insertions(+) diff --git a/Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.inf b/Silic= on/NXP/Library/MemoryInitPei/MemoryInitPeiLib.inf new file mode 100644 index 000000000000..806da6d9ab9a --- /dev/null +++ b/Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.inf @@ -0,0 +1,48 @@ +#/** @file +# +# Copyright (c) 2011-2014, ARM Ltd. All rights reserved.
+# Copyright 2019 NXP +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D ArmMemoryInitPeiLib + FILE_GUID =3D 55ddb6e0-70b5-11e0-b33e-0002a5d5c51b + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D MemoryInitPeiLib|SEC PEIM DXE_DRIVER + +[Sources] + MemoryInitPeiLib.c + + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + EmbeddedPkg/EmbeddedPkg.dec + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + Silicon/NXP/NxpQoriqLs.dec + +[LibraryClasses] + DebugLib + HobLib + ArmMmuLib + ArmPlatformLib + PcdLib + +[Guids] + gEfiMemoryTypeInformationGuid + +[FeaturePcd] + gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob + +[Pcd] + gArmTokenSpaceGuid.PcdSystemMemoryBase + gArmTokenSpaceGuid.PcdSystemMemorySize + +[Depex] + TRUE diff --git a/Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.c b/Silicon= /NXP/Library/MemoryInitPei/MemoryInitPeiLib.c new file mode 100644 index 000000000000..9889d5730261 --- /dev/null +++ b/Silicon/NXP/Library/MemoryInitPei/MemoryInitPeiLib.c @@ -0,0 +1,139 @@ +/** @file +* +* Copyright (c) 2011-2015, ARM Limited. All rights reserved. +* +* Copyright 2019 NXP +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include + +VOID +BuildMemoryTypeInformationHob ( + VOID + ); + +VOID +InitMmu ( + IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable + ) +{ + + VOID *TranslationTableBase; + UINTN TranslationTableSize; + RETURN_STATUS Status; + + //Note: Because we called PeiServicesInstallPeiMemory() before to call I= nitMmu() the MMU Page Table resides in + // DRAM (even at the top of DRAM as it is the first permanent memor= y allocation) + Status =3D ArmConfigureMmu (MemoryTable, &TranslationTableBase, &Transla= tionTableSize); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Error: Failed to enable MMU\n")); + } +} + +/*++ + +Routine Description: + + + +Arguments: + + FileHandle - Handle of the file being invoked. + PeiServices - Describes the list of possible PEI Services. + +Returns: + + Status - EFI_SUCCESS if the boot mode could be set + +--*/ +EFI_STATUS +EFIAPI +MemoryPeim ( + IN EFI_PHYSICAL_ADDRESS UefiMemoryBase, + IN UINT64 UefiMemorySize + ) +{ + ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable; + EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes; + EFI_PEI_HOB_POINTERS NextHob; + BOOLEAN Found; + DRAM_INFO DramInfo; + + // Get Virtual Memory Map from the Platform Library + ArmPlatformGetVirtualMemoryMap (&MemoryTable); + + // + // Ensure MemoryTable[0].Length which is size of DRAM has been set + // by ArmPlatformGetVirtualMemoryMap () + // + ASSERT (MemoryTable[0].Length !=3D 0); + + // + // Now, the permanent memory has been installed, we can call AllocatePag= es() + // + ResourceAttributes =3D ( + EFI_RESOURCE_ATTRIBUTE_PRESENT | + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_TESTED + ); + + if (GetDramBankInfo (&DramInfo)) { + DEBUG ((DEBUG_ERROR, "Failed to get DRAM information, exiting...\n")); + return EFI_UNSUPPORTED; + } + + while (DramInfo.NumOfDrams--) { + // + // Check if the resource for the main system memory has been declared + // + Found =3D FALSE; + NextHob.Raw =3D GetHobList (); + while ((NextHob.Raw =3D GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, = NextHob.Raw)) !=3D NULL) { + if ((NextHob.ResourceDescriptor->ResourceType =3D=3D EFI_RESOURCE_SY= STEM_MEMORY) && + (DramInfo.DramRegion[DramInfo.NumOfDrams].BaseAddress >=3D NextH= ob.ResourceDescriptor->PhysicalStart) && + (NextHob.ResourceDescriptor->PhysicalStart + NextHob.ResourceDes= criptor->ResourceLength <=3D + DramInfo.DramRegion[DramInfo.NumOfDrams].BaseAddress + DramInfo= .DramRegion[DramInfo.NumOfDrams].Size)) + { + Found =3D TRUE; + break; + } + NextHob.Raw =3D GET_NEXT_HOB (NextHob); + } + + if (!Found) { + // Reserved the memory space occupied by the firmware volume + BuildResourceDescriptorHob ( + EFI_RESOURCE_SYSTEM_MEMORY, + ResourceAttributes, + DramInfo.DramRegion[DramInfo.NumOfDrams].BaseAddress, + DramInfo.DramRegion[DramInfo.NumOfDrams].Size + ); + } + } + + // Build Memory Allocation Hob + InitMmu (MemoryTable); + + if (FeaturePcdGet (PcdPrePiProduceMemoryTypeInformationHob)) { + // Optional feature that helps prevent EFI memory map fragmentation. + BuildMemoryTypeInformationHob (); + } + + return EFI_SUCCESS; +} --=20 1.9.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#51041): https://edk2.groups.io/g/devel/message/51041 Mute This Topic: https://groups.io/mt/61076180/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-