From nobody Tue Feb 10 00:01:00 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+49477+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+49477+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=hpe.com ARC-Seal: i=1; a=rsa-sha256; t=1572229908; cv=none; d=zoho.com; s=zohoarc; b=c7jNLq5op8mwkqxFrDyhZCjIgErHtciRlgxvrcoouzP/ETAuS28S4FGZ3jaeE60Kry8P6FA1MEiB8AJ3/Gy0t5OeOGg5pMMs+tfvaPkla6OGyYhhSF+kFS9HR6AEi3/lTKN4uAYDtUwQU55PkvHuvcKdpp8dtMpFzJRvgIbPBZA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1572229908; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=+qc/xrj/wS3HaRtbGp16oEYB72wHq5LX8enomNaFiy0=; b=Lc72L1/EO7BoEHu/CdYG4xLgBWqt12CQaQPeXA9N2ebAZf4zv79j2tXqbpGfHxbx1XLH4F37nBedoEpyl/MqVSl3M+uyhNqN+a7T5IktG4dQX6sDdQpjDeUaqc6I9Ipn8lY5kORQM0j0I/ZfMluV+nVQ8OItpbrq2EJznUpmvxE= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+49477+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1572229908239521.7482601325235; Sun, 27 Oct 2019 19:31:48 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 1W4JYY1788612xF44RlMKknb; Sun, 27 Oct 2019 19:31:47 -0700 X-Received: from mx0b-002e3701.pphosted.com (mx0b-002e3701.pphosted.com [148.163.143.35]) by mx.groups.io with SMTP id smtpd.web11.568.1572229906681616685 for ; Sun, 27 Oct 2019 19:31:46 -0700 X-Received: from pps.filterd (m0148664.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x9S2Vhi9008601; Mon, 28 Oct 2019 02:31:43 GMT X-Received: from g4t3426.houston.hpe.com (g4t3426.houston.hpe.com [15.241.140.75]) by mx0b-002e3701.pphosted.com with ESMTP id 2vvd90rwvd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 28 Oct 2019 02:31:43 +0000 X-Received: from g4t3433.houston.hpecorp.net (g4t3433.houston.hpecorp.net [16.208.49.245]) by g4t3426.houston.hpe.com (Postfix) with ESMTP id 3350659; Mon, 28 Oct 2019 02:31:20 +0000 (UTC) X-Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g4t3433.houston.hpecorp.net (Postfix) with ESMTP id 6886746; Mon, 28 Oct 2019 02:31:18 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com, Michael D Kinney , Liming Gao , Leif Lindholm , Gilbert Chen Subject: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v3 05/39] MdePkg/Include: RISC-V definitions. Date: Mon, 28 Oct 2019 09:58:43 +0800 Message-Id: <1572227957-13169-6-git-send-email-abner.chang@hpe.com> In-Reply-To: <1572227957-13169-1-git-send-email-abner.chang@hpe.com> References: <1572227957-13169-1-git-send-email-abner.chang@hpe.com> X-HPE-SCL: -1 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,abner.chang@hpe.com X-Gm-Message-State: l0pZCiIpnqxmAEYbH2wRjGyAx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1572229907; bh=01SMZyTwNCKDUYtQ63jBWy5LVQnYVDI1QB72+jjGIyE=; h=Cc:Date:From:Reply-To:Subject:To; b=vaGjFZjtq5PF/WkeSj1Zrvy9L9/8oN/VPeaLer3yhefsYU1VWdb7Y/zU+SpZHeEnHPF QIdpJKUtOBRyJPg35/dO1NC4J5H8yXBW8NIavxkNad8KR0bXMqfdn7b685GRMFk8gZCuX tc2oHzDyfdVswlyyGjDz+lg8LMXur1tM8+c= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add RISC-V processor related definitions. Signed-off-by: Abner Chang Cc: Michael D Kinney Cc: Liming Gao Cc: Leif Lindholm Cc: Gilbert Chen --- MdePkg/Include/IndustryStandard/PeImage.h | 12 +++++++ MdePkg/Include/Protocol/DebugSupport.h | 55 +++++++++++++++++++++++++++= ++++ MdePkg/Include/Protocol/PxeBaseCode.h | 4 +++ MdePkg/Include/Uefi/UefiBaseType.h | 13 ++++++++ MdePkg/Include/Uefi/UefiSpec.h | 5 +++ 5 files changed, 89 insertions(+) diff --git a/MdePkg/Include/IndustryStandard/PeImage.h b/MdePkg/Include/Ind= ustryStandard/PeImage.h index 720bb08..ca3fd0b 100644 --- a/MdePkg/Include/IndustryStandard/PeImage.h +++ b/MdePkg/Include/IndustryStandard/PeImage.h @@ -9,6 +9,8 @@ =20 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+Portions Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development= LP. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -34,6 +36,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #define IMAGE_FILE_MACHINE_X64 0x8664 #define IMAGE_FILE_MACHINE_ARMTHUMB_MIXED 0x01c2 #define IMAGE_FILE_MACHINE_ARM64 0xAA64 +#define IMAGE_FILE_MACHINE_RISCV32 0x5032 +#define IMAGE_FILE_MACHINE_RISCV64 0x5064 +#define IMAGE_FILE_MACHINE_RISCV128 0x5128 =20 // // EXE file formats @@ -494,6 +499,13 @@ typedef struct { #define EFI_IMAGE_REL_BASED_DIR64 10 =20 /// +/// Relocation types of RISC-V processor. +/// +#define EFI_IMAGE_REL_BASED_RISCV_HI20 5 +#define EFI_IMAGE_REL_BASED_RISCV_LOW12I 7 +#define EFI_IMAGE_REL_BASED_RISCV_LOW12S 8 + +/// /// Line number format. /// typedef struct { diff --git a/MdePkg/Include/Protocol/DebugSupport.h b/MdePkg/Include/Protoc= ol/DebugSupport.h index 800e771..1a29cc0 100644 --- a/MdePkg/Include/Protocol/DebugSupport.h +++ b/MdePkg/Include/Protocol/DebugSupport.h @@ -7,6 +7,7 @@ =20 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
+Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights = reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -603,6 +604,59 @@ typedef struct { UINT64 FAR; // Fault Address Register } EFI_SYSTEM_CONTEXT_AARCH64; =20 +/// +/// RISC-V processor exception types. +/// +#define EXCEPT_RISCV_INST_MISALIGNED 0 +#define EXCEPT_RISCV_INST_ACCESS_FAULT 1 +#define EXCEPT_RISCV_ILLEGAL_INST 2 +#define EXCEPT_RISCV_BREAKPOINT 3 +#define EXCEPT_RISCV_LOAD_ADDRESS_MISALIGNED 4 +#define EXCEPT_RISCV_LOAD_ACCESS_FAULT 5 +#define EXCEPT_RISCV_STORE_AMO_ADDRESS_MISALIGNED 6 +#define EXCEPT_RISCV_STORE_AMO_ACCESS_FAULT 7 +#define EXCEPT_RISCV_ENV_CALL_FROM_UMODE 8 +#define EXCEPT_RISCV_ENV_CALL_FROM_SMODE 9 +#define EXCEPT_RISCV_ENV_CALL_FROM_HMODE 10 +#define EXCEPT_RISCV_ENV_CALL_FROM_MMODE 11 + +#define EXCEPT_RISCV_SOFTWARE_INT 0x0 +#define EXCEPT_RISCV_TIMER_INT 0x1 + +typedef struct { + UINT64 X0; + UINT64 X1; + UINT64 X2; + UINT64 X3; + UINT64 X4; + UINT64 X5; + UINT64 X6; + UINT64 X7; + UINT64 X8; + UINT64 X9; + UINT64 X10; + UINT64 X11; + UINT64 X12; + UINT64 X13; + UINT64 X14; + UINT64 X15; + UINT64 X16; + UINT64 X17; + UINT64 X18; + UINT64 X19; + UINT64 X20; + UINT64 X21; + UINT64 X22; + UINT64 X23; + UINT64 X24; + UINT64 X25; + UINT64 X26; + UINT64 X27; + UINT64 X28; + UINT64 X29; + UINT64 X30; + UINT64 X31; +} EFI_SYSTEM_CONTEXT_RISCV64; =20 /// /// Universal EFI_SYSTEM_CONTEXT definition. @@ -614,6 +668,7 @@ typedef union { EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf; EFI_SYSTEM_CONTEXT_ARM *SystemContextArm; EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64; + EFI_SYSTEM_CONTEXT_RISCV64 *SystemContextRiscV64; } EFI_SYSTEM_CONTEXT; =20 // diff --git a/MdePkg/Include/Protocol/PxeBaseCode.h b/MdePkg/Include/Protoco= l/PxeBaseCode.h index b02d270..8a9e4a1 100644 --- a/MdePkg/Include/Protocol/PxeBaseCode.h +++ b/MdePkg/Include/Protocol/PxeBaseCode.h @@ -3,6 +3,8 @@ devices for network access and network booting. =20 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All = rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent =20 @par Revision Reference: @@ -153,6 +155,8 @@ typedef UINT16 EFI_PXE_BASE_CODE_UDP_PORT; #define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x000A #elif defined (MDE_CPU_AARCH64) #define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x000B +#elif defined (MDE_CPU_RISCV64) +#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x001B #endif =20 =20 diff --git a/MdePkg/Include/Uefi/UefiBaseType.h b/MdePkg/Include/Uefi/UefiB= aseType.h index a62f13d..d979412 100644 --- a/MdePkg/Include/Uefi/UefiBaseType.h +++ b/MdePkg/Include/Uefi/UefiBaseType.h @@ -3,6 +3,7 @@ =20 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
Portions copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.
+Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All = rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -240,6 +241,12 @@ typedef union { /// #define EFI_IMAGE_MACHINE_AARCH64 0xAA64 =20 +/// +/// PE32+ Machine type for RISC-V 32/64/128 +/// +#define EFI_IMAGE_MACHINE_RISCV32 0x5032 +#define EFI_IMAGE_MACHINE_RISCV64 0x5064 +#define EFI_IMAGE_MACHINE_RISCV128 0x5128 =20 #if defined (MDE_CPU_IA32) =20 @@ -268,6 +275,12 @@ typedef union { =20 #define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE) =20 +#elif defined (MDE_CPU_RISCV64) +#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \ + ((Machine) =3D=3D EFI_IMAGE_MACHINE_RISCV64) + +#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE) + #elif defined (MDE_CPU_EBC) =20 /// diff --git a/MdePkg/Include/Uefi/UefiSpec.h b/MdePkg/Include/Uefi/UefiSpec.h index 44a0a6a..e2d4539 100644 --- a/MdePkg/Include/Uefi/UefiSpec.h +++ b/MdePkg/Include/Uefi/UefiSpec.h @@ -6,6 +6,8 @@ by this include file. =20 Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
+Portions Copyright (c) 2016, Hewlett Packard Enterprise Development LP. Al= l rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -2178,6 +2180,7 @@ typedef struct { #define EFI_REMOVABLE_MEDIA_FILE_NAME_X64 L"\\EFI\\BOOT\\BOOTX64.EFI" #define EFI_REMOVABLE_MEDIA_FILE_NAME_ARM L"\\EFI\\BOOT\\BOOTARM.EFI" #define EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64 L"\\EFI\\BOOT\\BOOTAA64.EFI" +#define EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64 L"\\EFI\\BOOT\\BOOTRISCV64.E= FI" =20 #if defined (MDE_CPU_IA32) #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_IA= 32 @@ -2188,6 +2191,8 @@ typedef struct { #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_ARM #elif defined (MDE_CPU_AARCH64) #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_AA= RCH64 +#elif defined (MDE_CPU_RISCV64) + #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_RI= SCV64 #else #error Unknown Processor Type #endif --=20 2.7.4 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#49477): https://edk2.groups.io/g/devel/message/49477 Mute This Topic: https://groups.io/mt/38757491/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-