From nobody Tue Dec 16 08:58:35 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+48553+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+48553+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=hpe.com ARC-Seal: i=1; a=rsa-sha256; t=1570523587; cv=none; d=zoho.com; s=zohoarc; b=PQdVJQ07/7WRKAz6aTmG7mfA/D3bY71Ci6MwFSGhOBWPuN76Dd+TkTD6/5w43ja94w59LXAGj0pQkK+p2fEqhcJJjgvmWj5/WJKoIUESgy9xgDtN/ZPTtodB/Vf8ojOciDcg/T/G7fcMFM+WIq//Mim5Ib9yLJLUPOw0/bmSK+s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570523587; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=RTORacLTQLRmdiPX2NgIkJH6RSDymmk/7kmdQU+LTgk=; b=blWm6VPoOGQqkq4bbuckPaffqpFVFDxQwvorP8cKFosw1Z9gIoNc3DViQqGG1PX5g/qfuThC6BhesVxtghNKNuWyQdsz0u7/EO8NnIlmDTKyjorE+YAeFnni0o9H5MlMXw9hRQLgvmfy1gvg9P7rfWhpqi0x7T/gdTaTDwj/eRc= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+48553+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1570523587712786.8545354265705; Tue, 8 Oct 2019 01:33:07 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id uleZYY1788612x7SHvsbiJ2y; Tue, 08 Oct 2019 01:33:06 -0700 X-Received: from mx0b-002e3701.pphosted.com (mx0b-002e3701.pphosted.com [148.163.143.35]) by groups.io with SMTP; Tue, 08 Oct 2019 01:33:06 -0700 X-Received: from pps.filterd (m0150244.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x988Vh9f006411; Tue, 8 Oct 2019 08:33:05 GMT X-Received: from g9t5008.houston.hpe.com (g9t5008.houston.hpe.com [15.241.48.72]) by mx0b-002e3701.pphosted.com with ESMTP id 2vggwunayk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 08 Oct 2019 08:33:04 +0000 X-Received: from g9t2301.houston.hpecorp.net (g9t2301.houston.hpecorp.net [16.220.97.129]) by g9t5008.houston.hpe.com (Postfix) with ESMTP id 45CF956; Tue, 8 Oct 2019 08:33:04 +0000 (UTC) X-Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g9t2301.houston.hpecorp.net (Postfix) with ESMTP id 712384B; Tue, 8 Oct 2019 08:33:02 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com, Michael D Kinney , Liming Gao , Leif Lindholm , Gilbert Chen Subject: [edk2-devel] [PATCH 2/3] MdePkg/Include: Update to support SmBios 3.3.0 Date: Tue, 8 Oct 2019 16:01:49 +0800 Message-Id: <1570521710-5426-3-git-send-email-abner.chang@hpe.com> In-Reply-To: <1570521710-5426-1-git-send-email-abner.chang@hpe.com> References: <1570521710-5426-1-git-send-email-abner.chang@hpe.com> X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-HPE-SCL: -1 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,abner.chang@hpe.com X-Gm-Message-State: LAWcn2usk0TrIRkmIizodLjex1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1570523586; bh=q9qtVQupoAmWr+QHUnC/N9IkMHqmhZgeCfo9nDsFQvA=; h=Cc:Date:From:Reply-To:Subject:To; b=S/FwVWp3cA+Oy1dLeWdAuEZbanhemgfqwl6aJNdEh78GWVjMt3q7wNRwSiLaFhuEnOa Sx2I3/uDKx5QY9p8b8+z4sc8LweRh+gwVbOvscDllKyVjf8LkrMR+2he13//54g1W1u39 P9x2raAweQwUDQD4vvb8XqoJ1lwVfVkbSTM= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update SmBios.h to support SMBIOS 3.3.0 spec. Bugzilla link, https://bugzilla.tianocore.org/show_bug.cgi?id=3D2202 Signed-off-by: Abner Chang Cc: Michael D Kinney Cc: Liming Gao Cc: Leif Lindholm Cc: Gilbert Chen --- MdePkg/Include/IndustryStandard/SmBios.h | 76 ++++++++++++++++++++++++++++= ++-- 1 file changed, 73 insertions(+), 3 deletions(-) diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include/Indu= stryStandard/SmBios.h index f3b6f18..f504cc8 100644 --- a/MdePkg/Include/IndustryStandard/SmBios.h +++ b/MdePkg/Include/IndustryStandard/SmBios.h @@ -1,8 +1,9 @@ /** @file - Industry Standard Definitions of SMBIOS Table Specification v3.2.0. + Industry Standard Definitions of SMBIOS Table Specification v3.3.0. =20 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP
+(C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -46,7 +47,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF =20 // -// SMBIOS type macros which is according to SMBIOS 2.7 specification. +// SMBIOS type macros which is according to SMBIOS 3.3.0 specification. // #define SMBIOS_TYPE_BIOS_INFORMATION 0 #define SMBIOS_TYPE_SYSTEM_INFORMATION 1 @@ -92,6 +93,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41 #define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42 #define SMBIOS_TYPE_TPM_DEVICE 43 +#define SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION 44 =20 /// /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter = 3.3.43. @@ -727,7 +729,10 @@ typedef enum { ProcessorFamilyMII =3D 0x012E, ProcessorFamilyWinChip =3D 0x0140, ProcessorFamilyDSP =3D 0x015E, - ProcessorFamilyVideoProcessor =3D 0x01F4 + ProcessorFamilyVideoProcessor =3D 0x01F4, + ProcessorFamilyRiscvRV32 =3D 0x0200, + ProcessorFamilyRiscVRV64 =3D 0x0201, + ProcessorFamilyRiscVRV128 =3D 0x0202 } PROCESSOR_FAMILY2_DATA; =20 /// @@ -857,6 +862,19 @@ typedef struct { } PROCESSOR_FEATURE_FLAGS; =20 typedef struct { + UINT32 ProcessorReserved1 :1; + UINT32 ProcessorUnknown :1; + UINT32 Processor64BitCapble :1; + UINT32 ProcessorMultiCore :1; + UINT32 ProcessorHardwareThread :1; + UINT32 ProcessorExecuteProtection :1; + UINT32 ProcessorEnhancedVirtulization :1; + UINT32 ProcessorPowerPerformanceCtrl :1; + UINT32 Processor128bitCapble :1; + UINT32 ProcessorReserved2 :7; +} PROCESSOR_CHARACTERISTIC_FLAGS; + +typedef struct { PROCESSOR_SIGNATURE Signature; PROCESSOR_FEATURE_FLAGS FeatureFlags; } PROCESSOR_ID_DATA; @@ -2508,6 +2526,57 @@ typedef struct { UINT8 InterfaceTypeSpecificData[4]; ///< T= his field has a minimum of four bytes } SMBIOS_TABLE_TYPE42; =20 + +/// +/// Processor Specific Block - Processor Architecture Type +/// +typedef enum{ + ProcessorSpecificBlockArchTypeReserved =3D 0x00, + ProcessorSpecificBlockArchTypeIa32 =3D 0x01, + ProcessorSpecificBlockArchTypeX64 =3D 0x02, + ProcessorSpecificBlockArchTypeItanium =3D 0x03, + ProcessorSpecificBlockArchTypeAarch32 =3D 0x04, + ProcessorSpecificBlockArchTypeAarch64 =3D 0x05, + ProcessorSpecificBlockArchTypeRiscVRV32 =3D 0x06, + ProcessorSpecificBlockArchTypeRiscVRV64 =3D 0x07, + ProcessorSpecificBlockArchTypeRiscVRV128 =3D 0x08 +} PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE; + +/// +/// Processor Specific Block is the standard container of processor-specif= ic data. +/// +typedef struct { + UINT8 Length; + UINT8 ProcessorArchType; + /// + /// Below followed by Processor-specific data + /// + /// +} PROCESSOR_SPECIFIC_BLOCK; + +/// +/// Processor Additional Information(Type 44). +/// +/// The information in this structure defines the processor additional inf= ormation in case +/// SMBIOS type 4 is not sufficient to describe processor characteristics. +/// The SMBIOS type 44 structure has a reference handle field to link back= to the related +/// SMBIOS type 4 structure. There may be multiple SMBIOS type 44 structur= es linked to the +/// same SMBIOS type 4 structure. For example, when cores are not identica= l in a processor, +/// SMBIOS type 44 structures describe different core-specific information. +/// +/// SMBIOS type 44 defines the standard header for the processor-specific = block, while the +/// contents of processor-specific data are maintained by processor +/// architecture workgroups or vendors in separate documents. +/// +typedef struct { + SMBIOS_STRUCTURE Hdr; + SMBIOS_HANDLE RefHandle; ///< This f= ield refer to associated SMBIOS type 4 + /// + /// Below followed by Processor-specific block + /// + PROCESSOR_SPECIFIC_BLOCK ProcessorSpecificBlock; +} SMBIOS_TABLE_TYPE44; + /// /// TPM Device (Type 43). /// @@ -2586,6 +2655,7 @@ typedef union { SMBIOS_TABLE_TYPE41 *Type41; SMBIOS_TABLE_TYPE42 *Type42; SMBIOS_TABLE_TYPE43 *Type43; + SMBIOS_TABLE_TYPE44 *Type44; SMBIOS_TABLE_TYPE126 *Type126; SMBIOS_TABLE_TYPE127 *Type127; UINT8 *Raw; --=20 2.7.4 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#48553): https://edk2.groups.io/g/devel/message/48553 Mute This Topic: https://groups.io/mt/34440287/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-