From nobody Fri Apr 26 05:22:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+48223+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+48223+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1569596913; cv=none; d=zoho.com; s=zohoarc; b=C/ywe1WTLeecwwXbYwu5l7T1wzxVJt0ypvQdIjkmH8S8vgIy3ACwrgvKRwhaMQ4D9QdUHJW+rvLiedhZW9j4+Gc0LaeBn5G4bEzsdJMImsRICpv+B0np5wXPwWrixB4dJm+oGukNY+rhcKM42CHYHtkuD8Ffg+eG76xWCjPKE9A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1569596913; h=Cc:Date:From:List-Id:List-Unsubscribe:Message-ID:Reply-To:Sender:Subject:To:ARC-Authentication-Results; bh=WghWADqAECKaE3HUJCLyfK4z/9v4+XmJrA39V5XD2RQ=; b=dx3u3gJ97kf2YQK+550N6NdpaOGFUYQ3c3wr33J92HTc0b/pxxM78c9j7CUr0dyB0APemzX4ScSbEwD5+6jRfWvAgp2NJmU5rKKOaFZA9bOYtpXSDja5QMXm00u8C7/1dGQax93ZxUe0W9mjfsk6eYvN4rmimrxRhmc8I0sQ7tM= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+48223+1787277+3901457@groups.io Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1569596913284378.0981539787758; Fri, 27 Sep 2019 08:08:33 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id aaaaYY1788612xaaaaaaaaaa; Fri, 27 Sep 2019 08:08:32 -0700 X-Received: from mail-lj1-f194.google.com (mail-lj1-f194.google.com [209.85.208.194]) by groups.io with SMTP; Fri, 27 Sep 2019 08:08:32 -0700 X-Received: by mail-lj1-f194.google.com with SMTP id l21so2851430lje.4 for ; Fri, 27 Sep 2019 08:08:31 -0700 (PDT) X-Gm-Message-State: aaaaaaaaaaaaaaaaaaaaaaaax1787277AA= X-Google-Smtp-Source: APXvYqwfcyyWCXSihWqO5MCFfZV74EfbkEaf3zp1Q1YBDzVmjHITFuLpnLyXHXgVNd/l2uv4F4iXrQ== X-Received: by 2002:a2e:4e12:: with SMTP id c18mr3183786ljb.47.1569596909535; Fri, 27 Sep 2019 08:08:29 -0700 (PDT) X-Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id l5sm522076lfk.17.2019.09.27.08.08.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 27 Sep 2019 08:08:28 -0700 (PDT) From: "Marcin Wojtas" To: devel@edk2.groups.io Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com, kostap@marvell.com Subject: [edk2-devel] [edk2-platforms: PATCH] Marvell/Drivers: XenonDxe: Use new enums for SD card initialization Date: Fri, 27 Sep 2019 17:08:14 +0200 Message-Id: <1569596894-9601-1-git-send-email-mw@semihalf.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mw@semihalf.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1569596912; bh=1NIqqKZRyCW4SbmXMleeB0/VPQFzhWEgYG0Rj1gE7lk=; h=Cc:Date:From:Reply-To:Subject:To; b=Dslmk7KyOEOeqwt3Kl99GLA0+SR7T0GNV0tJpWRzi1MQTwt0CR9Sm/wwRipW7HibjfR TQQ4wr/Rw2OS8Jz1VKHobcrKjGVnQQYcTPtCNgpcNOcpog6eX9SgZP1N1dBzC1qIIGjgw YHJRrvEXO0iJSNMr8xeDXNSfRS4eKfm4v/E= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" MdeModulePkg/SdMmcHcDxe update to use rev 3 of SdMmcOverrideProtocol reworked SD card initialization and added new enums describing lower speeds. Include this in XenonDxe, which fixes Armada70x0Db SD interface. Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm --- Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c b/Silicon/= Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c index 7bfe240..6059cf8 100755 --- a/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c +++ b/Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c @@ -360,6 +360,8 @@ XenonPhySlowMode ( if (((Timing =3D=3D SdMmcUhsSdr50) || (Timing =3D=3D SdMmcUhsSdr25) || (Timing =3D=3D SdMmcUhsSdr12) || + (Timing =3D=3D SdMmcSdDs) || + (Timing =3D=3D SdMmcSdHs) || (Timing =3D=3D SdMmcMmcHsDdr) || (Timing =3D=3D SdMmcMmcHsSdr) || (Timing =3D=3D SdMmcMmcLegacy)) && SlowMode) { @@ -396,7 +398,7 @@ XenonSetPhy ( Var &=3D ~(EMMC5_1_FC_CMD_PD | EMMC5_1_FC_DQ_PD); XenonHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_PAD_CONTROL1, FALSE, SDHC_R= EG_SIZE_4B, &Var); =20 - if (Timing =3D=3D SdMmcUhsSdr12) { + if (Timing =3D=3D SdMmcUhsSdr12 || Timing =3D=3D SdMmcSdDs) { if (SlowMode) { XenonHcRwMmio (PciIo, SD_BAR_INDEX, EMMC_PHY_TIMING_ADJUST, TRUE, SD= HC_REG_SIZE_4B, &Var); Var |=3D QSN_PHASE_SLOW_MODE_BIT; @@ -749,7 +751,7 @@ XenonInit ( =20 // Set lowest clock and the PHY for the initialization phase XenonSetClk (PciIo, XENON_MMC_BASE_CLK); - Status =3D XenonSetPhy (PciIo, SlowMode, TuningStepDivisor, SdMmcUhsSdr1= 2); + Status =3D XenonSetPhy (PciIo, SlowMode, TuningStepDivisor, SdMmcSdDs); if (EFI_ERROR (Status)) { return Status; } --=20 2.7.4 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#48223): https://edk2.groups.io/g/devel/message/48223 Mute This Topic: https://groups.io/mt/34312267/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-