From nobody Mon Feb 9 12:26:41 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+46788+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+46788+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=hpe.com ARC-Seal: i=1; a=rsa-sha256; t=1567595622; cv=none; d=zoho.com; s=zohoarc; b=g+Ph30gbGjbOMXV6qb/kiwkQntGsjerxnXi+7q7GkBey+mD5QsXhgl6i9Is0OSbvno10Ye6sLgZWK6Z9AX4WJ5+9rTJinNxamcvZkoHqqOyDIGh8f3zhrarRcX2YIlVD+/STuF4/MeHtjMGkqdbGUH8l87o6o4JhXVO9EBFtVCQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1567595622; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To:ARC-Authentication-Results; bh=4hAhhPPyY1GTz31xcNKvmx37aVJFaZrBb689RvLtmrM=; b=Xoe04NvOeVKRdCz5AhTrK7gh0zOdrCGDj171+HcSdhNT6jbdAgsUvs0GTrv3Gs1OelclN9bZjiUJGlY6QnXRH5qjfuSlG2NFqxxwSh1+aKszREd87TtaTyyyfvBLCb7YB/m0JANpXmv9CiD5wqWHiBGv/N2rdGpcAhiQe8knoKI= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+46788+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1567595622148201.99628068096536; Wed, 4 Sep 2019 04:13:42 -0700 (PDT) Return-Path: X-Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by groups.io with SMTP; Wed, 04 Sep 2019 04:13:41 -0700 X-Received: from pps.filterd (m0134422.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x84BBg9v017961 for ; Wed, 4 Sep 2019 11:13:40 GMT X-Received: from g2t2354.austin.hpe.com (g2t2354.austin.hpe.com [15.233.44.27]) by mx0b-002e3701.pphosted.com with ESMTP id 2usyw7vrg5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 04 Sep 2019 11:13:39 +0000 X-Received: from g2t2360.austin.hpecorp.net (g2t2360.austin.hpecorp.net [16.196.225.135]) by g2t2354.austin.hpe.com (Postfix) with ESMTP id 59244BA for ; Wed, 4 Sep 2019 11:13:38 +0000 (UTC) X-Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.44]) by g2t2360.austin.hpecorp.net (Postfix) with ESMTP id 3A97539; Wed, 4 Sep 2019 11:13:37 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com Subject: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v1 11/22]: BaseTools: BaseTools changes for RISC-V platform. Date: Wed, 4 Sep 2019 18:43:06 +0800 Message-Id: <1567593797-26216-12-git-send-email-abner.chang@hpe.com> In-Reply-To: <1567593797-26216-1-git-send-email-abner.chang@hpe.com> References: <1567593797-26216-1-git-send-email-abner.chang@hpe.com> X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-HPE-SCL: -1 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,abner.chang@hpe.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1567595621; bh=e4iGly+K+vVt5zVLR6WvK1SjY9R0/jFjiYaOHilfJLQ=; h=Cc:Date:From:Reply-To:Subject:To; b=dJpoOD0yLY7XefFVPwTkiM32UNxUWI2TcO2N/wLAcfMPYeWgmExY2mmoDhIYGbwgZA1 WwS8bj4ZA6e3e+QdRv5KY+HtpP/f3J2kkLyasWiSIlg/vpOA1RXutJ2/5cccoNlqTD9mt Tq6shOzu7+TONIPiq4AL6NYe6gAMTIvkG4E= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" BaseTools changes for building EDK2 RISC-V platform. The changes made to build_rule.template is to avoid build errors cause by G= CC711RISCV tool chain. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Abner Chang --- BaseTools/Conf/build_rule.template | 23 +- BaseTools/Conf/tools_def.template | 108 +- BaseTools/Source/C/Common/BasePeCoff.c | 19 +- BaseTools/Source/C/Common/PeCoffLoaderEx.c | 96 ++ BaseTools/Source/C/GenFv/GenFvInternalLib.c | 281 ++++- BaseTools/Source/C/GenFw/Elf32Convert.c | 6 +- BaseTools/Source/C/GenFw/Elf64Convert.c | 273 ++++- BaseTools/Source/C/GenFw/elf_common.h | 63 ++ .../Source/C/Include/IndustryStandard/PeImage.h | 10 + BaseTools/Source/Python/Common/DataType.py | 1075 ++++++++++------= ---- 10 files changed, 1393 insertions(+), 561 deletions(-) diff --git a/BaseTools/Conf/build_rule.template b/BaseTools/Conf/build_rule= .template index db06d3a..8e7f6e0 100755 --- a/BaseTools/Conf/build_rule.template +++ b/BaseTools/Conf/build_rule.template @@ -145,14 +145,6 @@ "$(CC)" $(CC_FLAGS) $(CC_XIPFLAGS) -c -o ${dst} $(INC) ${src} =20 -[C-Header-File] - - *.h, *.H - - - - - [Assembly-Code-File.COMMON.COMMON] ?.asm, ?.Asm, ?.ASM @@ -321,6 +313,21 @@ "$(OBJCOPY)" $(OBJCOPY_FLAGS) ${dst} =20 =20 +[Static-Library-File.COMMON.RISCV64, Static-Library-File.COMMON.RISCV32] + + *.lib + + + $(MAKE_FILE) + + + $(DEBUG_DIR)(+)$(MODULE_NAME).dll + + + "$(DLINK)" -o ${dst} $(DLINK_FLAGS) --start-group $(DLINK_SPATH) @= $(STATIC_LIBRARY_FILES_LIST) --end-group $(DLINK2_FLAGS) + "$(OBJCOPY)" $(OBJCOPY_FLAGS) ${dst} + + [Static-Library-File.USER_DEFINED, Static-Library-File.HOST_APPLICATION] *.lib diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.t= emplate index 8f0e6cb..36a301a 100755 --- a/BaseTools/Conf/tools_def.template +++ b/BaseTools/Conf/tools_def.template @@ -3,7 +3,7 @@ # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
# Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.
# Copyright (c) 2015, Hewlett-Packard Development Company, L.P.
-# (C) Copyright 2016 Hewlett Packard Enterprise Development LP
+# (C) Copyright 2016-2019 Hewlett Packard Enterprise Development LP
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -114,6 +114,12 @@ DEFINE GCC49_X64_PREFIX =3D ENV(GCC49_BIN) DEFINE GCC5_IA32_PREFIX =3D ENV(GCC5_BIN) DEFINE GCC5_X64_PREFIX =3D ENV(GCC5_BIN) DEFINE GCC_HOST_PREFIX =3D ENV(GCC_HOST_BIN) +# +# RISC-V GCC toolchain +# This is the default directory used when install official riscv-tools. +# +DEFINE GCCRISCV_RISCV32_PREFIX =3D ENV(GCC_RISCV32_BIN) +DEFINE GCCRISCV_RISCV64_PREFIX =3D ENV(GCC_RISCV64_BIN) =20 DEFINE UNIX_IASL_BIN =3D ENV(IASL_PREFIX)iasl DEFINE WIN_IASL_BIN =3D ENV(IASL_PREFIX)iasl.exe @@ -236,6 +242,15 @@ DEFINE DTC_BIN =3D ENV(DTC_PREFIX)dtc # Required to build platforms or ACPI tables: # Intel(r) ACPI Compiler from # https://acpica.org/downloads +# GCCRISCV - Linux - Requires: +# RISC-V official release of RISC-V GNU toolch= ain, +# https://github.com/riscv/riscv-gnu-toolcha= in @64879b24 +# The commit ID 64879b24 is the one can buil= d RISC-V platform and boo to EFI shell. +# Follow the instructions mentioned in READM= E.md to build RISC-V tool change. +# Set below environment variables to the RISC-= V tool chain binaries before building RISC-V EDK2 port. +# - GCC_RISCV32_BIN +# - GCC_RISCV64_BIN +# # CLANG35 -Linux,Windows- Requires: # Clang v3.5 or later, and GNU binutils target= ing aarch64-linux-gnu or arm-linux-gnueabi # Optional: @@ -1806,6 +1821,26 @@ DEFINE GCC5_ARM_ASLDLINK_FLAGS =3D DEF(GCC49_A= RM_ASLDLINK_FLAGS) DEFINE GCC5_AARCH64_ASLDLINK_FLAGS =3D DEF(GCC49_AARCH64_ASLDLINK_FLAGS) DEFINE GCC5_ASLCC_FLAGS =3D DEF(GCC49_ASLCC_FLAGS) -fno-lto =20 +DEFINE GCC_RISCV_ALL_CC_FLAGS =3D -g -fshort-wchar -fno= -strict-aliasing -Wall -Werror -Wno-array-bounds -ffunction-sections -fdata= -sections -c -include AutoGen.h -fno-common -DSTRING_ARRAY_NAME=3D$(BASE_NA= ME)Strings +DEFINE GCC_RISCV_ALL_DLINK_COMMON =3D -nostdlib -n -q --gc-= sections -z common-page-size=3D0x40 +DEFINE GCC_RISCV_ALL_DLINK_FLAGS =3D DEF(GCC_RISCV_ALL_DLI= NK_COMMON) --entry $(IMAGE_ENTRY_POINT) -u $(IMAGE_ENTRY_POINT) -Map $(DEST= _DIR_DEBUG)/$(BASE_NAME).map +DEFINE GCC_RISCV_ALL_DLINK2_FLAGS =3D --defsym=3DPECOFF_HEA= DER_SIZE=3D0x220 --script=3D$(EDK_TOOLS_PATH)/Scripts/GccBaseRiscV.lds +DEFINE GCC_RISCV_ALL_ASM_FLAGS =3D -c -x assembler -imac= ros $(DEST_DIR_DEBUG)/AutoGen.h +DEFINE GCC_RISCV_RISCV32_DLINK2_FLAGS =3D --defsym=3DPECOFF_HEA= DER_SIZE=3D0x220 DEF(GCC_DLINK2_FLAGS_COMMON) + +DEFINE GCCRISCV_RISCV32_ARCH =3D rv32imafdc +DEFINE GCCRISCV_RISCV64_ARCH =3D rv64imafdc +DEFINE GCCRISCV_CC_FLAGS_WARNING_DISABLE =3D -Wno-tautological-compa= re -Wno-pointer-compare +DEFINE GCCRISCV_RISCV32_CC_FLAGS =3D DEF(GCC_RISCV_ALL_CC_FL= AGS) DEF(GCCRISCV_CC_FLAGS_WARNING_DISABLE) -march=3DDEF(GCCRISCV_RISCV32_A= RCH) -malign-double -fno-stack-protector -D EFI32 -fno-asynchronous-unwind-= tables -Wno-address -Wno-unused-but-set-variable -fpack-struct=3D8 +DEFINE GCCRISCV_RISCV64_CC_FLAGS =3D DEF(GCC_RISCV_ALL_CC_FL= AGS) DEF(GCCRISCV_CC_FLAGS_WARNING_DISABLE) -march=3DDEF(GCCRISCV_RISCV64_A= RCH) -fno-builtin -fno-builtin-memcpy -fno-stack-protector -Wno-address -fn= o-asynchronous-unwind-tables -Wno-unused-but-set-variable -fpack-struct=3D8= -mcmodel=3Dmedany -mabi=3Dlp64 +DEFINE GCCRISCV_RISCV32_RISCV64_DLINK_COMMON =3D -nostdlib -n -q --gc-se= ctions -z common-page-size=3D0x40 +DEFINE GCCRISCV_RISCV32_RISCV64_ASLDLINK_FLAGS =3D DEF(GCC_RISCV_ALL_DLINK= _COMMON) --entry ReferenceAcpiTable -u ReferenceAcpiTable +DEFINE GCCRISCV_RISCV32_RISCV64_DLINK_FLAGS =3D DEF(GCC_RISCV_ALL_DLINK= _COMMON) --entry $(IMAGE_ENTRY_POINT) -u $(IMAGE_ENTRY_POINT) -Map $(DEST_D= IR_DEBUG)/$(BASE_NAME).map +DEFINE GCCRISCV_RISCV32_DLINK2_FLAGS =3D DEF(GCC_RISCV_RISCV32_D= LINK2_FLAGS) +DEFINE GCCRISCV_RISCV64_DLINK_FLAGS =3D DEF(GCC_RISCV_ALL_DLINK= _FLAGS) -melf64lriscv --oformat=3Delf64-littleriscv --no-relax +DEFINE GCCRISCV_RISCV64_DLINK2_FLAGS =3D DEF(GCC_RISCV_ALL_DLINK= 2_FLAGS) +DEFINE GCCRISCV_ASM_FLAGS =3D DEF(GCC_RISCV_ALL_ASM_F= LAGS) -march=3DDEF(GCCRISCV_RISCV64_ARCH) -mcmodel=3Dmedany -mabi=3Dlp64 + ##########################################################################= ########## # # GCC 4.8 - This configuration is used to compile under Linux to produce @@ -2247,6 +2282,77 @@ RELEASE_GCC5_AARCH64_DLINK_XIPFLAGS =3D -z common-pa= ge-size=3D0x20 NOOPT_GCC5_AARCH64_DLINK_FLAGS =3D DEF(GCC5_AARCH64_DLINK_FLAGS) -O0 NOOPT_GCC5_AARCH64_DLINK_XIPFLAGS =3D -z common-page-size=3D0x20 -O0 =20 +##########################################################################= ######### +##########################################################################= ########## +# +# GCC RISC-V This configuration is used to compile under Linux to produce +# PE/COFF binaries using GCC RISC-V tool chain +# https://github.com/riscv/riscv-gnu-toolchain @64879b24 +# The commit ID 64879b24 is the one can build RISC-V platform and boo to E= FI shell. +# +##########################################################################= ########## + +*_GCCRISCV_*_*_FAMILY =3D GCC + +*_GCCRISCV_*_MAKE_PATH =3D DEF(GCC49_IA32_PREFIX)make +*_GCCRISCV_*_PP_FLAGS =3D DEF(GCC_PP_FLAGS) +*_GCCRISCV_*_ASLPP_FLAGS =3D DEF(GCC_ASLPP_FLAGS) +*_GCCRISCV_*_ASLCC_FLAGS =3D DEF(GCC_ASLCC_FLAGS) +*_GCCRISCV_*_VFRPP_FLAGS =3D DEF(GCC_VFRPP_FLAGS) +*_GCCRISCV_*_APP_FLAGS =3D +*_GCCRISCV_*_ASL_FLAGS =3D DEF(IASL_FLAGS) +*_GCCRISCV_*_ASL_OUTFLAGS =3D DEF(IASL_OUTFLAGS) + +################## +# GCCRISCV RISCV32 definitions +################## + +*_GCCRISCV_RISCV32_OBJCOPY_PATH =3D DEF(GCCRISCV_RISCV32_PREFIX)ri= scv64-unknown-elf-objcopy +*_GCCRISCV_RISCV32_SLINK_PATH =3D DEF(GCCRISCV_RISCV32_PREFIX)ri= scv64-unknown-elf-gcc-ar +*_GCCRISCV_RISCV32_DLINK_PATH =3D DEF(GCCRISCV_RISCV32_PREFIX)ri= scv64-unknown-elf-ld +*_GCCRISCV_RISCV32_ASLDLINK_PATH =3D DEF(GCCRISCV_RISCV32_PREFIX)ri= scv64-unknown-elf-ld +*_GCCRISCV_RISCV32_ASM_PATH =3D DEF(GCCRISCV_RISCV32_PREFIX)ri= scv64-unknown-elf-gcc +*_GCCRISCV_RISCV32_PP_PATH =3D DEF(GCCRISCV_RISCV32_PREFIX)ri= scv64-unknown-elf-gcc +*_GCCRISCV_RISCV32_VFRPP_PATH =3D DEF(GCCRISCV_RISCV32_PREFIX)ri= scv64-unknown-elf-gcc +*_GCCRISCV_RISCV32_ASLCC_PATH =3D DEF(GCCRISCV_RISCV32_PREFIX)ri= scv64-unknown-elf-gcc +*_GCCRISCV_RISCV32_ASLPP_PATH =3D DEF(GCCRISCV_RISCV32_PREFIX)ri= scv64-unknown-elf-gcc +*_GCCRISCV_RISCV32_RC_PATH =3D DEF(GCCRISCV_RISCV32_PREFIX)ri= scv64-unknown-elf-objcopy + +*_GCCRISCV_RISCV32_ASLCC_FLAGS =3D DEF(GCC_ASLCC_FLAGS) -m32 +*_GCCRISCV_RISCV32_ASLDLINK_FLAGS =3D DEF(GCCRISCV_RISCV32_RISCV64_A= SLDLINK_FLAGS) -m elf_i386 +*_GCCRISCV_RISCV32_ASM_FLAGS =3D DEF(GCCRISCV_ASM_FLAGS) -m32 -= march=3Di386 +*_GCCRISCV_RISCV32_CC_FLAGS =3D DEF(GCCRISCV_RISCV32_CC_FLAGS)= -Os +*_GCCRISCV_RISCV32_DLINK_FLAGS =3D DEF(GCCRISCV_RISCV32_RISCV64_D= LINK_FLAGS) -m elf_i386 --oformat=3Delf32-i386 +*_GCCRISCV_RISCV32_DLINK2_FLAGS =3D DEF(GCCRISCV_RISCV32_DLINK2_FL= AGS) +*_GCCRISCV_RISCV32_RC_FLAGS =3D DEF(GCC_IA32_RC_FLAGS) +*_GCCRISCV_RISCV32_OBJCOPY_FLAGS =3D +*_GCCRISCV_RISCV32_NASM_FLAGS =3D -f elf32 + +################## +# GCCRISCV RISCV64 definitions +################## +*_GCCRISCV_RISCV64_OBJCOPY_PATH =3D DEF(GCCRISCV_RISCV64_PREFIX)ri= scv64-unknown-elf-objcopy +*_GCCRISCV_RISCV64_CC_PATH =3D DEF(GCCRISCV_RISCV64_PREFIX)ri= scv64-unknown-elf-gcc +*_GCCRISCV_RISCV64_SLINK_PATH =3D DEF(GCCRISCV_RISCV64_PREFIX)ri= scv64-unknown-elf-gcc-ar +*_GCCRISCV_RISCV64_DLINK_PATH =3D DEF(GCCRISCV_RISCV64_PREFIX)ri= scv64-unknown-elf-ld +*_GCCRISCV_RISCV64_ASLDLINK_PATH =3D DEF(GCCRISCV_RISCV64_PREFIX)ri= scv64-unknown-elf-ld +*_GCCRISCV_RISCV64_ASM_PATH =3D DEF(GCCRISCV_RISCV64_PREFIX)ri= scv64-unknown-elf-gcc +*_GCCRISCV_RISCV64_PP_PATH =3D DEF(GCCRISCV_RISCV64_PREFIX)ri= scv64-unknown-elf-gcc +*_GCCRISCV_RISCV64_VFRPP_PATH =3D DEF(GCCRISCV_RISCV64_PREFIX)ri= scv64-unknown-elf-gcc +*_GCCRISCV_RISCV64_ASLCC_PATH =3D DEF(GCCRISCV_RISCV64_PREFIX)ri= scv64-unknown-elf-gcc +*_GCCRISCV_RISCV64_ASLPP_PATH =3D DEF(GCCRISCV_RISCV64_PREFIX)ri= scv64-unknown-elf-gcc +*_GCCRISCV_RISCV64_RC_PATH =3D DEF(GCCRISCV_RISCV64_PREFIX)ri= scv64-unknown-elf-objcopy + +*_GCCRISCV_RISCV64_ASLCC_FLAGS =3D DEF(GCC_ASLCC_FLAGS) -m64 +*_GCCRISCV_RISCV64_ASLDLINK_FLAGS =3D DEF(GCCRISCV_RISCV32_RISCV64_A= SLDLINK_FLAGS) -m elf_x86_64 +*_GCCRISCV_RISCV64_ASM_FLAGS =3D DEF(GCCRISCV_ASM_FLAGS)=20 +*_GCCRISCV_RISCV64_CC_FLAGS =3D DEF(GCCRISCV_RISCV64_CC_FLAGS)= -save-temps +*_GCCRISCV_RISCV64_DLINK_FLAGS =3D DEF(GCCRISCV_RISCV64_DLINK_FLA= GS) +*_GCCRISCV_RISCV64_DLINK2_FLAGS =3D DEF(GCCRISCV_RISCV64_DLINK2_FL= AGS) +*_GCCRISCV_RISCV64_RC_FLAGS =3D DEF(GCC_IA32_RC_FLAGS) +*_GCCRISCV_RISCV64_OBJCOPY_FLAGS =3D +*_GCCRISCV_RISCV64_NASM_FLAGS =3D -f elf64 + ##########################################################################= ########## # # CLANG35 - This configuration is used to compile under Linux to produce diff --git a/BaseTools/Source/C/Common/BasePeCoff.c b/BaseTools/Source/C/Co= mmon/BasePeCoff.c index e7566b3..e346e02 100644 --- a/BaseTools/Source/C/Common/BasePeCoff.c +++ b/BaseTools/Source/C/Common/BasePeCoff.c @@ -4,6 +4,7 @@ =20 Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.
Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
+Portions Copyright (c) 2016, Hewlett Packard Enterprise Development LP. Al= l rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -59,6 +60,14 @@ PeCoffLoaderRelocateArmImage ( IN UINT64 Adjust ); =20 +RETURN_STATUS +PeCoffLoaderRelocateRiscVImage ( + IN UINT16 *Reloc, + IN OUT CHAR8 *Fixup, + IN OUT CHAR8 **FixupData, + IN UINT64 Adjust + ); + STATIC RETURN_STATUS PeCoffLoaderGetPeHeader ( @@ -174,7 +183,10 @@ Returns: ImageContext->Machine !=3D EFI_IMAGE_MACHINE_X64 && \ ImageContext->Machine !=3D EFI_IMAGE_MACHINE_ARMT && \ ImageContext->Machine !=3D EFI_IMAGE_MACHINE_EBC && \ - ImageContext->Machine !=3D EFI_IMAGE_MACHINE_AARCH64) { + ImageContext->Machine !=3D EFI_IMAGE_MACHINE_AARCH64 && \ + ImageContext->Machine !=3D EFI_IMAGE_MACHINE_RISCV32 && \ + ImageContext->Machine !=3D EFI_IMAGE_MACHINE_RISCV64 && \ + ImageContext->Machine !=3D EFI_IMAGE_MACHINE_RISCV128) { if (ImageContext->Machine =3D=3D IMAGE_FILE_MACHINE_ARM) { // // There are two types of ARM images. Pure ARM and ARM/Thumb. @@ -802,6 +814,11 @@ Returns: case EFI_IMAGE_MACHINE_ARMT: Status =3D PeCoffLoaderRelocateArmImage (&Reloc, Fixup, &FixupDa= ta, Adjust); break; + case EFI_IMAGE_MACHINE_RISCV32: + case EFI_IMAGE_MACHINE_RISCV64: + case EFI_IMAGE_MACHINE_RISCV128: + Status =3D PeCoffLoaderRelocateRiscVImage (Reloc, Fixup, &FixupD= ata, Adjust); + break; default: Status =3D RETURN_UNSUPPORTED; break; diff --git a/BaseTools/Source/C/Common/PeCoffLoaderEx.c b/BaseTools/Source/= C/Common/PeCoffLoaderEx.c index e367836..867c47b 100644 --- a/BaseTools/Source/C/Common/PeCoffLoaderEx.c +++ b/BaseTools/Source/C/Common/PeCoffLoaderEx.c @@ -3,6 +3,7 @@ IA32 and X64 Specific relocation fixups =20 Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.
Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
+Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights = reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 --*/ @@ -61,6 +62,17 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #define IMM64_SIGN_INST_WORD_POS_X 27 #define IMM64_SIGN_VAL_POS_X 63 =20 +// +// RISC-V definition. +// +#define RV_X(x, s, n) (((x) >> (s)) & ((1<<(n))-1)) +#define RISCV_IMM_BITS 12 +#define RISCV_IMM_REACH (1LL<> 12) { + case EFI_IMAGE_REL_BASED_RISCV_HI20: + RiscVHi20Fixup =3D (UINT32 *) Fixup; + break; + + case EFI_IMAGE_REL_BASED_RISCV_LOW12I: + if (RiscVHi20Fixup !=3D NULL) { + Value =3D (UINT32)(RV_X(*RiscVHi20Fixup, 12, 20) << 12); + Value2 =3D (UINT32)(RV_X(*(UINT32 *)Fixup, 20, 12)); + if (Value2 & (RISCV_IMM_REACH/2)) { + Value2 |=3D ~(RISCV_IMM_REACH-1); + } + Value +=3D Value2; + Value +=3D (UINT32)Adjust; + Value2 =3D RISCV_CONST_HIGH_PART (Value); + *(UINT32 *)RiscVHi20Fixup =3D (RV_X (Value2, 12, 20) << 12) | \ + (RV_X (*(UINT32 *)RiscVHi20Fixu= p, 0, 12)); + *(UINT32 *)Fixup =3D (RV_X (Value, 0, 12) << 20) | \ + (RV_X (*(UINT32 *)Fixup, 0, 20)); + } + RiscVHi20Fixup =3D NULL; + break; + + case EFI_IMAGE_REL_BASED_RISCV_LOW12S: + if (RiscVHi20Fixup !=3D NULL) { + Value =3D (UINT32)(RV_X(*RiscVHi20Fixup, 12, 20) << 12); + Value2 =3D (UINT32)(RV_X(*(UINT32 *)Fixup, 7, 5) | (RV_X(*(UINT32 = *)Fixup, 25, 7) << 5)); + if (Value2 & (RISCV_IMM_REACH/2)) { + Value2 |=3D ~(RISCV_IMM_REACH-1); + } + Value +=3D Value2; + Value +=3D (UINT32)Adjust; + Value2 =3D RISCV_CONST_HIGH_PART (Value); + *(UINT32 *)RiscVHi20Fixup =3D (RV_X (Value2, 12, 20) << 12) | \ + (RV_X (*(UINT32 *)RiscVHi20Fixu= p, 0, 12)); + Value2 =3D *(UINT32 *)Fixup & 0x01fff07f; + Value &=3D RISCV_IMM_REACH - 1; + *(UINT32 *)Fixup =3D Value2 | (UINT32)(((RV_X(Value, 0, 5) << 7) |= (RV_X(Value, 5, 7) << 25))); + } + RiscVHi20Fixup =3D NULL; + break; + + default: + return EFI_UNSUPPORTED; + + } + return RETURN_SUCCESS; +} + /** Pass in a pointer to an ARM MOVT or MOVW immediate instruction and return the immediate data encoded in the instruction diff --git a/BaseTools/Source/C/GenFv/GenFvInternalLib.c b/BaseTools/Source= /C/GenFv/GenFvInternalLib.c index 908740d..b1dc7ec 100644 --- a/BaseTools/Source/C/GenFv/GenFvInternalLib.c +++ b/BaseTools/Source/C/GenFv/GenFvInternalLib.c @@ -4,6 +4,7 @@ This file contains the internal functions required to gener= ate a Firmware Volume Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.
Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
Portions Copyright (c) 2016 HP Development Company, L.P.
+Portions Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development= LP. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -37,6 +38,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #define ARM64_UNCONDITIONAL_JUMP_INSTRUCTION 0x14000000 =20 BOOLEAN mArm =3D FALSE; +BOOLEAN mRiscV =3D FALSE; STATIC UINT32 MaxFfsAlignment =3D 0; BOOLEAN VtfFileFlag =3D FALSE; =20 @@ -1802,6 +1804,154 @@ if (MachineType =3D=3D EFI_IMAGE_MACHINE_IA32 || Ma= chineType =3D=3D EFI_IMAGE_MACHINE_X6 } =20 EFI_STATUS +RiscvPatchVtfTrapHandler (EFI_FFS_FILE_HEADER *VtfFileImage, UINTN UserTra= pAddressInFile) +/*++ + +Routine Description: + This patches RISC-V trap handler in VTF. + 0xF...FE00 Trap from user-mode + 0xF...FE40 Trap from supervisor-mode + 0xF...FE80 Trap from hypervisor-mode + 0xF...FEC0 Trap from machine-mode + 0xF...FEFC Non-maskable interrupt(s) +=20 +Arguments: + VtfFileImage VTF file. + UserTrapAddressInFile User Trap address in file image. + +Returns: + + EFI_SUCCESS Function Completed successfully. + EFI_ABORTED Error encountered. + EFI_INVALID_PARAMETER A required parameter was NULL. + EFI_NOT_FOUND PEI Core file not found. + +--*/ +{ + EFI_STATUS Status; + EFI_FILE_SECTION_POINTER Pe32Section; + UINT32 EntryPoint; + UINT32 BaseOfCode; + UINT16 MachineType; + UINT8 *HighTrapVectorAddress; + UINTN TrapPrivilegeNum; + + if (UserTrapAddressInFile =3D=3D 0) { + return EFI_INVALID_PARAMETER; + } + + Status =3D GetSectionByType (VtfFileImage, EFI_SECTION_PE32, 1, &Pe32Sec= tion); // Get PE32 section. + if (!EFI_ERROR (Status)) { + Status =3D GetPe32Info ( // Get entry point. + (VOID *) ((UINTN) Pe32Section.Pe32Section + GetSectionHeaderLength= (Pe32Section.CommonHeader)), + &EntryPoint, + &BaseOfCode, + &MachineType + ); + if (!EFI_ERROR (Status)) { + // + // Pacth trap handler. + // + HighTrapVectorAddress =3D (UINT8 *)((UINTN)EntryPoint + ((UINTN) Pe3= 2Section.Pe32Section + GetSectionHeaderLength(Pe32Section.CommonHeader))); + HighTrapVectorAddress -=3D (0x10 + 0x100); + + // + // Patch all privilege trap bases. + // + for (TrapPrivilegeNum =3D 0; TrapPrivilegeNum < 4; TrapPrivilegeNum = ++) { + *((UINT32 *)HighTrapVectorAddress) =3D (*((UINT32 *)HighTrapVector= Address) & 0xfff) | (*((UINT32 *)(UINTN)UserTrapAddressInFile) & 0xfffff000= );=20 + *((UINT32 *)(HighTrapVectorAddress + 4)) =3D (*((UINT32 *)(HighTra= pVectorAddress + 4)) & 0x000fffff) | ((*((UINT32 *)(UINTN)UserTrapAddressIn= File) & 0xfff) << 20); + HighTrapVectorAddress +=3D 0x40; + UserTrapAddressInFile +=3D 8; + } + + return EFI_SUCCESS; + } else { + Error (NULL, 0, 3000, "Invalid", "Patch RISC-V trap: Incorrect PE32 = format of RISC-V VTF"); + } + } else { + Error (NULL, 0, 3000, "Invalid", "atch RISC-V trap: Can't find PE32 se= ction of RISC-V VTF."); + } + return EFI_UNSUPPORTED; +} + +EFI_STATUS +RiscvPatchVtf (EFI_FFS_FILE_HEADER *VtfFileImage, UINT32 ResetVector) +/*++ + +Routine Description: + This patches the entry point of either SecCore or=20 + + For RISC-V ISA, the reset vector is at 0xfff~ff00h or 200h + +Arguments: + VtfFileImage VTF file. + ResetVector Entry point for reset vector. + +Returns: + + EFI_SUCCESS Function Completed successfully. + EFI_ABORTED Error encountered. + EFI_INVALID_PARAMETER A required parameter was NULL. + EFI_NOT_FOUND PEI Core file not found. + +--*/ +{ + EFI_STATUS Status; + EFI_FILE_SECTION_POINTER Pe32Section; + UINT32 EntryPoint; + UINT8 *EntryPointAddress; + UINT32 *LoadHigh20BitInstrcutionAddr; + UINT32 *JmpLow12BitInstrcutionAddr; + UINT32 LoadHigh20BitAddressOffset; + UINT32 JmpLow12BitAddressOffset; + UINT32 BaseOfCode; + UINT16 MachineType; + UINT32 LoadHigh20BitOpc; + UINT32 JmpLow12BitOpc; + + if (ResetVector =3D=3D 0) { + return EFI_INVALID_PARAMETER; + } + + Status =3D GetSectionByType (VtfFileImage, EFI_SECTION_PE32, 1, &Pe32Sec= tion); // Get PE32 section. + if (!EFI_ERROR (Status)) { + Status =3D GetPe32Info ( // Get entry point. + (VOID *) ((UINTN) Pe32Section.Pe32Section + GetSectionHeaderLength= (Pe32Section.CommonHeader)), + &EntryPoint, + &BaseOfCode, + &MachineType + ); + if (!EFI_ERROR (Status)) { + EntryPointAddress =3D (UINT8 *)((UINTN)EntryPoint + ((UINTN) Pe32Sec= tion.Pe32Section + GetSectionHeaderLength(Pe32Section.CommonHeader))); + LoadHigh20BitAddressOffset =3D *((UINT32 *)(EntryPointAddress - 16))= ; // (Entrypoint - 16) map to the second qword from Entrypoint + JmpLow12BitAddressOffset =3D *((UINT32 *)(EntryPointAddress - 8)); /= / (Entrypoint - 8) map to the second qword from Entrypoint + LoadHigh20BitInstrcutionAddr =3D (UINT32 *)(EntryPointAddress + Load= High20BitAddressOffset); + JmpLow12BitInstrcutionAddr =3D (UINT32 *)(EntryPointAddress + JmpLow= 12BitAddressOffset); + // + // Patch RISC-V instruction : li a0, 0x12345000 + // + LoadHigh20BitOpc =3D *LoadHigh20BitInstrcutionAddr; + LoadHigh20BitOpc =3D (LoadHigh20BitOpc & 0xfff) | (ResetVector & 0xf= ffff000); + *((UINT32 *)(EntryPointAddress - 16)) =3D LoadHigh20BitOpc; + // + // Patch RISC-V instruction : jalr x0, a0, 0x678 + // + JmpLow12BitOpc =3D *JmpLow12BitInstrcutionAddr; + JmpLow12BitOpc =3D (JmpLow12BitOpc & 0x000fffff) | ((ResetVector & 0= xfff) << 20); + *((UINT32 *)(EntryPointAddress - 12)) =3D JmpLow12BitOpc; + return EFI_SUCCESS; + } else { + Error (NULL, 0, 3000, "Invalid", "Incorrect PE32 format of RISC-V VT= F"); + } + } else { + Error (NULL, 0, 3000, "Invalid", "Can't find PE32 section of RISC-V VT= F."); + } + return EFI_UNSUPPORTED; +} + + +EFI_STATUS FindCorePeSection( IN VOID *FvImageBuffer, IN UINT64 FvSize, @@ -2274,6 +2424,106 @@ Returns: } =20 EFI_STATUS +UpdateRiscvResetVectorIfNeeded ( + MEMORY_FILE *FvImage, + FV_INFO *FvInfo + ) +/*++ + +Routine Description: + This parses the FV looking for SEC and patches that address into the=20 + beginning of the FV header. + + For RISC-V ISA, the reset vector is at 0xfff~ff00h or 200h + +Arguments: + FvImage Memory file for the FV memory image/ + FvInfo Information read from INF file. + +Returns: + + EFI_SUCCESS Function Completed successfully. + EFI_ABORTED Error encountered. + EFI_INVALID_PARAMETER A required parameter was NULL. + EFI_NOT_FOUND PEI Core file not found. + +--*/ +{ + EFI_STATUS Status; + UINT16 MachineType; + EFI_FILE_SECTION_POINTER SecPe32; + EFI_PHYSICAL_ADDRESS SecCoreEntryAddress; + + UINT32 bSecCore; + UINT32 tmp; + + + // + // Verify input parameters + // + if (FvImage =3D=3D NULL || FvInfo =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + // + // Initialize FV library + // + InitializeFvLib (FvImage->FileImage, FvInfo->Size); + + // + // Find the Sec Core + // + Status =3D FindCorePeSection(FvImage->FileImage, FvInfo->Size, EFI_FV_FI= LETYPE_SECURITY_CORE, &SecPe32);=20 + if(EFI_ERROR(Status)) { + printf("skip because Secutiry Core not found\n"); + return EFI_SUCCESS; + } + + DebugMsg (NULL, 0, 9, "Update SEC core in FV Header", NULL); + + Status =3D GetCoreMachineType(SecPe32, &MachineType); + if(EFI_ERROR(Status)) { + Error(NULL, 0, 3000, "Invalid", "Could not get the PE32 machine type f= or SEC core."); + return EFI_ABORTED; + } + + if ((MachineType !=3D EFI_IMAGE_MACHINE_RISCV32) && (MachineType !=3D EF= I_IMAGE_MACHINE_RISCV64)) { + Error(NULL, 0, 3000, "Invalid", "Could not update SEC core because Mac= hine type is not RiscV."); + return EFI_ABORTED; + } + + Status =3D GetCoreEntryPointAddress(FvImage->FileImage, FvInfo, SecPe32,= &SecCoreEntryAddress); + if(EFI_ERROR(Status)) { + Error(NULL, 0, 3000, "Invalid", "Could not get the PE32 entry point ad= dress for SEC Core."); + return EFI_ABORTED; + } + + VerboseMsg("SecCore entry point Address =3D 0x%llX", (unsigned long long= ) SecCoreEntryAddress); + VerboseMsg("BaseAddress =3D 0x%llX", (unsigned long long) FvInfo->BaseAd= dress); + bSecCore =3D (SecCoreEntryAddress - FvInfo->BaseAddress); + VerboseMsg("offset =3D 0x%llX", bSecCore); + + if(bSecCore > 0x0fffff) { + Error(NULL, 0, 3000, "Invalid", "SEC Entry point must be within 1MB of= start of the FV"); + return EFI_ABORTED; + } + + tmp =3D bSecCore; + bSecCore =3D 0; + //J-type + bSecCore =3D (tmp&0x100000)<<11; //imm[20] at bit[31] + bSecCore |=3D (tmp&0x0007FE)<<20; //imm[10:1] at bit[30:21] + bSecCore |=3D (tmp&0x000800)<<9; //imm[11] at bit[20] + bSecCore |=3D (tmp&0x0FF000); //imm[19:12] at bit[19:12] + bSecCore |=3D 0x6F; //JAL opcode + + memcpy(FvImage->FileImage, &bSecCore, sizeof(bSecCore)); + + return EFI_SUCCESS; +} + + + +EFI_STATUS GetPe32Info ( IN UINT8 *Pe32, OUT UINT32 *EntryPoint, @@ -2365,7 +2615,8 @@ Returns: // Verify machine type is supported // if ((*MachineType !=3D EFI_IMAGE_MACHINE_IA32) && (*MachineType !=3D EF= I_IMAGE_MACHINE_X64) && (*MachineType !=3D EFI_IMAGE_MACHINE_EBC) && - (*MachineType !=3D EFI_IMAGE_MACHINE_ARMT) && (*MachineType !=3D EFI= _IMAGE_MACHINE_AARCH64)) { + (*MachineType !=3D EFI_IMAGE_MACHINE_ARMT) && (*MachineType !=3D EFI= _IMAGE_MACHINE_AARCH64) && + (*MachineType !=3D EFI_IMAGE_MACHINE_RISCV32) && (*MachineType !=3D = EFI_IMAGE_MACHINE_RISCV64) && (*MachineType !=3D EFI_IMAGE_MACHINE_RISCV128= )) { Error (NULL, 0, 3000, "Invalid", "Unrecognized machine type in the PE3= 2 file."); return EFI_UNSUPPORTED; } @@ -2777,7 +3028,6 @@ Returns: FvHeader->Checksum =3D 0; FvHeader->Checksum =3D CalculateChecksum16 ((UINT16 *) FvHeader, = FvHeader->HeaderLength / sizeof (UINT16)); } - // // Add files to FV // @@ -2808,7 +3058,8 @@ Returns: Error (NULL, 0, 4002, "Resource", "FV space is full, cannot add pad = file between the last file and the VTF file."); goto Finish; } - if (!mArm) { + + if (!mArm && !mRiscV) { // // Update reset vector (SALE_ENTRY for IPF) // Now for IA32 and IA64 platform, the fv which has bsf file must ha= ve the @@ -2843,6 +3094,22 @@ Returns: FvHeader->Checksum =3D CalculateChecksum16 ((UINT16 *) FvHeader, FvHea= der->HeaderLength / sizeof (UINT16)); } =20 + if (mRiscV) { + // + // Update RISCV reset vector. + // + Status =3D UpdateRiscvResetVectorIfNeeded (&FvImageMemoryFile, &mFvDa= taInfo); + if (EFI_ERROR (Status)) { + Error (NULL, 0, 3000, "Invalid", "Could not update the reset vector= for RISC-V."); + goto Finish; + } + // + // Update Checksum for FvHeader + // + FvHeader->Checksum =3D 0; + FvHeader->Checksum =3D CalculateChecksum16 ((UINT16 *) FvHeader, FvHea= der->HeaderLength / sizeof (UINT16)); + } + // // Update FV Alignment attribute to the largest alignment of all the FFS= files in the FV // @@ -3430,6 +3697,12 @@ Returns: mArm =3D TRUE; } =20 + if ( (ImageContext.Machine =3D=3D EFI_IMAGE_MACHINE_RISCV32) || + (ImageContext.Machine =3D=3D EFI_IMAGE_MACHINE_RISCV64) || + (ImageContext.Machine =3D=3D EFI_IMAGE_MACHINE_RISCV128)) { + mRiscV =3D TRUE; + } + // // Keep Image Context for PE image in FV // @@ -3583,7 +3856,7 @@ Returns: ImageContext.DestinationAddress =3D NewPe32BaseAddress; Status =3D PeCoffLoaderRelocateImage (&ImageC= ontext); if (EFI_ERROR (Status)) { - Error (NULL, 0, 3000, "Invalid", "RelocateImage() call failed on reb= ase of %s", FileName); + Error (NULL, 0, 3000, "Invalid", "RelocateImage() call failed on reb= ase of %s Status=3D%d", FileName, Status); free ((VOID *) MemoryImagePointer); return Status; } diff --git a/BaseTools/Source/C/GenFw/Elf32Convert.c b/BaseTools/Source/C/G= enFw/Elf32Convert.c index 46089ff..3e47475 100644 --- a/BaseTools/Source/C/GenFw/Elf32Convert.c +++ b/BaseTools/Source/C/GenFw/Elf32Convert.c @@ -3,6 +3,7 @@ Elf32 Convert solution =20 Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.
Portions copyright (c) 2013, ARM Ltd. All rights reserved.
+Portions Copyright (c) 2016, Hewlett Packard Enterprise Development LP. Al= l rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -141,8 +142,9 @@ InitializeElf32 ( Error (NULL, 0, 3000, "Unsupported", "ELF e_type not ET_EXEC or ET_DYN= "); return FALSE; } - if (!((mEhdr->e_machine =3D=3D EM_386) || (mEhdr->e_machine =3D=3D EM_AR= M))) { - Error (NULL, 0, 3000, "Unsupported", "ELF e_machine not EM_386 or EM_A= RM"); + + if (!((mEhdr->e_machine =3D=3D EM_386) || (mEhdr->e_machine =3D=3D EM_AR= M) || (mEhdr->e_machine =3D=3D EM_RISCV))) { + Error (NULL, 0, 3000, "Unsupported", "ELF e_machine not EM_386, EM_ARM= or EM_RISCV"); return FALSE; } if (mEhdr->e_version !=3D EV_CURRENT) { diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c b/BaseTools/Source/C/G= enFw/Elf64Convert.c index 3d6319c..e65f640 100644 --- a/BaseTools/Source/C/GenFw/Elf64Convert.c +++ b/BaseTools/Source/C/GenFw/Elf64Convert.c @@ -3,6 +3,7 @@ Elf64 convert solution =20 Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.
Portions copyright (c) 2013-2014, ARM Ltd. All rights reserved.
+Portions Copyright (c) 2016 - 2017 Hewlett Packard Enterprise Development = LP. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -31,6 +32,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include "ElfConvert.h" #include "Elf64Convert.h" =20 +#define RV_X(x, s, n) (((x) >> (s)) & ((1<<(n))-1)) +#define RISCV_IMM_BITS 12 +#define RISCV_IMM_REACH (1LL<e_machine =3D=3D EM_X86_64) || (mEhdr->e_machine =3D=3D EM= _AARCH64) || (mEhdr->e_machine =3D=3D EM_RISCV64))) { + Error (NULL, 0, 3000, "Unsupported", "ELF e_machine not EM_X86_64, EM_= AARCH64 or EM_RISCV64"); return FALSE; } if (mEhdr->e_version !=3D EV_CURRENT) { @@ -481,6 +489,7 @@ ScanSections64 ( switch (mEhdr->e_machine) { case EM_X86_64: case EM_AARCH64: + case EM_RISCV64: mCoffOffset +=3D sizeof (EFI_IMAGE_NT_HEADERS64); break; default: @@ -690,6 +699,12 @@ ScanSections64 ( NtHdr->Pe32Plus.FileHeader.Machine =3D EFI_IMAGE_MACHINE_AARCH64; NtHdr->Pe32Plus.OptionalHeader.Magic =3D EFI_IMAGE_NT_OPTIONAL_HDR64_M= AGIC; break; + + case EM_RISCV64: + NtHdr->Pe32Plus.FileHeader.Machine =3D EFI_IMAGE_MACHINE_RISCV64; + NtHdr->Pe32Plus.OptionalHeader.Magic =3D EFI_IMAGE_NT_OPTIONAL_HDR64_M= AGIC; + break; + default: VerboseMsg ("%s unknown e_machine type. Assume X64", (UINTN)mEhdr->e_m= achine); NtHdr->Pe32Plus.FileHeader.Machine =3D EFI_IMAGE_MACHINE_X64; @@ -769,6 +784,11 @@ WriteSections64 ( Elf_Shdr *SecShdr; UINT32 SecOffset; BOOLEAN (*Filter)(Elf_Shdr *); + UINT32 Value; + UINT32 Value2; + UINT8 *RiscvHi20Targ =3D NULL; + Elf_Shdr *RiscvHi20Sym =3D NULL; + Elf64_Half RiscvSymSecIndex =3D 0; Elf64_Addr GOTEntryRva; =20 // @@ -893,13 +913,14 @@ WriteSections64 ( if (SymName =3D=3D NULL) { SymName =3D (const UINT8 *)""; } - - Error (NULL, 0, 3000, "Invalid", - "%s: Bad definition for symbol '%s'@%#llx or unsupported = symbol type. " - "For example, absolute and undefined symbols are not supp= orted.", - mInImageName, SymName, Sym->st_value); - - exit(EXIT_FAILURE); + if (mEhdr->e_machine !=3D EM_RISCV64) { + Error (NULL, 0, 3000, "Invalid", + "%s: Bad definition for symbol '%s'@%#llx or unsupporte= d symbol type. " + "For example, absolute and undefined symbols are not su= pported.", + mInImageName, SymName, Sym->st_value); + + exit(EXIT_FAILURE); + } } SymShdr =3D GetShdrByIndex(Sym->st_shndx); =20 @@ -1114,6 +1135,135 @@ WriteSections64 ( default: Error (NULL, 0, 3000, "Invalid", "WriteSections64(): %s unsupp= orted ELF EM_AARCH64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE= (Rel->r_info)); } + } else if (mEhdr->e_machine =3D=3D EM_RISCV64) { + switch (ELF_R_TYPE(Rel->r_info)) { + case R_RISCV_NONE: + break; + case R_RISCV_32: + *(UINT32 *)Targ =3D (UINT32)((UINT64)(*(UINT32 *)Targ) - SymSh= dr->sh_addr + mCoffSectionsOffset[Sym->st_shndx]); + break; + case R_RISCV_64: + *(UINT64 *)Targ =3D *(UINT64 *)Targ - SymShdr->sh_addr + mCoff= SectionsOffset[Sym->st_shndx]; + break; + case R_RISCV_HI20: + RiscvHi20Targ =3D Targ; + RiscvHi20Sym =3D SymShdr; + RiscvSymSecIndex =3D Sym->st_shndx; + break; + case R_RISCV_LO12_I: + if (RiscvHi20Sym =3D=3D SymShdr && RiscvHi20Targ !=3D NULL && = RiscvSymSecIndex =3D=3D Sym->st_shndx && RiscvSymSecIndex !=3D 0) { + Value =3D (UINT32)(RV_X(*(UINT32 *)RiscvHi20Targ, 12, 20) <<= 12); + Value2 =3D (UINT32)(RV_X(*(UINT32 *)Targ, 20, 12)); + if (Value2 & (RISCV_IMM_REACH/2)) { + Value2 |=3D ~(RISCV_IMM_REACH-1); + } + Value +=3D Value2; + Value =3D Value - SymShdr->sh_addr + mCoffSectionsOffset[Sym= ->st_shndx]; + Value2 =3D RISCV_CONST_HIGH_PART (Value); + *(UINT32 *)RiscvHi20Targ =3D (RV_X (Value2, 12, 20) << 12) |= \ + (RV_X (*(UINT32 *)RiscvHi20Targ, = 0, 12)); + *(UINT32 *)Targ =3D (RV_X (Value, 0, 12) << 20) | \ + (RV_X (*(UINT32 *)Targ, 0, 20)); + } + RiscvHi20Sym =3D NULL; + RiscvHi20Targ =3D NULL; + RiscvSymSecIndex =3D 0; + break; + + case R_RISCV_LO12_S: + if (RiscvHi20Sym =3D=3D SymShdr && RiscvHi20Targ !=3D NULL && = RiscvSymSecIndex =3D=3D Sym->st_shndx && RiscvSymSecIndex !=3D 0) { + Value =3D (UINT32)(RV_X(*(UINT32 *)RiscvHi20Targ, 12, 20) <<= 12); + Value2 =3D (UINT32)(RV_X(*(UINT32 *)Targ, 7, 5) | (RV_X(*(UI= NT32 *)Targ, 25, 7) << 5)); + if (Value2 & (RISCV_IMM_REACH/2)) { + Value2 |=3D ~(RISCV_IMM_REACH-1); + } + Value +=3D Value2; + Value =3D Value - SymShdr->sh_addr + mCoffSectionsOffset[Sym= ->st_shndx]; + Value2 =3D RISCV_CONST_HIGH_PART (Value); + *(UINT32 *)RiscvHi20Targ =3D (RV_X (Value2, 12, 20) << 12) |= \ + (RV_X (*(UINT32 *)RiscvHi20Targ, = 0, 12)); + + Value2 =3D *(UINT32 *)Targ & 0x01fff07f; + Value &=3D RISCV_IMM_REACH - 1; + *(UINT32 *)Targ =3D Value2 | (UINT32)(((RV_X(Value, 0, 5) <<= 7) | (RV_X(Value, 5, 7) << 25))); + } + RiscvHi20Sym =3D NULL; + RiscvHi20Targ =3D NULL; + RiscvSymSecIndex =3D 0; + break; + + case R_RISCV_PCREL_HI20: + RiscvHi20Targ =3D Targ; + RiscvHi20Sym =3D SymShdr; + RiscvSymSecIndex =3D Sym->st_shndx; + + Value =3D (UINT32)(RV_X(*(UINT32 *)RiscvHi20Targ, 12, 20)); + //printf("PCREL_HI20 Sym:[%s] value:0x%x SymShdr->sh_addr:0x%l= x mCoffSectionOffset:%x \n", GetSymName(Sym), Value, SymShdr->sh_addr, mCof= fSectionsOffset[Sym->st_shndx]); + break; + case R_RISCV_PCREL_LO12_I: + if (RiscvHi20Targ !=3D NULL && RiscvHi20Sym !=3D NULL && Riscv= SymSecIndex !=3D 0) { + int i; + Value2 =3D (UINT32)(RV_X(*(UINT32 *)RiscvHi20Targ, 12, 20)); + Value =3D (UINT32)(RV_X(*(UINT32 *)Targ, 20, 12)); + if(Value & (RISCV_IMM_REACH/2)) { + Value |=3D ~(RISCV_IMM_REACH-1); + } + //printf("PCREL_LO12_I Sym:[%s] value:0x%x SymShdr->sh_addr:= 0x%lx mCoffSectionOffset:%x \n", GetSymName(Sym), Value, SymShdr->sh_addr, = mCoffSectionsOffset[Sym->st_shndx]); + Value =3D Value - RiscvHi20Sym->sh_addr + mCoffSectionsOffse= t[RiscvSymSecIndex]; + if(-2048 > (INT32)Value) { =20 + i =3D (-Value / 4096); =20 + //Error (NULL, 0, 3000, "Invalid", "WriteSections64(): PCR= EL_LO12_I relocation out of range. %d i=3D%d", Value, i); + printf("WriteSections64(): PCREL_LO12_I relocation out of = range. Value:%d Value2:%d i=3D%d\n", Value, Value2, i); + Value2 -=3D i; + Value +=3D 4096 * i; + if(-2048 > (INT32)Value) { + Value2 -=3D 1; + Value +=3D 4096; + } + } + else if( 2047 < (INT32)Value) { + i =3D (Value / 4096); + //Error (NULL, 0, 3000, "Invalid", "WriteSections64(): PCR= EL_LO12_I relocation out of range. %d i=3D%d", Value, i); + printf("WriteSections64(): PCREL_LO12_I relocation out of = range. Value:%d Value2:%d i=3D%d\n", Value, Value2, i); + Value2 +=3D i; + Value -=3D 4096 * i; + if(2047 < (INT32)Value) { + Value2 +=3D 1; + Value -=3D 4096; + } + } + + *(UINT32 *)Targ =3D (RV_X(Value, 0, 12) << 20) | (RV_X(*(UIN= T32*)Targ, 0, 20)); + *(UINT32 *)RiscvHi20Targ =3D (RV_X(Value2, 0, 20)<<12) | (RV= _X(*(UINT32 *)RiscvHi20Targ, 0, 12)); + //printf("PCREL_LO12_I Sym:[%s] relocated value:0x%x(%d) val= ue2:0x%x(%d) SymShdr->sh_addr:0x%lx mCoffSectionOffset:%x \n", GetSymName(S= ym), Value, Value, Value2, Value2, SymShdr->sh_addr, mCoffSectionsOffset[S= ym->st_shndx]); + } + RiscvHi20Sym =3D NULL; + RiscvHi20Targ =3D NULL; + RiscvSymSecIndex =3D 0; + break; + + case R_RISCV_ADD64: + case R_RISCV_SUB64: + case R_RISCV_ADD32: + case R_RISCV_SUB32: + case R_RISCV_BRANCH: + case R_RISCV_JAL: + case R_RISCV_GPREL_I: + case R_RISCV_GPREL_S: + case R_RISCV_CALL: + case R_RISCV_RVC_BRANCH: + case R_RISCV_RVC_JUMP: + case R_RISCV_RELAX: + case R_RISCV_SUB6: + case R_RISCV_SET6: + case R_RISCV_SET8: + case R_RISCV_SET16: + case R_RISCV_SET32: + break; + + default: + Error (NULL, 0, 3000, "Invalid", "WriteSections64(): %s unsupp= orted ELF EM_RISCV64 relocation 0x%x.", mInImageName, (unsigned) ELF_R_TYPE= (Rel->r_info)); + } } else { Error (NULL, 0, 3000, "Invalid", "Not a supported machine type"); } @@ -1133,6 +1283,7 @@ WriteRelocations64 ( UINT32 Index; EFI_IMAGE_OPTIONAL_HEADER_UNION *NtHdr; EFI_IMAGE_DATA_DIRECTORY *Dir; + UINT32 RiscVRelType; =20 for (Index =3D 0; Index < mEhdr->e_shnum; Index++) { Elf_Shdr *RelShdr =3D GetShdrByIndex(Index); @@ -1237,8 +1388,110 @@ WriteRelocations64 ( default: Error (NULL, 0, 3000, "Invalid", "WriteRelocations64(): %s= unsupported ELF EM_AARCH64 relocation 0x%x.", mInImageName, (unsigned) ELF= _R_TYPE(Rel->r_info)); } + } else if (mEhdr->e_machine =3D=3D EM_RISCV64) { + RiscVRelType =3D ELF_R_TYPE(Rel->r_info); + switch (RiscVRelType) { + case R_RISCV_NONE: + break; + + case R_RISCV_32: + CoffAddFixup( + (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info] + + (Rel->r_offset - SecShdr->sh_addr)), + EFI_IMAGE_REL_BASED_HIGHLOW); + break; + + case R_RISCV_64: + CoffAddFixup( + (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info] + + (Rel->r_offset - SecShdr->sh_addr)), + EFI_IMAGE_REL_BASED_DIR64); + break; + + case R_RISCV_HI20: + CoffAddFixup( + (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info] + + (Rel->r_offset - SecShdr->sh_addr)), + EFI_IMAGE_REL_BASED_RISCV_HI20); + break; + + case R_RISCV_LO12_I: + CoffAddFixup( + (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info] + + (Rel->r_offset - SecShdr->sh_addr)), + EFI_IMAGE_REL_BASED_RISCV_LOW12I); + break; + + case R_RISCV_LO12_S: + CoffAddFixup( + (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info] + + (Rel->r_offset - SecShdr->sh_addr)), + EFI_IMAGE_REL_BASED_RISCV_LOW12S); + break; + + case R_RISCV_ADD64: + CoffAddFixup( + (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info] + + (Rel->r_offset - SecShdr->sh_addr)), + EFI_IMAGE_REL_BASED_ABSOLUTE); + break; + + case R_RISCV_SUB64: + CoffAddFixup( + (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info] + + (Rel->r_offset - SecShdr->sh_addr)), + EFI_IMAGE_REL_BASED_ABSOLUTE); + break; + + case R_RISCV_ADD32: + CoffAddFixup( + (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info] + + (Rel->r_offset - SecShdr->sh_addr)), + EFI_IMAGE_REL_BASED_ABSOLUTE); + break; + + case R_RISCV_SUB32: + CoffAddFixup( + (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info] + + (Rel->r_offset - SecShdr->sh_addr)), + EFI_IMAGE_REL_BASED_ABSOLUTE); + break; + + case R_RISCV_BRANCH: + CoffAddFixup( + (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info] + + (Rel->r_offset - SecShdr->sh_addr)), + EFI_IMAGE_REL_BASED_ABSOLUTE); + break; + + case R_RISCV_JAL: + CoffAddFixup( + (UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info] + + (Rel->r_offset - SecShdr->sh_addr)), + EFI_IMAGE_REL_BASED_ABSOLUTE); + break; + + case R_RISCV_GPREL_I: + case R_RISCV_GPREL_S: + case R_RISCV_CALL: + case R_RISCV_RVC_BRANCH: + case R_RISCV_RVC_JUMP: + case R_RISCV_RELAX: + case R_RISCV_SUB6: + case R_RISCV_SET6: + case R_RISCV_SET8: + case R_RISCV_SET16: + case R_RISCV_SET32: + case R_RISCV_PCREL_HI20: + case R_RISCV_PCREL_LO12_I: + break; + + default: + printf ("Unsupported RISCV64 ELF relocation type 0x%x, offse= t: %lx\n", RiscVRelType, Rel->r_offset); + Error (NULL, 0, 3000, "Invalid", "WriteRelocations64(): %s u= nsupported ELF EM_RISCV64 relocation 0x%x.", mInImageName, (unsigned) ELF_R= _TYPE(Rel->r_info)); + } } else { - Error (NULL, 0, 3000, "Not Supported", "This tool does not sup= port relocations for ELF with e_machine %u (processor type).", (unsigned) m= Ehdr->e_machine); + Error (NULL, 0, 3000, "Not Supported", "This tool does not s= upport relocations for ELF with e_machine %u (processor type).", (unsigned)= mEhdr->e_machine); } } if (mEhdr->e_machine =3D=3D EM_X86_64 && RelShdr->sh_info =3D=3D m= GOTShindex) { diff --git a/BaseTools/Source/C/GenFw/elf_common.h b/BaseTools/Source/C/Gen= Fw/elf_common.h index 15c9e33..5f286cc 100644 --- a/BaseTools/Source/C/GenFw/elf_common.h +++ b/BaseTools/Source/C/GenFw/elf_common.h @@ -3,6 +3,7 @@ Ported ELF include files from FreeBSD =20 Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
+Portion Copyright (c) 2016 - 2017, Hewlett Packard Enterprise Development = LP. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 =20 @@ -178,6 +179,9 @@ typedef struct { #define EM_X86_64 62 /* Advanced Micro Devices x86-64 */ #define EM_AMD64 EM_X86_64 /* Advanced Micro Devices x86-64 (compat) */ #define EM_AARCH64 183 /* ARM 64bit Architecture */ +#define EM_RISCV64 243 /* 64bit RISC-V Architecture */ +#define EM_RISCV 244 /* 32bit RISC-V Architecture */ +#define EM_RISCV128 245 /* 128bit RISC-V Architecture */ =20 /* Non-standard or deprecated. */ #define EM_486 6 /* Intel i486. */ @@ -979,5 +983,64 @@ typedef struct { #define R_X86_64_GOTPCRELX 41 /* Load from 32 bit signed pc relative of= fset to GOT entry without REX prefix, relaxable. */ #define R_X86_64_REX_GOTPCRELX 42 /* Load from 32 bit signed pc relativ= e offset to GOT entry with REX prefix, relaxable. */ =20 +/*=20 + * RISC-V relocation types=20 + */=20 +=20 +/* Relocation types used by the dynamic linker */ +#define R_RISCV_NONE 0 +#define R_RISCV_32 1 +#define R_RISCV_64 2 +#define R_RISCV_RELATIVE 3 +#define R_RISCV_COPY 4 +#define R_RISCV_JUMP_SLOT 5 +#define R_RISCV_TLS_DTPMOD32 6 +#define R_RISCV_TLS_DTPMOD64 7 +#define R_RISCV_TLS_DTPREL32 8 +#define R_RISCV_TLS_DTPREL64 9 +#define R_RISCV_TLS_TPREL32 10 +#define R_RISCV_TLS_TPREL64 11 =20 +/* Relocation types not used by the dynamic linker */ +#define R_RISCV_BRANCH 16 +#define R_RISCV_JAL 17 +#define R_RISCV_CALL 18 +#define R_RISCV_CALL_PLT 19 +#define R_RISCV_GOT_HI20 20 +#define R_RISCV_TLS_GOT_HI20 21 +#define R_RISCV_TLS_GD_HI20 22 +#define R_RISCV_PCREL_HI20 23 +#define R_RISCV_PCREL_LO12_I 24 +#define R_RISCV_PCREL_LO12_S 25 +#define R_RISCV_HI20 26 +#define R_RISCV_LO12_I 27 +#define R_RISCV_LO12_S 28 +#define R_RISCV_TPREL_HI20 29 +#define R_RISCV_TPREL_LO12_I 30 +#define R_RISCV_TPREL_LO12_S 31 +#define R_RISCV_TPREL_ADD 32 +#define R_RISCV_ADD8 33 +#define R_RISCV_ADD16 34 +#define R_RISCV_ADD32 35 +#define R_RISCV_ADD64 36 +#define R_RISCV_SUB8 37 +#define R_RISCV_SUB16 38 +#define R_RISCV_SUB32 39 +#define R_RISCV_SUB64 40 +#define R_RISCV_GNU_VTINHERIT 41 +#define R_RISCV_GNU_VTENTRY 42 +#define R_RISCV_ALIGN 43 +#define R_RISCV_RVC_BRANCH 44 +#define R_RISCV_RVC_JUMP 45 +#define R_RISCV_RVC_LUI 46 +#define R_RISCV_GPREL_I 47 +#define R_RISCV_GPREL_S 48 +#define R_RISCV_TPREL_I 49 +#define R_RISCV_TPREL_S 50 +#define R_RISCV_RELAX 51 +#define R_RISCV_SUB6 52 +#define R_RISCV_SET6 53 +#define R_RISCV_SET8 54 +#define R_RISCV_SET16 55 +#define R_RISCV_SET32 56 #endif /* !_SYS_ELF_COMMON_H_ */ diff --git a/BaseTools/Source/C/Include/IndustryStandard/PeImage.h b/BaseTo= ols/Source/C/Include/IndustryStandard/PeImage.h index 44037d1..4edf2d4 100644 --- a/BaseTools/Source/C/Include/IndustryStandard/PeImage.h +++ b/BaseTools/Source/C/Include/IndustryStandard/PeImage.h @@ -6,6 +6,7 @@ =20 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
+ Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All right= s reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -41,6 +42,9 @@ #define IMAGE_FILE_MACHINE_ARM 0x01c0 // Thumb only #define IMAGE_FILE_MACHINE_ARMT 0x01c2 // 32bit Mixed ARM and Thumb/T= humb 2 Little Endian #define IMAGE_FILE_MACHINE_ARM64 0xAA64 // 64bit ARM Architecture, Lit= tle Endian +#define IMAGE_FILE_MACHINE_RISCV32 0x5032 // 32bit RISC-V ISA +#define IMAGE_FILE_MACHINE_RISCV64 0x5064 // 64bit RISC-V ISA +#define IMAGE_FILE_MACHINE_RISCV128 0x5128 // 128bit RISC-V ISA =20 // // Support old names for backward compatible @@ -50,6 +54,9 @@ #define EFI_IMAGE_MACHINE_X64 IMAGE_FILE_MACHINE_X64 #define EFI_IMAGE_MACHINE_ARMT IMAGE_FILE_MACHINE_ARMT #define EFI_IMAGE_MACHINE_AARCH64 IMAGE_FILE_MACHINE_ARM64 +#define EFI_IMAGE_MACHINE_RISCV32 IMAGE_FILE_MACHINE_RISCV32 +#define EFI_IMAGE_MACHINE_RISCV64 IMAGE_FILE_MACHINE_RISCV64 +#define EFI_IMAGE_MACHINE_RISCV128 IMAGE_FILE_MACHINE_RISCV128 =20 #define EFI_IMAGE_DOS_SIGNATURE 0x5A4D // MZ #define EFI_IMAGE_OS2_SIGNATURE 0x454E // NE @@ -504,7 +511,10 @@ typedef struct { #define EFI_IMAGE_REL_BASED_HIGHADJ 4 #define EFI_IMAGE_REL_BASED_MIPS_JMPADDR 5 #define EFI_IMAGE_REL_BASED_ARM_MOV32A 5 +#define EFI_IMAGE_REL_BASED_RISCV_HI20 5 #define EFI_IMAGE_REL_BASED_ARM_MOV32T 7 +#define EFI_IMAGE_REL_BASED_RISCV_LOW12I 7 +#define EFI_IMAGE_REL_BASED_RISCV_LOW12S 8 #define EFI_IMAGE_REL_BASED_IA64_IMM64 9 #define EFI_IMAGE_REL_BASED_DIR64 10 =20 diff --git a/BaseTools/Source/Python/Common/DataType.py b/BaseTools/Source/= Python/Common/DataType.py index 8ae1bd2..2ee6b37 100644 --- a/BaseTools/Source/Python/Common/DataType.py +++ b/BaseTools/Source/Python/Common/DataType.py @@ -1,535 +1,540 @@ -## @file -# This file is used to define common static strings used by INF/DEC/DSC fi= les -# -# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
-# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
-# SPDX-License-Identifier: BSD-2-Clause-Patent - -## -# Common Definitions -# -TAB_SPLIT =3D '.' -TAB_COMMENT_EDK_START =3D '/*' -TAB_COMMENT_EDK_END =3D '*/' -TAB_COMMENT_EDK_SPLIT =3D '//' -TAB_COMMENT_SPLIT =3D '#' -TAB_SPECIAL_COMMENT =3D '##' -TAB_EQUAL_SPLIT =3D '=3D' -TAB_VALUE_SPLIT =3D '|' -TAB_COMMA_SPLIT =3D ',' -TAB_SPACE_SPLIT =3D ' ' -TAB_SEMI_COLON_SPLIT =3D ';' -TAB_SECTION_START =3D '[' -TAB_SECTION_END =3D ']' -TAB_OPTION_START =3D '<' -TAB_OPTION_END =3D '>' -TAB_SLASH =3D '\\' -TAB_BACK_SLASH =3D '/' -TAB_STAR =3D '*' -TAB_LINE_BREAK =3D '\n' -TAB_PRINTCHAR_VT =3D '\x0b' -TAB_PRINTCHAR_BS =3D '\b' -TAB_PRINTCHAR_NUL =3D '\0' -TAB_UINT8 =3D 'UINT8' -TAB_UINT16 =3D 'UINT16' -TAB_UINT32 =3D 'UINT32' -TAB_UINT64 =3D 'UINT64' -TAB_VOID =3D 'VOID*' -TAB_GUID =3D 'GUID' - -TAB_PCD_CLEAN_NUMERIC_TYPES =3D {TAB_UINT8, TAB_UINT16, TAB_UINT32, TAB_UI= NT64} -TAB_PCD_NUMERIC_TYPES =3D {TAB_UINT8, TAB_UINT16, TAB_UINT32, TAB_UINT64, = 'BOOLEAN'} -TAB_PCD_NUMERIC_TYPES_VOID =3D {TAB_UINT8, TAB_UINT16, TAB_UINT32, TAB_UIN= T64, 'BOOLEAN', TAB_VOID} - -TAB_WORKSPACE =3D '$(WORKSPACE)' -TAB_FV_DIRECTORY =3D 'FV' - -TAB_ARCH_NULL =3D '' -TAB_ARCH_COMMON =3D 'COMMON' -TAB_ARCH_IA32 =3D 'IA32' -TAB_ARCH_X64 =3D 'X64' -TAB_ARCH_ARM =3D 'ARM' -TAB_ARCH_EBC =3D 'EBC' -TAB_ARCH_AARCH64 =3D 'AARCH64' - -ARCH_SET_FULL =3D {TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_ARM, TAB_ARCH_EBC= , TAB_ARCH_AARCH64, TAB_ARCH_COMMON} - -SUP_MODULE_BASE =3D 'BASE' -SUP_MODULE_SEC =3D 'SEC' -SUP_MODULE_PEI_CORE =3D 'PEI_CORE' -SUP_MODULE_PEIM =3D 'PEIM' -SUP_MODULE_DXE_CORE =3D 'DXE_CORE' -SUP_MODULE_DXE_DRIVER =3D 'DXE_DRIVER' -SUP_MODULE_DXE_RUNTIME_DRIVER =3D 'DXE_RUNTIME_DRIVER' -SUP_MODULE_DXE_SAL_DRIVER =3D 'DXE_SAL_DRIVER' -SUP_MODULE_DXE_SMM_DRIVER =3D 'DXE_SMM_DRIVER' -SUP_MODULE_UEFI_DRIVER =3D 'UEFI_DRIVER' -SUP_MODULE_UEFI_APPLICATION =3D 'UEFI_APPLICATION' -SUP_MODULE_USER_DEFINED =3D 'USER_DEFINED' -SUP_MODULE_HOST_APPLICATION =3D 'HOST_APPLICATION' -SUP_MODULE_SMM_CORE =3D 'SMM_CORE' -SUP_MODULE_MM_STANDALONE =3D 'MM_STANDALONE' -SUP_MODULE_MM_CORE_STANDALONE =3D 'MM_CORE_STANDALONE' - -SUP_MODULE_LIST =3D [SUP_MODULE_BASE, SUP_MODULE_SEC, SUP_MODULE_PEI_CORE,= SUP_MODULE_PEIM, SUP_MODULE_DXE_CORE, SUP_MODULE_DXE_DRIVER, \ - SUP_MODULE_DXE_RUNTIME_DRIVER, SUP_MODULE_DXE_SAL_DRIVE= R, SUP_MODULE_DXE_SMM_DRIVER, SUP_MODULE_UEFI_DRIVER, \ - SUP_MODULE_UEFI_APPLICATION, SUP_MODULE_USER_DEFINED, S= UP_MODULE_HOST_APPLICATION, SUP_MODULE_SMM_CORE, SUP_MODULE_MM_STANDALONE, = SUP_MODULE_MM_CORE_STANDALONE] -SUP_MODULE_LIST_STRING =3D TAB_VALUE_SPLIT.join(SUP_MODULE_LIST) -SUP_MODULE_SET_PEI =3D {SUP_MODULE_PEIM, SUP_MODULE_PEI_CORE} - -EDK_COMPONENT_TYPE_LIBRARY =3D 'LIBRARY' -EDK_COMPONENT_TYPE_SECURITY_CORE =3D 'SECURITY_CORE' -EDK_COMPONENT_TYPE_PEI_CORE =3D SUP_MODULE_PEI_CORE -EDK_COMPONENT_TYPE_COMBINED_PEIM_DRIVER =3D 'COMBINED_PEIM_DRIVER' -EDK_COMPONENT_TYPE_PIC_PEIM =3D 'PIC_PEIM' -EDK_COMPONENT_TYPE_RELOCATABLE_PEIM =3D 'RELOCATABLE_PEIM' -EDK_COMPONENT_TYPE_BS_DRIVER =3D 'BS_DRIVER' -EDK_COMPONENT_TYPE_RT_DRIVER =3D 'RT_DRIVER' -EDK_COMPONENT_TYPE_SAL_RT_DRIVER =3D 'SAL_RT_DRIVER' -EDK_COMPONENT_TYPE_APPLICATION =3D 'APPLICATION' -EDK_NAME =3D 'EDK' -EDKII_NAME =3D 'EDKII' -MSG_EDKII_MAIL_ADDR =3D 'devel@edk2.groups.io' - -COMPONENT_TO_MODULE_MAP_DICT =3D { - EDK_COMPONENT_TYPE_LIBRARY : SUP_MODULE_BASE, - EDK_COMPONENT_TYPE_SECURITY_CORE : SUP_MODULE_SEC, - EDK_COMPONENT_TYPE_PEI_CORE : SUP_MODULE_PEI_CORE, - EDK_COMPONENT_TYPE_COMBINED_PEIM_DRIVER : SUP_MODULE_PEIM, - EDK_COMPONENT_TYPE_PIC_PEIM : SUP_MODULE_PEIM, - EDK_COMPONENT_TYPE_RELOCATABLE_PEIM : SUP_MODULE_PEIM, - "PE32_PEIM" : SUP_MODULE_PEIM, - EDK_COMPONENT_TYPE_BS_DRIVER : SUP_MODULE_DXE_DRIVER, - EDK_COMPONENT_TYPE_RT_DRIVER : SUP_MODULE_DXE_RUNTIME_DR= IVER, - EDK_COMPONENT_TYPE_SAL_RT_DRIVER : SUP_MODULE_DXE_SAL_DRIVER, - EDK_COMPONENT_TYPE_APPLICATION : SUP_MODULE_UEFI_APPLICATI= ON, - "LOGO" : SUP_MODULE_BASE, -} - -BINARY_FILE_TYPE_FW =3D 'FW' -BINARY_FILE_TYPE_GUID =3D 'GUID' -BINARY_FILE_TYPE_PREEFORM =3D 'PREEFORM' -BINARY_FILE_TYPE_UEFI_APP =3D 'UEFI_APP' -BINARY_FILE_TYPE_UNI_UI =3D 'UNI_UI' -BINARY_FILE_TYPE_UNI_VER =3D 'UNI_VER' -BINARY_FILE_TYPE_LIB =3D 'LIB' -BINARY_FILE_TYPE_PE32 =3D 'PE32' -BINARY_FILE_TYPE_PIC =3D 'PIC' -BINARY_FILE_TYPE_PEI_DEPEX =3D 'PEI_DEPEX' -BINARY_FILE_TYPE_DXE_DEPEX =3D 'DXE_DEPEX' -BINARY_FILE_TYPE_SMM_DEPEX =3D 'SMM_DEPEX' -BINARY_FILE_TYPE_TE =3D 'TE' -BINARY_FILE_TYPE_VER =3D 'VER' -BINARY_FILE_TYPE_UI =3D 'UI' -BINARY_FILE_TYPE_BIN =3D 'BIN' -BINARY_FILE_TYPE_FV =3D 'FV' -BINARY_FILE_TYPE_RAW =3D 'RAW_BINARY' - -PLATFORM_COMPONENT_TYPE_LIBRARY_CLASS =3D 'LIBRARY_CLASS' -PLATFORM_COMPONENT_TYPE_MODULE =3D 'MODULE' - -TAB_SOURCES =3D 'Sources' -TAB_SOURCES_COMMON =3D TAB_SOURCES + TAB_SPLIT + TAB_ARCH_COMMON -TAB_SOURCES_IA32 =3D TAB_SOURCES + TAB_SPLIT + TAB_ARCH_IA32 -TAB_SOURCES_X64 =3D TAB_SOURCES + TAB_SPLIT + TAB_ARCH_X64 -TAB_SOURCES_ARM =3D TAB_SOURCES + TAB_SPLIT + TAB_ARCH_ARM -TAB_SOURCES_EBC =3D TAB_SOURCES + TAB_SPLIT + TAB_ARCH_EBC -TAB_SOURCES_AARCH64 =3D TAB_SOURCES + TAB_SPLIT + TAB_ARCH_AARCH64 - -TAB_BINARIES =3D 'Binaries' -TAB_BINARIES_COMMON =3D TAB_BINARIES + TAB_SPLIT + TAB_ARCH_COMMON -TAB_BINARIES_IA32 =3D TAB_BINARIES + TAB_SPLIT + TAB_ARCH_IA32 -TAB_BINARIES_X64 =3D TAB_BINARIES + TAB_SPLIT + TAB_ARCH_X64 -TAB_BINARIES_ARM =3D TAB_BINARIES + TAB_SPLIT + TAB_ARCH_ARM -TAB_BINARIES_EBC =3D TAB_BINARIES + TAB_SPLIT + TAB_ARCH_EBC -TAB_BINARIES_AARCH64 =3D TAB_BINARIES + TAB_SPLIT + TAB_ARCH_AARCH64 - -TAB_INCLUDES =3D 'Includes' -TAB_INCLUDES_COMMON =3D TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_COMMON -TAB_INCLUDES_IA32 =3D TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_IA32 -TAB_INCLUDES_X64 =3D TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_X64 -TAB_INCLUDES_ARM =3D TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_ARM -TAB_INCLUDES_EBC =3D TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_EBC -TAB_INCLUDES_AARCH64 =3D TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_AARCH64 - -TAB_GUIDS =3D 'Guids' -TAB_GUIDS_COMMON =3D TAB_GUIDS + TAB_SPLIT + TAB_ARCH_COMMON -TAB_GUIDS_IA32 =3D TAB_GUIDS + TAB_SPLIT + TAB_ARCH_IA32 -TAB_GUIDS_X64 =3D TAB_GUIDS + TAB_SPLIT + TAB_ARCH_X64 -TAB_GUIDS_ARM =3D TAB_GUIDS + TAB_SPLIT + TAB_ARCH_ARM -TAB_GUIDS_EBC =3D TAB_GUIDS + TAB_SPLIT + TAB_ARCH_EBC -TAB_GUIDS_AARCH64 =3D TAB_GUIDS + TAB_SPLIT + TAB_ARCH_AARCH64 - -TAB_PROTOCOLS =3D 'Protocols' -TAB_PROTOCOLS_COMMON =3D TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_COMMON -TAB_PROTOCOLS_IA32 =3D TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_IA32 -TAB_PROTOCOLS_X64 =3D TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_X64 -TAB_PROTOCOLS_ARM =3D TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_ARM -TAB_PROTOCOLS_EBC =3D TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_EBC -TAB_PROTOCOLS_AARCH64 =3D TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_AARCH64 - -TAB_PPIS =3D 'Ppis' -TAB_PPIS_COMMON =3D TAB_PPIS + TAB_SPLIT + TAB_ARCH_COMMON -TAB_PPIS_IA32 =3D TAB_PPIS + TAB_SPLIT + TAB_ARCH_IA32 -TAB_PPIS_X64 =3D TAB_PPIS + TAB_SPLIT + TAB_ARCH_X64 -TAB_PPIS_ARM =3D TAB_PPIS + TAB_SPLIT + TAB_ARCH_ARM -TAB_PPIS_EBC =3D TAB_PPIS + TAB_SPLIT + TAB_ARCH_EBC -TAB_PPIS_AARCH64 =3D TAB_PPIS + TAB_SPLIT + TAB_ARCH_AARCH64 - -TAB_LIBRARY_CLASSES =3D 'LibraryClasses' -TAB_LIBRARY_CLASSES_COMMON =3D TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_= COMMON -TAB_LIBRARY_CLASSES_IA32 =3D TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_IA= 32 -TAB_LIBRARY_CLASSES_X64 =3D TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_X64 -TAB_LIBRARY_CLASSES_ARM =3D TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_ARM -TAB_LIBRARY_CLASSES_EBC =3D TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_EBC -TAB_LIBRARY_CLASSES_AARCH64 =3D TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH= _AARCH64 - -TAB_PACKAGES =3D 'Packages' -TAB_PACKAGES_COMMON =3D TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_COMMON -TAB_PACKAGES_IA32 =3D TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_IA32 -TAB_PACKAGES_X64 =3D TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_X64 -TAB_PACKAGES_ARM =3D TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_ARM -TAB_PACKAGES_EBC =3D TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_EBC -TAB_PACKAGES_AARCH64 =3D TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_AARCH64 - -TAB_PCDS =3D 'Pcds' -TAB_PCDS_FIXED_AT_BUILD =3D 'FixedAtBuild' -TAB_PCDS_PATCHABLE_IN_MODULE =3D 'PatchableInModule' -TAB_PCDS_FEATURE_FLAG =3D 'FeatureFlag' -TAB_PCDS_DYNAMIC_EX =3D 'DynamicEx' -TAB_PCDS_DYNAMIC_EX_DEFAULT =3D 'DynamicExDefault' -TAB_PCDS_DYNAMIC_EX_VPD =3D 'DynamicExVpd' -TAB_PCDS_DYNAMIC_EX_HII =3D 'DynamicExHii' -TAB_PCDS_DYNAMIC =3D 'Dynamic' -TAB_PCDS_DYNAMIC_DEFAULT =3D 'DynamicDefault' -TAB_PCDS_DYNAMIC_VPD =3D 'DynamicVpd' -TAB_PCDS_DYNAMIC_HII =3D 'DynamicHii' - -PCD_DYNAMIC_TYPE_SET =3D {TAB_PCDS_DYNAMIC, TAB_PCDS_DYNAMIC_DEFAULT, TAB_= PCDS_DYNAMIC_VPD, TAB_PCDS_DYNAMIC_HII} -PCD_DYNAMIC_EX_TYPE_SET =3D {TAB_PCDS_DYNAMIC_EX, TAB_PCDS_DYNAMIC_EX_DEFA= ULT, TAB_PCDS_DYNAMIC_EX_VPD, TAB_PCDS_DYNAMIC_EX_HII} - -# leave as a list for order -PCD_TYPE_LIST =3D [TAB_PCDS_FIXED_AT_BUILD, TAB_PCDS_PATCHABLE_IN_MODULE, = TAB_PCDS_FEATURE_FLAG, TAB_PCDS_DYNAMIC, TAB_PCDS_DYNAMIC_EX] - -TAB_PCDS_FIXED_AT_BUILD_NULL =3D TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD -TAB_PCDS_FIXED_AT_BUILD_COMMON =3D TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TA= B_SPLIT + TAB_ARCH_COMMON -TAB_PCDS_FIXED_AT_BUILD_IA32 =3D TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_= SPLIT + TAB_ARCH_IA32 -TAB_PCDS_FIXED_AT_BUILD_X64 =3D TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_S= PLIT + TAB_ARCH_X64 -TAB_PCDS_FIXED_AT_BUILD_ARM =3D TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_S= PLIT + TAB_ARCH_ARM -TAB_PCDS_FIXED_AT_BUILD_EBC =3D TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_S= PLIT + TAB_ARCH_EBC -TAB_PCDS_FIXED_AT_BUILD_AARCH64 =3D TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + T= AB_SPLIT + TAB_ARCH_AARCH64 - -TAB_PCDS_PATCHABLE_IN_MODULE_NULL =3D TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MOD= ULE -TAB_PCDS_PATCHABLE_IN_MODULE_COMMON =3D TAB_PCDS + TAB_PCDS_PATCHABLE_IN_M= ODULE + TAB_SPLIT + TAB_ARCH_COMMON -TAB_PCDS_PATCHABLE_IN_MODULE_IA32 =3D TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MOD= ULE + TAB_SPLIT + TAB_ARCH_IA32 -TAB_PCDS_PATCHABLE_IN_MODULE_X64 =3D TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODU= LE + TAB_SPLIT + TAB_ARCH_X64 -TAB_PCDS_PATCHABLE_IN_MODULE_ARM =3D TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODU= LE + TAB_SPLIT + TAB_ARCH_ARM -TAB_PCDS_PATCHABLE_IN_MODULE_EBC =3D TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODU= LE + TAB_SPLIT + TAB_ARCH_EBC -TAB_PCDS_PATCHABLE_IN_MODULE_AARCH64 =3D TAB_PCDS + TAB_PCDS_PATCHABLE_IN_= MODULE + TAB_SPLIT + TAB_ARCH_AARCH64 - -TAB_PCDS_FEATURE_FLAG_NULL =3D TAB_PCDS + TAB_PCDS_FEATURE_FLAG -TAB_PCDS_FEATURE_FLAG_COMMON =3D TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SP= LIT + TAB_ARCH_COMMON -TAB_PCDS_FEATURE_FLAG_IA32 =3D TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLI= T + TAB_ARCH_IA32 -TAB_PCDS_FEATURE_FLAG_X64 =3D TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT= + TAB_ARCH_X64 -TAB_PCDS_FEATURE_FLAG_ARM =3D TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT= + TAB_ARCH_ARM -TAB_PCDS_FEATURE_FLAG_EBC =3D TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT= + TAB_ARCH_EBC -TAB_PCDS_FEATURE_FLAG_AARCH64 =3D TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_S= PLIT + TAB_ARCH_AARCH64 - -TAB_PCDS_DYNAMIC_EX_NULL =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX -TAB_PCDS_DYNAMIC_EX_DEFAULT_NULL =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX_DEFAULT -TAB_PCDS_DYNAMIC_EX_HII_NULL =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX_HII -TAB_PCDS_DYNAMIC_EX_VPD_NULL =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX_VPD -TAB_PCDS_DYNAMIC_EX_COMMON =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT = + TAB_ARCH_COMMON -TAB_PCDS_DYNAMIC_EX_IA32 =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + = TAB_ARCH_IA32 -TAB_PCDS_DYNAMIC_EX_X64 =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + T= AB_ARCH_X64 -TAB_PCDS_DYNAMIC_EX_ARM =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + T= AB_ARCH_ARM -TAB_PCDS_DYNAMIC_EX_EBC =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + T= AB_ARCH_EBC -TAB_PCDS_DYNAMIC_EX_AARCH64 =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT= + TAB_ARCH_AARCH64 - -TAB_PCDS_DYNAMIC_NULL =3D TAB_PCDS + TAB_PCDS_DYNAMIC -TAB_PCDS_DYNAMIC_DEFAULT_NULL =3D TAB_PCDS + TAB_PCDS_DYNAMIC_DEFAULT -TAB_PCDS_DYNAMIC_HII_NULL =3D TAB_PCDS + TAB_PCDS_DYNAMIC_HII -TAB_PCDS_DYNAMIC_VPD_NULL =3D TAB_PCDS + TAB_PCDS_DYNAMIC_VPD -TAB_PCDS_DYNAMIC_COMMON =3D TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_= ARCH_COMMON -TAB_PCDS_DYNAMIC_IA32 =3D TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_AR= CH_IA32 -TAB_PCDS_DYNAMIC_X64 =3D TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARC= H_X64 -TAB_PCDS_DYNAMIC_ARM =3D TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARC= H_ARM -TAB_PCDS_DYNAMIC_EBC =3D TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARC= H_EBC -TAB_PCDS_DYNAMIC_AARCH64 =3D TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB= _ARCH_AARCH64 - -TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_PEI_PAGE_SIZE =3D 'PcdLoadFixAddressPe= iCodePageNumber' -TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_PEI_PAGE_SIZE_DATA_TYPE =3D 'UINT32' -TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_DXE_PAGE_SIZE =3D 'PcdLoadFixAddressBo= otTimeCodePageNumber' -TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_DXE_PAGE_SIZE_DATA_TYPE =3D 'UINT32' -TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_RUNTIME_PAGE_SIZE =3D 'PcdLoadFixAddre= ssRuntimeCodePageNumber' -TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_RUNTIME_PAGE_SIZE_DATA_TYPE =3D 'UINT3= 2' -TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_SMM_PAGE_SIZE =3D 'PcdLoadFixAddressSm= mCodePageNumber' -TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_SMM_PAGE_SIZE_DATA_TYPE =3D 'UINT32' -TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_SET =3D {TAB_PCDS_PATCHABLE_LOAD_FIX_= ADDRESS_PEI_PAGE_SIZE, \ - TAB_PCDS_PATCHABLE_LOAD_FIX_AD= DRESS_DXE_PAGE_SIZE, \ - TAB_PCDS_PATCHABLE_LOAD_FIX_AD= DRESS_RUNTIME_PAGE_SIZE, \ - TAB_PCDS_PATCHABLE_LOAD_FIX_AD= DRESS_SMM_PAGE_SIZE} - -## The mapping dictionary from datum type to its maximum number. -MAX_VAL_TYPE =3D {"BOOLEAN":0x01, TAB_UINT8:0xFF, TAB_UINT16:0xFFFF, TAB_U= INT32:0xFFFFFFFF, TAB_UINT64:0xFFFFFFFFFFFFFFFF} -## The mapping dictionary from datum type to size string. -MAX_SIZE_TYPE =3D {"BOOLEAN":1, TAB_UINT8:1, TAB_UINT16:2, TAB_UINT32:4, T= AB_UINT64:8} - -TAB_DEPEX =3D 'Depex' -TAB_DEPEX_COMMON =3D TAB_DEPEX + TAB_SPLIT + TAB_ARCH_COMMON -TAB_DEPEX_IA32 =3D TAB_DEPEX + TAB_SPLIT + TAB_ARCH_IA32 -TAB_DEPEX_X64 =3D TAB_DEPEX + TAB_SPLIT + TAB_ARCH_X64 -TAB_DEPEX_ARM =3D TAB_DEPEX + TAB_SPLIT + TAB_ARCH_ARM -TAB_DEPEX_EBC =3D TAB_DEPEX + TAB_SPLIT + TAB_ARCH_EBC -TAB_DEPEX_AARCH64 =3D TAB_DEPEX + TAB_SPLIT + TAB_ARCH_AARCH64 - -TAB_SKUIDS =3D 'SkuIds' -TAB_DEFAULT_STORES =3D 'DefaultStores' -TAB_DEFAULT_STORES_DEFAULT =3D 'STANDARD' - -TAB_LIBRARIES =3D 'Libraries' -TAB_LIBRARIES_COMMON =3D TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_COMMON -TAB_LIBRARIES_IA32 =3D TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_IA32 -TAB_LIBRARIES_X64 =3D TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_X64 -TAB_LIBRARIES_ARM =3D TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_ARM -TAB_LIBRARIES_EBC =3D TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_EBC -TAB_LIBRARIES_AARCH64 =3D TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_AARCH64 - -TAB_COMPONENTS =3D 'Components' -TAB_COMPONENTS_COMMON =3D TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_COMMON -TAB_COMPONENTS_IA32 =3D TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_IA32 -TAB_COMPONENTS_X64 =3D TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_X64 -TAB_COMPONENTS_ARM =3D TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_ARM -TAB_COMPONENTS_EBC =3D TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_EBC -TAB_COMPONENTS_AARCH64 =3D TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_AARCH64 - -TAB_BUILD_OPTIONS =3D 'BuildOptions' - -TAB_DEFINE =3D 'DEFINE' -TAB_NMAKE =3D 'Nmake' -TAB_USER_EXTENSIONS =3D 'UserExtensions' -TAB_INCLUDE =3D '!include' -TAB_DEFAULT =3D 'DEFAULT' -TAB_COMMON =3D 'COMMON' - -# -# Common Define -# -TAB_COMMON_DEFINES =3D 'Defines' - -# -# Inf Definitions -# -TAB_INF_DEFINES =3D TAB_COMMON_DEFINES -TAB_INF_DEFINES_INF_VERSION =3D 'INF_VERSION' -TAB_INF_DEFINES_BASE_NAME =3D 'BASE_NAME' -TAB_INF_DEFINES_FILE_GUID =3D 'FILE_GUID' -TAB_INF_DEFINES_MODULE_TYPE =3D 'MODULE_TYPE' -TAB_INF_DEFINES_EFI_SPECIFICATION_VERSION =3D 'EFI_SPECIFICATION_VERSION' -TAB_INF_DEFINES_UEFI_SPECIFICATION_VERSION =3D 'UEFI_SPECIFICATION_VERSION' -TAB_INF_DEFINES_PI_SPECIFICATION_VERSION =3D 'PI_SPECIFICATION_VERSION' -TAB_INF_DEFINES_EDK_RELEASE_VERSION =3D 'EDK_RELEASE_VERSION' -TAB_INF_DEFINES_BINARY_MODULE =3D 'BINARY_MODULE' -TAB_INF_DEFINES_LIBRARY_CLASS =3D 'LIBRARY_CLASS' -TAB_INF_DEFINES_COMPONENT_TYPE =3D 'COMPONENT_TYPE' -TAB_INF_DEFINES_MAKEFILE_NAME =3D 'MAKEFILE_NAME' -TAB_INF_DEFINES_DPX_SOURCE =3D 'DPX_SOURCE' -TAB_INF_DEFINES_BUILD_NUMBER =3D 'BUILD_NUMBER' -TAB_INF_DEFINES_BUILD_TYPE =3D 'BUILD_TYPE' -TAB_INF_DEFINES_FFS_EXT =3D 'FFS_EXT' -TAB_INF_DEFINES_FV_EXT =3D 'FV_EXT' -TAB_INF_DEFINES_SOURCE_FV =3D 'SOURCE_FV' -TAB_INF_DEFINES_VERSION_NUMBER =3D 'VERSION_NUMBER' -TAB_INF_DEFINES_VERSION =3D 'VERSION' # for Edk inf, the same as = VERSION_NUMBER -TAB_INF_DEFINES_VERSION_STRING =3D 'VERSION_STRING' -TAB_INF_DEFINES_PCD_IS_DRIVER =3D 'PCD_IS_DRIVER' -TAB_INF_DEFINES_TIANO_EDK_FLASHMAP_H =3D 'TIANO_EDK_FLASHMAP_H' -TAB_INF_DEFINES_ENTRY_POINT =3D 'ENTRY_POINT' -TAB_INF_DEFINES_UNLOAD_IMAGE =3D 'UNLOAD_IMAGE' -TAB_INF_DEFINES_CONSTRUCTOR =3D 'CONSTRUCTOR' -TAB_INF_DEFINES_DESTRUCTOR =3D 'DESTRUCTOR' -TAB_INF_DEFINES_DEFINE =3D 'DEFINE' -TAB_INF_DEFINES_SPEC =3D 'SPEC' -TAB_INF_DEFINES_CUSTOM_MAKEFILE =3D 'CUSTOM_MAKEFILE' -TAB_INF_DEFINES_MACRO =3D '__MACROS__' -TAB_INF_DEFINES_SHADOW =3D 'SHADOW' -TAB_INF_FIXED_PCD =3D 'FixedPcd' -TAB_INF_FEATURE_PCD =3D 'FeaturePcd' -TAB_INF_PATCH_PCD =3D 'PatchPcd' -TAB_INF_PCD =3D 'Pcd' -TAB_INF_PCD_EX =3D 'PcdEx' -TAB_INF_USAGE_PRO =3D 'PRODUCES' -TAB_INF_USAGE_SOME_PRO =3D 'SOMETIMES_PRODUCES' -TAB_INF_USAGE_CON =3D 'CONSUMES' -TAB_INF_USAGE_SOME_CON =3D 'SOMETIMES_CONSUMES' -TAB_INF_USAGE_NOTIFY =3D 'NOTIFY' -TAB_INF_USAGE_TO_START =3D 'TO_START' -TAB_INF_USAGE_BY_START =3D 'BY_START' -TAB_INF_GUIDTYPE_EVENT =3D 'Event' -TAB_INF_GUIDTYPE_FILE =3D 'File' -TAB_INF_GUIDTYPE_FV =3D 'FV' -TAB_INF_GUIDTYPE_GUID =3D 'GUID' -TAB_INF_GUIDTYPE_HII =3D 'HII' -TAB_INF_GUIDTYPE_HOB =3D 'HOB' -TAB_INF_GUIDTYPE_ST =3D 'SystemTable' -TAB_INF_GUIDTYPE_TSG =3D 'TokenSpaceGuid' -TAB_INF_GUIDTYPE_VAR =3D 'Variable' -TAB_INF_GUIDTYPE_PROTOCOL =3D 'PROTOCOL' -TAB_INF_GUIDTYPE_PPI =3D 'PPI' -TAB_INF_USAGE_UNDEFINED =3D 'UNDEFINED' - -# -# Dec Definitions -# -TAB_DEC_DEFINES =3D TAB_COMMON_DEFINES -TAB_DEC_DEFINES_DEC_SPECIFICATION =3D 'DEC_SPECIFICATION' -TAB_DEC_DEFINES_PACKAGE_NAME =3D 'PACKAGE_NAME' -TAB_DEC_DEFINES_PACKAGE_GUID =3D 'PACKAGE_GUID' -TAB_DEC_DEFINES_PACKAGE_VERSION =3D 'PACKAGE_VERSION' -TAB_DEC_DEFINES_PKG_UNI_FILE =3D 'PKG_UNI_FILE' - -# -# Dsc Definitions -# -TAB_DSC_DEFINES =3D TAB_COMMON_DEFINES -TAB_DSC_DEFINES_PLATFORM_NAME =3D 'PLATFORM_NAME' -TAB_DSC_DEFINES_PLATFORM_GUID =3D 'PLATFORM_GUID' -TAB_DSC_DEFINES_PLATFORM_VERSION =3D 'PLATFORM_VERSION' -TAB_DSC_DEFINES_DSC_SPECIFICATION =3D 'DSC_SPECIFICATION' -TAB_DSC_DEFINES_OUTPUT_DIRECTORY =3D 'OUTPUT_DIRECTORY' -TAB_DSC_DEFINES_SUPPORTED_ARCHITECTURES =3D 'SUPPORTED_ARCHITECTURES' -TAB_DSC_DEFINES_BUILD_TARGETS =3D 'BUILD_TARGETS' -TAB_DSC_DEFINES_SKUID_IDENTIFIER =3D 'SKUID_IDENTIFIER' -TAB_DSC_DEFINES_PCD_INFO_GENERATION =3D 'PCD_INFO_GENERATION' -TAB_DSC_DEFINES_PCD_VAR_CHECK_GENERATION =3D 'PCD_VAR_CHECK_GENERATION' -TAB_DSC_DEFINES_FLASH_DEFINITION =3D 'FLASH_DEFINITION' -TAB_DSC_DEFINES_BUILD_NUMBER =3D 'BUILD_NUMBER' -TAB_DSC_DEFINES_MAKEFILE_NAME =3D 'MAKEFILE_NAME' -TAB_DSC_DEFINES_BS_BASE_ADDRESS =3D 'BsBaseAddress' -TAB_DSC_DEFINES_RT_BASE_ADDRESS =3D 'RtBaseAddress' -TAB_DSC_DEFINES_RFC_LANGUAGES =3D 'RFC_LANGUAGES' -TAB_DSC_DEFINES_ISO_LANGUAGES =3D 'ISO_LANGUAGES' -TAB_DSC_DEFINES_DEFINE =3D 'DEFINE' -TAB_DSC_DEFINES_VPD_TOOL_GUID =3D 'VPD_TOOL_GUID' -TAB_FIX_LOAD_TOP_MEMORY_ADDRESS =3D 'FIX_LOAD_TOP_MEMORY_ADDRESS' -TAB_DSC_DEFINES_EDKGLOBAL =3D 'EDK_GLOBAL' -TAB_DSC_PREBUILD =3D 'PREBUILD' -TAB_DSC_POSTBUILD =3D 'POSTBUILD' -# -# TargetTxt Definitions -# -TAB_TAT_DEFINES_ACTIVE_PLATFORM =3D 'ACTIVE_PLATFORM' -TAB_TAT_DEFINES_ACTIVE_MODULE =3D 'ACTIVE_MODULE' -TAB_TAT_DEFINES_TOOL_CHAIN_CONF =3D 'TOOL_CHAIN_CONF' -TAB_TAT_DEFINES_MAX_CONCURRENT_THREAD_NUMBER =3D 'MAX_CONCURRENT_THREAD_NU= MBER' -TAB_TAT_DEFINES_TARGET =3D 'TARGET' -TAB_TAT_DEFINES_TOOL_CHAIN_TAG =3D 'TOOL_CHAIN_TAG' -TAB_TAT_DEFINES_TARGET_ARCH =3D 'TARGET_ARCH' -TAB_TAT_DEFINES_BUILD_RULE_CONF =3D "BUILD_RULE_CONF" - -# -# ToolDef Definitions -# -TAB_TOD_DEFINES_TARGET =3D 'TARGET' -TAB_TOD_DEFINES_TOOL_CHAIN_TAG =3D 'TOOL_CHAIN_TAG' -TAB_TOD_DEFINES_TARGET_ARCH =3D 'TARGET_ARCH' -TAB_TOD_DEFINES_COMMAND_TYPE =3D 'COMMAND_TYPE' -TAB_TOD_DEFINES_FAMILY =3D 'FAMILY' -TAB_TOD_DEFINES_BUILDRULEFAMILY =3D 'BUILDRULEFAMILY' -TAB_TOD_DEFINES_BUILDRULEORDER =3D 'BUILDRULEORDER' - -# -# Conditional Statements -# -TAB_IF =3D '!if' -TAB_END_IF =3D '!endif' -TAB_ELSE_IF =3D '!elseif' -TAB_ELSE =3D '!else' -TAB_IF_DEF =3D '!ifdef' -TAB_IF_N_DEF =3D '!ifndef' -TAB_IF_EXIST =3D '!if exist' -TAB_ERROR =3D '!error' - -# -# Unknown section -# -TAB_UNKNOWN =3D 'UNKNOWN' - -# -# Build database path -# -DATABASE_PATH =3D ":memory:" #"BuildDatabase.db" - -# used by ECC -MODIFIER_SET =3D {'IN', 'OUT', 'OPTIONAL', 'UNALIGNED', 'EFI_RUNTIMESERVIC= E', 'EFI_BOOTSERVICE', 'EFIAPI'} - -# Dependency Opcodes -DEPEX_OPCODE_BEFORE =3D "BEFORE" -DEPEX_OPCODE_AFTER =3D "AFTER" -DEPEX_OPCODE_PUSH =3D "PUSH" -DEPEX_OPCODE_AND =3D "AND" -DEPEX_OPCODE_OR =3D "OR" -DEPEX_OPCODE_NOT =3D "NOT" -DEPEX_OPCODE_END =3D "END" -DEPEX_OPCODE_SOR =3D "SOR" -DEPEX_OPCODE_TRUE =3D "TRUE" -DEPEX_OPCODE_FALSE =3D "FALSE" - -# Dependency Expression -DEPEX_SUPPORTED_OPCODE_SET =3D {"BEFORE", "AFTER", "PUSH", "AND", "OR", "N= OT", "END", "SOR", "TRUE", "FALSE", '(', ')'} - -TAB_STATIC_LIBRARY =3D "STATIC-LIBRARY-FILE" -TAB_DYNAMIC_LIBRARY =3D "DYNAMIC-LIBRARY-FILE" -TAB_FRAMEWORK_IMAGE =3D "EFI-IMAGE-FILE" -TAB_C_CODE_FILE =3D "C-CODE-FILE" -TAB_C_HEADER_FILE =3D "C-HEADER-FILE" -TAB_UNICODE_FILE =3D "UNICODE-TEXT-FILE" -TAB_IMAGE_FILE =3D "IMAGE-DEFINITION-FILE" -TAB_DEPENDENCY_EXPRESSION_FILE =3D "DEPENDENCY-EXPRESSION-FILE" -TAB_UNKNOWN_FILE =3D "UNKNOWN-TYPE-FILE" -TAB_DEFAULT_BINARY_FILE =3D "_BINARY_FILE_" -TAB_OBJECT_FILE =3D "OBJECT-FILE" -TAB_VFR_FILE =3D 'VISUAL-FORM-REPRESENTATION-FILE' - -# used by BRG -TAB_BRG_PCD =3D 'PCD' -TAB_BRG_LIBRARY =3D 'Library' - -# -# Build Rule File Version Definition -# -TAB_BUILD_RULE_VERSION =3D "build_rule_version" - -# section name for PCDs -PCDS_DYNAMIC_DEFAULT =3D "PcdsDynamicDefault" -PCDS_DYNAMIC_VPD =3D "PcdsDynamicVpd" -PCDS_DYNAMIC_HII =3D "PcdsDynamicHii" -PCDS_DYNAMICEX_DEFAULT =3D "PcdsDynamicExDefault" -PCDS_DYNAMICEX_VPD =3D "PcdsDynamicExVpd" -PCDS_DYNAMICEX_HII =3D "PcdsDynamicExHii" - -SECTIONS_HAVE_ITEM_PCD_SET =3D {PCDS_DYNAMIC_DEFAULT.upper(), PCDS_DYNAMIC= _VPD.upper(), PCDS_DYNAMIC_HII.upper(), \ - PCDS_DYNAMICEX_DEFAULT.upper(), PCDS_DYNAMIC= EX_VPD.upper(), PCDS_DYNAMICEX_HII.upper()} -# Section allowed to have items after arch -SECTIONS_HAVE_ITEM_AFTER_ARCH_SET =3D {TAB_LIBRARY_CLASSES.upper(), TAB_DE= PEX.upper(), TAB_USER_EXTENSIONS.upper(), - PCDS_DYNAMIC_DEFAULT.upper(), - PCDS_DYNAMIC_VPD.upper(), - PCDS_DYNAMIC_HII.upper(), - PCDS_DYNAMICEX_DEFAULT.upper(), - PCDS_DYNAMICEX_VPD.upper(), - PCDS_DYNAMICEX_HII.upper(), - TAB_BUILD_OPTIONS.upper(), - TAB_INCLUDES.upper()} - -# -# pack codes as used in PcdDb and elsewhere -# -PACK_PATTERN_GUID =3D '=3DLHHBBBBBBBB' -PACK_CODE_BY_SIZE =3D {8:'=3DQ', - 4:'=3DL', - 2:'=3DH', - 1:'=3DB', - 0:'=3DB', - 16:""} - -TAB_COMPILER_MSFT =3D 'MSFT' \ No newline at end of file +## @file +# This file is used to define common static strings used by INF/DEC/DSC fi= les +# +# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
+# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
+# Portions Copyright (c) 2016, Hewlett Packard Enterprise Development LP. = All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent + +## +# Common Definitions +# +TAB_SPLIT =3D '.' +TAB_COMMENT_EDK_START =3D '/*' +TAB_COMMENT_EDK_END =3D '*/' +TAB_COMMENT_EDK_SPLIT =3D '//' +TAB_COMMENT_SPLIT =3D '#' +TAB_SPECIAL_COMMENT =3D '##' +TAB_EQUAL_SPLIT =3D '=3D' +TAB_VALUE_SPLIT =3D '|' +TAB_COMMA_SPLIT =3D ',' +TAB_SPACE_SPLIT =3D ' ' +TAB_SEMI_COLON_SPLIT =3D ';' +TAB_SECTION_START =3D '[' +TAB_SECTION_END =3D ']' +TAB_OPTION_START =3D '<' +TAB_OPTION_END =3D '>' +TAB_SLASH =3D '\\' +TAB_BACK_SLASH =3D '/' +TAB_STAR =3D '*' +TAB_LINE_BREAK =3D '\n' +TAB_PRINTCHAR_VT =3D '\x0b' +TAB_PRINTCHAR_BS =3D '\b' +TAB_PRINTCHAR_NUL =3D '\0' +TAB_UINT8 =3D 'UINT8' +TAB_UINT16 =3D 'UINT16' +TAB_UINT32 =3D 'UINT32' +TAB_UINT64 =3D 'UINT64' +TAB_VOID =3D 'VOID*' +TAB_GUID =3D 'GUID' + +TAB_PCD_CLEAN_NUMERIC_TYPES =3D {TAB_UINT8, TAB_UINT16, TAB_UINT32, TAB_UI= NT64} +TAB_PCD_NUMERIC_TYPES =3D {TAB_UINT8, TAB_UINT16, TAB_UINT32, TAB_UINT64, = 'BOOLEAN'} +TAB_PCD_NUMERIC_TYPES_VOID =3D {TAB_UINT8, TAB_UINT16, TAB_UINT32, TAB_UIN= T64, 'BOOLEAN', TAB_VOID} + +TAB_WORKSPACE =3D '$(WORKSPACE)' +TAB_FV_DIRECTORY =3D 'FV' + +TAB_ARCH_NULL =3D '' +TAB_ARCH_COMMON =3D 'COMMON' +TAB_ARCH_IA32 =3D 'IA32' +TAB_ARCH_X64 =3D 'X64' +TAB_ARCH_ARM =3D 'ARM' +TAB_ARCH_EBC =3D 'EBC' +TAB_ARCH_AARCH64 =3D 'AARCH64' + +TAB_ARCH_RISCV32 =3D 'RISCV32' +TAB_ARCH_RISCV64 =3D 'RISCV64' +TAB_ARCH_RISCV128 =3D 'RISCV128' + +ARCH_SET_FULL =3D {TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_ARM, TAB_ARCH_EBC= , TAB_ARCH_AARCH64, TAB_ARCH_RISCV32, TAB_ARCH_RISCV64, TAB_ARCH_RISCV128, = TAB_ARCH_COMMON} + +SUP_MODULE_BASE =3D 'BASE' +SUP_MODULE_SEC =3D 'SEC' +SUP_MODULE_PEI_CORE =3D 'PEI_CORE' +SUP_MODULE_PEIM =3D 'PEIM' +SUP_MODULE_DXE_CORE =3D 'DXE_CORE' +SUP_MODULE_DXE_DRIVER =3D 'DXE_DRIVER' +SUP_MODULE_DXE_RUNTIME_DRIVER =3D 'DXE_RUNTIME_DRIVER' +SUP_MODULE_DXE_SAL_DRIVER =3D 'DXE_SAL_DRIVER' +SUP_MODULE_DXE_SMM_DRIVER =3D 'DXE_SMM_DRIVER' +SUP_MODULE_UEFI_DRIVER =3D 'UEFI_DRIVER' +SUP_MODULE_UEFI_APPLICATION =3D 'UEFI_APPLICATION' +SUP_MODULE_USER_DEFINED =3D 'USER_DEFINED' +SUP_MODULE_HOST_APPLICATION =3D 'HOST_APPLICATION' +SUP_MODULE_SMM_CORE =3D 'SMM_CORE' +SUP_MODULE_MM_STANDALONE =3D 'MM_STANDALONE' +SUP_MODULE_MM_CORE_STANDALONE =3D 'MM_CORE_STANDALONE' + +SUP_MODULE_LIST =3D [SUP_MODULE_BASE, SUP_MODULE_SEC, SUP_MODULE_PEI_CORE,= SUP_MODULE_PEIM, SUP_MODULE_DXE_CORE, SUP_MODULE_DXE_DRIVER, \ + SUP_MODULE_DXE_RUNTIME_DRIVER, SUP_MODULE_DXE_SAL_DRIVE= R, SUP_MODULE_DXE_SMM_DRIVER, SUP_MODULE_UEFI_DRIVER, \ + SUP_MODULE_UEFI_APPLICATION, SUP_MODULE_USER_DEFINED, S= UP_MODULE_HOST_APPLICATION, SUP_MODULE_SMM_CORE, SUP_MODULE_MM_STANDALONE, = SUP_MODULE_MM_CORE_STANDALONE] +SUP_MODULE_LIST_STRING =3D TAB_VALUE_SPLIT.join(SUP_MODULE_LIST) +SUP_MODULE_SET_PEI =3D {SUP_MODULE_PEIM, SUP_MODULE_PEI_CORE} + +EDK_COMPONENT_TYPE_LIBRARY =3D 'LIBRARY' +EDK_COMPONENT_TYPE_SECURITY_CORE =3D 'SECURITY_CORE' +EDK_COMPONENT_TYPE_PEI_CORE =3D SUP_MODULE_PEI_CORE +EDK_COMPONENT_TYPE_COMBINED_PEIM_DRIVER =3D 'COMBINED_PEIM_DRIVER' +EDK_COMPONENT_TYPE_PIC_PEIM =3D 'PIC_PEIM' +EDK_COMPONENT_TYPE_RELOCATABLE_PEIM =3D 'RELOCATABLE_PEIM' +EDK_COMPONENT_TYPE_BS_DRIVER =3D 'BS_DRIVER' +EDK_COMPONENT_TYPE_RT_DRIVER =3D 'RT_DRIVER' +EDK_COMPONENT_TYPE_SAL_RT_DRIVER =3D 'SAL_RT_DRIVER' +EDK_COMPONENT_TYPE_APPLICATION =3D 'APPLICATION' +EDK_NAME =3D 'EDK' +EDKII_NAME =3D 'EDKII' +MSG_EDKII_MAIL_ADDR =3D 'devel@edk2.groups.io' + +COMPONENT_TO_MODULE_MAP_DICT =3D { + EDK_COMPONENT_TYPE_LIBRARY : SUP_MODULE_BASE, + EDK_COMPONENT_TYPE_SECURITY_CORE : SUP_MODULE_SEC, + EDK_COMPONENT_TYPE_PEI_CORE : SUP_MODULE_PEI_CORE, + EDK_COMPONENT_TYPE_COMBINED_PEIM_DRIVER : SUP_MODULE_PEIM, + EDK_COMPONENT_TYPE_PIC_PEIM : SUP_MODULE_PEIM, + EDK_COMPONENT_TYPE_RELOCATABLE_PEIM : SUP_MODULE_PEIM, + "PE32_PEIM" : SUP_MODULE_PEIM, + EDK_COMPONENT_TYPE_BS_DRIVER : SUP_MODULE_DXE_DRIVER, + EDK_COMPONENT_TYPE_RT_DRIVER : SUP_MODULE_DXE_RUNTIME_DR= IVER, + EDK_COMPONENT_TYPE_SAL_RT_DRIVER : SUP_MODULE_DXE_SAL_DRIVER, + EDK_COMPONENT_TYPE_APPLICATION : SUP_MODULE_UEFI_APPLICATI= ON, + "LOGO" : SUP_MODULE_BASE, +} + +BINARY_FILE_TYPE_FW =3D 'FW' +BINARY_FILE_TYPE_GUID =3D 'GUID' +BINARY_FILE_TYPE_PREEFORM =3D 'PREEFORM' +BINARY_FILE_TYPE_UEFI_APP =3D 'UEFI_APP' +BINARY_FILE_TYPE_UNI_UI =3D 'UNI_UI' +BINARY_FILE_TYPE_UNI_VER =3D 'UNI_VER' +BINARY_FILE_TYPE_LIB =3D 'LIB' +BINARY_FILE_TYPE_PE32 =3D 'PE32' +BINARY_FILE_TYPE_PIC =3D 'PIC' +BINARY_FILE_TYPE_PEI_DEPEX =3D 'PEI_DEPEX' +BINARY_FILE_TYPE_DXE_DEPEX =3D 'DXE_DEPEX' +BINARY_FILE_TYPE_SMM_DEPEX =3D 'SMM_DEPEX' +BINARY_FILE_TYPE_TE =3D 'TE' +BINARY_FILE_TYPE_VER =3D 'VER' +BINARY_FILE_TYPE_UI =3D 'UI' +BINARY_FILE_TYPE_BIN =3D 'BIN' +BINARY_FILE_TYPE_FV =3D 'FV' +BINARY_FILE_TYPE_RAW =3D 'RAW_BINARY' + +PLATFORM_COMPONENT_TYPE_LIBRARY_CLASS =3D 'LIBRARY_CLASS' +PLATFORM_COMPONENT_TYPE_MODULE =3D 'MODULE' + +TAB_SOURCES =3D 'Sources' +TAB_SOURCES_COMMON =3D TAB_SOURCES + TAB_SPLIT + TAB_ARCH_COMMON +TAB_SOURCES_IA32 =3D TAB_SOURCES + TAB_SPLIT + TAB_ARCH_IA32 +TAB_SOURCES_X64 =3D TAB_SOURCES + TAB_SPLIT + TAB_ARCH_X64 +TAB_SOURCES_ARM =3D TAB_SOURCES + TAB_SPLIT + TAB_ARCH_ARM +TAB_SOURCES_EBC =3D TAB_SOURCES + TAB_SPLIT + TAB_ARCH_EBC +TAB_SOURCES_AARCH64 =3D TAB_SOURCES + TAB_SPLIT + TAB_ARCH_AARCH64 + +TAB_BINARIES =3D 'Binaries' +TAB_BINARIES_COMMON =3D TAB_BINARIES + TAB_SPLIT + TAB_ARCH_COMMON +TAB_BINARIES_IA32 =3D TAB_BINARIES + TAB_SPLIT + TAB_ARCH_IA32 +TAB_BINARIES_X64 =3D TAB_BINARIES + TAB_SPLIT + TAB_ARCH_X64 +TAB_BINARIES_ARM =3D TAB_BINARIES + TAB_SPLIT + TAB_ARCH_ARM +TAB_BINARIES_EBC =3D TAB_BINARIES + TAB_SPLIT + TAB_ARCH_EBC +TAB_BINARIES_AARCH64 =3D TAB_BINARIES + TAB_SPLIT + TAB_ARCH_AARCH64 + +TAB_INCLUDES =3D 'Includes' +TAB_INCLUDES_COMMON =3D TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_COMMON +TAB_INCLUDES_IA32 =3D TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_IA32 +TAB_INCLUDES_X64 =3D TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_X64 +TAB_INCLUDES_ARM =3D TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_ARM +TAB_INCLUDES_EBC =3D TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_EBC +TAB_INCLUDES_AARCH64 =3D TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_AARCH64 + +TAB_GUIDS =3D 'Guids' +TAB_GUIDS_COMMON =3D TAB_GUIDS + TAB_SPLIT + TAB_ARCH_COMMON +TAB_GUIDS_IA32 =3D TAB_GUIDS + TAB_SPLIT + TAB_ARCH_IA32 +TAB_GUIDS_X64 =3D TAB_GUIDS + TAB_SPLIT + TAB_ARCH_X64 +TAB_GUIDS_ARM =3D TAB_GUIDS + TAB_SPLIT + TAB_ARCH_ARM +TAB_GUIDS_EBC =3D TAB_GUIDS + TAB_SPLIT + TAB_ARCH_EBC +TAB_GUIDS_AARCH64 =3D TAB_GUIDS + TAB_SPLIT + TAB_ARCH_AARCH64 + +TAB_PROTOCOLS =3D 'Protocols' +TAB_PROTOCOLS_COMMON =3D TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_COMMON +TAB_PROTOCOLS_IA32 =3D TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_IA32 +TAB_PROTOCOLS_X64 =3D TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_X64 +TAB_PROTOCOLS_ARM =3D TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_ARM +TAB_PROTOCOLS_EBC =3D TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_EBC +TAB_PROTOCOLS_AARCH64 =3D TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_AARCH64 + +TAB_PPIS =3D 'Ppis' +TAB_PPIS_COMMON =3D TAB_PPIS + TAB_SPLIT + TAB_ARCH_COMMON +TAB_PPIS_IA32 =3D TAB_PPIS + TAB_SPLIT + TAB_ARCH_IA32 +TAB_PPIS_X64 =3D TAB_PPIS + TAB_SPLIT + TAB_ARCH_X64 +TAB_PPIS_ARM =3D TAB_PPIS + TAB_SPLIT + TAB_ARCH_ARM +TAB_PPIS_EBC =3D TAB_PPIS + TAB_SPLIT + TAB_ARCH_EBC +TAB_PPIS_AARCH64 =3D TAB_PPIS + TAB_SPLIT + TAB_ARCH_AARCH64 + +TAB_LIBRARY_CLASSES =3D 'LibraryClasses' +TAB_LIBRARY_CLASSES_COMMON =3D TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_= COMMON +TAB_LIBRARY_CLASSES_IA32 =3D TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_IA= 32 +TAB_LIBRARY_CLASSES_X64 =3D TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_X64 +TAB_LIBRARY_CLASSES_ARM =3D TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_ARM +TAB_LIBRARY_CLASSES_EBC =3D TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_EBC +TAB_LIBRARY_CLASSES_AARCH64 =3D TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH= _AARCH64 + +TAB_PACKAGES =3D 'Packages' +TAB_PACKAGES_COMMON =3D TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_COMMON +TAB_PACKAGES_IA32 =3D TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_IA32 +TAB_PACKAGES_X64 =3D TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_X64 +TAB_PACKAGES_ARM =3D TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_ARM +TAB_PACKAGES_EBC =3D TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_EBC +TAB_PACKAGES_AARCH64 =3D TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_AARCH64 + +TAB_PCDS =3D 'Pcds' +TAB_PCDS_FIXED_AT_BUILD =3D 'FixedAtBuild' +TAB_PCDS_PATCHABLE_IN_MODULE =3D 'PatchableInModule' +TAB_PCDS_FEATURE_FLAG =3D 'FeatureFlag' +TAB_PCDS_DYNAMIC_EX =3D 'DynamicEx' +TAB_PCDS_DYNAMIC_EX_DEFAULT =3D 'DynamicExDefault' +TAB_PCDS_DYNAMIC_EX_VPD =3D 'DynamicExVpd' +TAB_PCDS_DYNAMIC_EX_HII =3D 'DynamicExHii' +TAB_PCDS_DYNAMIC =3D 'Dynamic' +TAB_PCDS_DYNAMIC_DEFAULT =3D 'DynamicDefault' +TAB_PCDS_DYNAMIC_VPD =3D 'DynamicVpd' +TAB_PCDS_DYNAMIC_HII =3D 'DynamicHii' + +PCD_DYNAMIC_TYPE_SET =3D {TAB_PCDS_DYNAMIC, TAB_PCDS_DYNAMIC_DEFAULT, TAB_= PCDS_DYNAMIC_VPD, TAB_PCDS_DYNAMIC_HII} +PCD_DYNAMIC_EX_TYPE_SET =3D {TAB_PCDS_DYNAMIC_EX, TAB_PCDS_DYNAMIC_EX_DEFA= ULT, TAB_PCDS_DYNAMIC_EX_VPD, TAB_PCDS_DYNAMIC_EX_HII} + +# leave as a list for order +PCD_TYPE_LIST =3D [TAB_PCDS_FIXED_AT_BUILD, TAB_PCDS_PATCHABLE_IN_MODULE, = TAB_PCDS_FEATURE_FLAG, TAB_PCDS_DYNAMIC, TAB_PCDS_DYNAMIC_EX] + +TAB_PCDS_FIXED_AT_BUILD_NULL =3D TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD +TAB_PCDS_FIXED_AT_BUILD_COMMON =3D TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TA= B_SPLIT + TAB_ARCH_COMMON +TAB_PCDS_FIXED_AT_BUILD_IA32 =3D TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_= SPLIT + TAB_ARCH_IA32 +TAB_PCDS_FIXED_AT_BUILD_X64 =3D TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_S= PLIT + TAB_ARCH_X64 +TAB_PCDS_FIXED_AT_BUILD_ARM =3D TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_S= PLIT + TAB_ARCH_ARM +TAB_PCDS_FIXED_AT_BUILD_EBC =3D TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + TAB_S= PLIT + TAB_ARCH_EBC +TAB_PCDS_FIXED_AT_BUILD_AARCH64 =3D TAB_PCDS + TAB_PCDS_FIXED_AT_BUILD + T= AB_SPLIT + TAB_ARCH_AARCH64 + +TAB_PCDS_PATCHABLE_IN_MODULE_NULL =3D TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MOD= ULE +TAB_PCDS_PATCHABLE_IN_MODULE_COMMON =3D TAB_PCDS + TAB_PCDS_PATCHABLE_IN_M= ODULE + TAB_SPLIT + TAB_ARCH_COMMON +TAB_PCDS_PATCHABLE_IN_MODULE_IA32 =3D TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MOD= ULE + TAB_SPLIT + TAB_ARCH_IA32 +TAB_PCDS_PATCHABLE_IN_MODULE_X64 =3D TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODU= LE + TAB_SPLIT + TAB_ARCH_X64 +TAB_PCDS_PATCHABLE_IN_MODULE_ARM =3D TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODU= LE + TAB_SPLIT + TAB_ARCH_ARM +TAB_PCDS_PATCHABLE_IN_MODULE_EBC =3D TAB_PCDS + TAB_PCDS_PATCHABLE_IN_MODU= LE + TAB_SPLIT + TAB_ARCH_EBC +TAB_PCDS_PATCHABLE_IN_MODULE_AARCH64 =3D TAB_PCDS + TAB_PCDS_PATCHABLE_IN_= MODULE + TAB_SPLIT + TAB_ARCH_AARCH64 + +TAB_PCDS_FEATURE_FLAG_NULL =3D TAB_PCDS + TAB_PCDS_FEATURE_FLAG +TAB_PCDS_FEATURE_FLAG_COMMON =3D TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SP= LIT + TAB_ARCH_COMMON +TAB_PCDS_FEATURE_FLAG_IA32 =3D TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLI= T + TAB_ARCH_IA32 +TAB_PCDS_FEATURE_FLAG_X64 =3D TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT= + TAB_ARCH_X64 +TAB_PCDS_FEATURE_FLAG_ARM =3D TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT= + TAB_ARCH_ARM +TAB_PCDS_FEATURE_FLAG_EBC =3D TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_SPLIT= + TAB_ARCH_EBC +TAB_PCDS_FEATURE_FLAG_AARCH64 =3D TAB_PCDS + TAB_PCDS_FEATURE_FLAG + TAB_S= PLIT + TAB_ARCH_AARCH64 + +TAB_PCDS_DYNAMIC_EX_NULL =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX +TAB_PCDS_DYNAMIC_EX_DEFAULT_NULL =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX_DEFAULT +TAB_PCDS_DYNAMIC_EX_HII_NULL =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX_HII +TAB_PCDS_DYNAMIC_EX_VPD_NULL =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX_VPD +TAB_PCDS_DYNAMIC_EX_COMMON =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT = + TAB_ARCH_COMMON +TAB_PCDS_DYNAMIC_EX_IA32 =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + = TAB_ARCH_IA32 +TAB_PCDS_DYNAMIC_EX_X64 =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + T= AB_ARCH_X64 +TAB_PCDS_DYNAMIC_EX_ARM =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + T= AB_ARCH_ARM +TAB_PCDS_DYNAMIC_EX_EBC =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT + T= AB_ARCH_EBC +TAB_PCDS_DYNAMIC_EX_AARCH64 =3D TAB_PCDS + TAB_PCDS_DYNAMIC_EX + TAB_SPLIT= + TAB_ARCH_AARCH64 + +TAB_PCDS_DYNAMIC_NULL =3D TAB_PCDS + TAB_PCDS_DYNAMIC +TAB_PCDS_DYNAMIC_DEFAULT_NULL =3D TAB_PCDS + TAB_PCDS_DYNAMIC_DEFAULT +TAB_PCDS_DYNAMIC_HII_NULL =3D TAB_PCDS + TAB_PCDS_DYNAMIC_HII +TAB_PCDS_DYNAMIC_VPD_NULL =3D TAB_PCDS + TAB_PCDS_DYNAMIC_VPD +TAB_PCDS_DYNAMIC_COMMON =3D TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_= ARCH_COMMON +TAB_PCDS_DYNAMIC_IA32 =3D TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_AR= CH_IA32 +TAB_PCDS_DYNAMIC_X64 =3D TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARC= H_X64 +TAB_PCDS_DYNAMIC_ARM =3D TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARC= H_ARM +TAB_PCDS_DYNAMIC_EBC =3D TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB_ARC= H_EBC +TAB_PCDS_DYNAMIC_AARCH64 =3D TAB_PCDS + TAB_PCDS_DYNAMIC + TAB_SPLIT + TAB= _ARCH_AARCH64 + +TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_PEI_PAGE_SIZE =3D 'PcdLoadFixAddressPe= iCodePageNumber' +TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_PEI_PAGE_SIZE_DATA_TYPE =3D 'UINT32' +TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_DXE_PAGE_SIZE =3D 'PcdLoadFixAddressBo= otTimeCodePageNumber' +TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_DXE_PAGE_SIZE_DATA_TYPE =3D 'UINT32' +TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_RUNTIME_PAGE_SIZE =3D 'PcdLoadFixAddre= ssRuntimeCodePageNumber' +TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_RUNTIME_PAGE_SIZE_DATA_TYPE =3D 'UINT3= 2' +TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_SMM_PAGE_SIZE =3D 'PcdLoadFixAddressSm= mCodePageNumber' +TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_SMM_PAGE_SIZE_DATA_TYPE =3D 'UINT32' +TAB_PCDS_PATCHABLE_LOAD_FIX_ADDRESS_SET =3D {TAB_PCDS_PATCHABLE_LOAD_FIX_= ADDRESS_PEI_PAGE_SIZE, \ + TAB_PCDS_PATCHABLE_LOAD_FIX_AD= DRESS_DXE_PAGE_SIZE, \ + TAB_PCDS_PATCHABLE_LOAD_FIX_AD= DRESS_RUNTIME_PAGE_SIZE, \ + TAB_PCDS_PATCHABLE_LOAD_FIX_AD= DRESS_SMM_PAGE_SIZE} + +## The mapping dictionary from datum type to its maximum number. +MAX_VAL_TYPE =3D {"BOOLEAN":0x01, TAB_UINT8:0xFF, TAB_UINT16:0xFFFF, TAB_U= INT32:0xFFFFFFFF, TAB_UINT64:0xFFFFFFFFFFFFFFFF} +## The mapping dictionary from datum type to size string. +MAX_SIZE_TYPE =3D {"BOOLEAN":1, TAB_UINT8:1, TAB_UINT16:2, TAB_UINT32:4, T= AB_UINT64:8} + +TAB_DEPEX =3D 'Depex' +TAB_DEPEX_COMMON =3D TAB_DEPEX + TAB_SPLIT + TAB_ARCH_COMMON +TAB_DEPEX_IA32 =3D TAB_DEPEX + TAB_SPLIT + TAB_ARCH_IA32 +TAB_DEPEX_X64 =3D TAB_DEPEX + TAB_SPLIT + TAB_ARCH_X64 +TAB_DEPEX_ARM =3D TAB_DEPEX + TAB_SPLIT + TAB_ARCH_ARM +TAB_DEPEX_EBC =3D TAB_DEPEX + TAB_SPLIT + TAB_ARCH_EBC +TAB_DEPEX_AARCH64 =3D TAB_DEPEX + TAB_SPLIT + TAB_ARCH_AARCH64 + +TAB_SKUIDS =3D 'SkuIds' +TAB_DEFAULT_STORES =3D 'DefaultStores' +TAB_DEFAULT_STORES_DEFAULT =3D 'STANDARD' + +TAB_LIBRARIES =3D 'Libraries' +TAB_LIBRARIES_COMMON =3D TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_COMMON +TAB_LIBRARIES_IA32 =3D TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_IA32 +TAB_LIBRARIES_X64 =3D TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_X64 +TAB_LIBRARIES_ARM =3D TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_ARM +TAB_LIBRARIES_EBC =3D TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_EBC +TAB_LIBRARIES_AARCH64 =3D TAB_LIBRARIES + TAB_SPLIT + TAB_ARCH_AARCH64 + +TAB_COMPONENTS =3D 'Components' +TAB_COMPONENTS_COMMON =3D TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_COMMON +TAB_COMPONENTS_IA32 =3D TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_IA32 +TAB_COMPONENTS_X64 =3D TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_X64 +TAB_COMPONENTS_ARM =3D TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_ARM +TAB_COMPONENTS_EBC =3D TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_EBC +TAB_COMPONENTS_AARCH64 =3D TAB_COMPONENTS + TAB_SPLIT + TAB_ARCH_AARCH64 + +TAB_BUILD_OPTIONS =3D 'BuildOptions' + +TAB_DEFINE =3D 'DEFINE' +TAB_NMAKE =3D 'Nmake' +TAB_USER_EXTENSIONS =3D 'UserExtensions' +TAB_INCLUDE =3D '!include' +TAB_DEFAULT =3D 'DEFAULT' +TAB_COMMON =3D 'COMMON' + +# +# Common Define +# +TAB_COMMON_DEFINES =3D 'Defines' + +# +# Inf Definitions +# +TAB_INF_DEFINES =3D TAB_COMMON_DEFINES +TAB_INF_DEFINES_INF_VERSION =3D 'INF_VERSION' +TAB_INF_DEFINES_BASE_NAME =3D 'BASE_NAME' +TAB_INF_DEFINES_FILE_GUID =3D 'FILE_GUID' +TAB_INF_DEFINES_MODULE_TYPE =3D 'MODULE_TYPE' +TAB_INF_DEFINES_EFI_SPECIFICATION_VERSION =3D 'EFI_SPECIFICATION_VERSION' +TAB_INF_DEFINES_UEFI_SPECIFICATION_VERSION =3D 'UEFI_SPECIFICATION_VERSION' +TAB_INF_DEFINES_PI_SPECIFICATION_VERSION =3D 'PI_SPECIFICATION_VERSION' +TAB_INF_DEFINES_EDK_RELEASE_VERSION =3D 'EDK_RELEASE_VERSION' +TAB_INF_DEFINES_BINARY_MODULE =3D 'BINARY_MODULE' +TAB_INF_DEFINES_LIBRARY_CLASS =3D 'LIBRARY_CLASS' +TAB_INF_DEFINES_COMPONENT_TYPE =3D 'COMPONENT_TYPE' +TAB_INF_DEFINES_MAKEFILE_NAME =3D 'MAKEFILE_NAME' +TAB_INF_DEFINES_DPX_SOURCE =3D 'DPX_SOURCE' +TAB_INF_DEFINES_BUILD_NUMBER =3D 'BUILD_NUMBER' +TAB_INF_DEFINES_BUILD_TYPE =3D 'BUILD_TYPE' +TAB_INF_DEFINES_FFS_EXT =3D 'FFS_EXT' +TAB_INF_DEFINES_FV_EXT =3D 'FV_EXT' +TAB_INF_DEFINES_SOURCE_FV =3D 'SOURCE_FV' +TAB_INF_DEFINES_VERSION_NUMBER =3D 'VERSION_NUMBER' +TAB_INF_DEFINES_VERSION =3D 'VERSION' # for Edk inf, the same as = VERSION_NUMBER +TAB_INF_DEFINES_VERSION_STRING =3D 'VERSION_STRING' +TAB_INF_DEFINES_PCD_IS_DRIVER =3D 'PCD_IS_DRIVER' +TAB_INF_DEFINES_TIANO_EDK_FLASHMAP_H =3D 'TIANO_EDK_FLASHMAP_H' +TAB_INF_DEFINES_ENTRY_POINT =3D 'ENTRY_POINT' +TAB_INF_DEFINES_UNLOAD_IMAGE =3D 'UNLOAD_IMAGE' +TAB_INF_DEFINES_CONSTRUCTOR =3D 'CONSTRUCTOR' +TAB_INF_DEFINES_DESTRUCTOR =3D 'DESTRUCTOR' +TAB_INF_DEFINES_DEFINE =3D 'DEFINE' +TAB_INF_DEFINES_SPEC =3D 'SPEC' +TAB_INF_DEFINES_CUSTOM_MAKEFILE =3D 'CUSTOM_MAKEFILE' +TAB_INF_DEFINES_MACRO =3D '__MACROS__' +TAB_INF_DEFINES_SHADOW =3D 'SHADOW' +TAB_INF_FIXED_PCD =3D 'FixedPcd' +TAB_INF_FEATURE_PCD =3D 'FeaturePcd' +TAB_INF_PATCH_PCD =3D 'PatchPcd' +TAB_INF_PCD =3D 'Pcd' +TAB_INF_PCD_EX =3D 'PcdEx' +TAB_INF_USAGE_PRO =3D 'PRODUCES' +TAB_INF_USAGE_SOME_PRO =3D 'SOMETIMES_PRODUCES' +TAB_INF_USAGE_CON =3D 'CONSUMES' +TAB_INF_USAGE_SOME_CON =3D 'SOMETIMES_CONSUMES' +TAB_INF_USAGE_NOTIFY =3D 'NOTIFY' +TAB_INF_USAGE_TO_START =3D 'TO_START' +TAB_INF_USAGE_BY_START =3D 'BY_START' +TAB_INF_GUIDTYPE_EVENT =3D 'Event' +TAB_INF_GUIDTYPE_FILE =3D 'File' +TAB_INF_GUIDTYPE_FV =3D 'FV' +TAB_INF_GUIDTYPE_GUID =3D 'GUID' +TAB_INF_GUIDTYPE_HII =3D 'HII' +TAB_INF_GUIDTYPE_HOB =3D 'HOB' +TAB_INF_GUIDTYPE_ST =3D 'SystemTable' +TAB_INF_GUIDTYPE_TSG =3D 'TokenSpaceGuid' +TAB_INF_GUIDTYPE_VAR =3D 'Variable' +TAB_INF_GUIDTYPE_PROTOCOL =3D 'PROTOCOL' +TAB_INF_GUIDTYPE_PPI =3D 'PPI' +TAB_INF_USAGE_UNDEFINED =3D 'UNDEFINED' + +# +# Dec Definitions +# +TAB_DEC_DEFINES =3D TAB_COMMON_DEFINES +TAB_DEC_DEFINES_DEC_SPECIFICATION =3D 'DEC_SPECIFICATION' +TAB_DEC_DEFINES_PACKAGE_NAME =3D 'PACKAGE_NAME' +TAB_DEC_DEFINES_PACKAGE_GUID =3D 'PACKAGE_GUID' +TAB_DEC_DEFINES_PACKAGE_VERSION =3D 'PACKAGE_VERSION' +TAB_DEC_DEFINES_PKG_UNI_FILE =3D 'PKG_UNI_FILE' + +# +# Dsc Definitions +# +TAB_DSC_DEFINES =3D TAB_COMMON_DEFINES +TAB_DSC_DEFINES_PLATFORM_NAME =3D 'PLATFORM_NAME' +TAB_DSC_DEFINES_PLATFORM_GUID =3D 'PLATFORM_GUID' +TAB_DSC_DEFINES_PLATFORM_VERSION =3D 'PLATFORM_VERSION' +TAB_DSC_DEFINES_DSC_SPECIFICATION =3D 'DSC_SPECIFICATION' +TAB_DSC_DEFINES_OUTPUT_DIRECTORY =3D 'OUTPUT_DIRECTORY' +TAB_DSC_DEFINES_SUPPORTED_ARCHITECTURES =3D 'SUPPORTED_ARCHITECTURES' +TAB_DSC_DEFINES_BUILD_TARGETS =3D 'BUILD_TARGETS' +TAB_DSC_DEFINES_SKUID_IDENTIFIER =3D 'SKUID_IDENTIFIER' +TAB_DSC_DEFINES_PCD_INFO_GENERATION =3D 'PCD_INFO_GENERATION' +TAB_DSC_DEFINES_PCD_VAR_CHECK_GENERATION =3D 'PCD_VAR_CHECK_GENERATION' +TAB_DSC_DEFINES_FLASH_DEFINITION =3D 'FLASH_DEFINITION' +TAB_DSC_DEFINES_BUILD_NUMBER =3D 'BUILD_NUMBER' +TAB_DSC_DEFINES_MAKEFILE_NAME =3D 'MAKEFILE_NAME' +TAB_DSC_DEFINES_BS_BASE_ADDRESS =3D 'BsBaseAddress' +TAB_DSC_DEFINES_RT_BASE_ADDRESS =3D 'RtBaseAddress' +TAB_DSC_DEFINES_RFC_LANGUAGES =3D 'RFC_LANGUAGES' +TAB_DSC_DEFINES_ISO_LANGUAGES =3D 'ISO_LANGUAGES' +TAB_DSC_DEFINES_DEFINE =3D 'DEFINE' +TAB_DSC_DEFINES_VPD_TOOL_GUID =3D 'VPD_TOOL_GUID' +TAB_FIX_LOAD_TOP_MEMORY_ADDRESS =3D 'FIX_LOAD_TOP_MEMORY_ADDRESS' +TAB_DSC_DEFINES_EDKGLOBAL =3D 'EDK_GLOBAL' +TAB_DSC_PREBUILD =3D 'PREBUILD' +TAB_DSC_POSTBUILD =3D 'POSTBUILD' +# +# TargetTxt Definitions +# +TAB_TAT_DEFINES_ACTIVE_PLATFORM =3D 'ACTIVE_PLATFORM' +TAB_TAT_DEFINES_ACTIVE_MODULE =3D 'ACTIVE_MODULE' +TAB_TAT_DEFINES_TOOL_CHAIN_CONF =3D 'TOOL_CHAIN_CONF' +TAB_TAT_DEFINES_MAX_CONCURRENT_THREAD_NUMBER =3D 'MAX_CONCURRENT_THREAD_NU= MBER' +TAB_TAT_DEFINES_TARGET =3D 'TARGET' +TAB_TAT_DEFINES_TOOL_CHAIN_TAG =3D 'TOOL_CHAIN_TAG' +TAB_TAT_DEFINES_TARGET_ARCH =3D 'TARGET_ARCH' +TAB_TAT_DEFINES_BUILD_RULE_CONF =3D "BUILD_RULE_CONF" + +# +# ToolDef Definitions +# +TAB_TOD_DEFINES_TARGET =3D 'TARGET' +TAB_TOD_DEFINES_TOOL_CHAIN_TAG =3D 'TOOL_CHAIN_TAG' +TAB_TOD_DEFINES_TARGET_ARCH =3D 'TARGET_ARCH' +TAB_TOD_DEFINES_COMMAND_TYPE =3D 'COMMAND_TYPE' +TAB_TOD_DEFINES_FAMILY =3D 'FAMILY' +TAB_TOD_DEFINES_BUILDRULEFAMILY =3D 'BUILDRULEFAMILY' +TAB_TOD_DEFINES_BUILDRULEORDER =3D 'BUILDRULEORDER' + +# +# Conditional Statements +# +TAB_IF =3D '!if' +TAB_END_IF =3D '!endif' +TAB_ELSE_IF =3D '!elseif' +TAB_ELSE =3D '!else' +TAB_IF_DEF =3D '!ifdef' +TAB_IF_N_DEF =3D '!ifndef' +TAB_IF_EXIST =3D '!if exist' +TAB_ERROR =3D '!error' + +# +# Unknown section +# +TAB_UNKNOWN =3D 'UNKNOWN' + +# +# Build database path +# +DATABASE_PATH =3D ":memory:" #"BuildDatabase.db" + +# used by ECC +MODIFIER_SET =3D {'IN', 'OUT', 'OPTIONAL', 'UNALIGNED', 'EFI_RUNTIMESERVIC= E', 'EFI_BOOTSERVICE', 'EFIAPI'} + +# Dependency Opcodes +DEPEX_OPCODE_BEFORE =3D "BEFORE" +DEPEX_OPCODE_AFTER =3D "AFTER" +DEPEX_OPCODE_PUSH =3D "PUSH" +DEPEX_OPCODE_AND =3D "AND" +DEPEX_OPCODE_OR =3D "OR" +DEPEX_OPCODE_NOT =3D "NOT" +DEPEX_OPCODE_END =3D "END" +DEPEX_OPCODE_SOR =3D "SOR" +DEPEX_OPCODE_TRUE =3D "TRUE" +DEPEX_OPCODE_FALSE =3D "FALSE" + +# Dependency Expression +DEPEX_SUPPORTED_OPCODE_SET =3D {"BEFORE", "AFTER", "PUSH", "AND", "OR", "N= OT", "END", "SOR", "TRUE", "FALSE", '(', ')'} + +TAB_STATIC_LIBRARY =3D "STATIC-LIBRARY-FILE" +TAB_DYNAMIC_LIBRARY =3D "DYNAMIC-LIBRARY-FILE" +TAB_FRAMEWORK_IMAGE =3D "EFI-IMAGE-FILE" +TAB_C_CODE_FILE =3D "C-CODE-FILE" +TAB_C_HEADER_FILE =3D "C-HEADER-FILE" +TAB_UNICODE_FILE =3D "UNICODE-TEXT-FILE" +TAB_IMAGE_FILE =3D "IMAGE-DEFINITION-FILE" +TAB_DEPENDENCY_EXPRESSION_FILE =3D "DEPENDENCY-EXPRESSION-FILE" +TAB_UNKNOWN_FILE =3D "UNKNOWN-TYPE-FILE" +TAB_DEFAULT_BINARY_FILE =3D "_BINARY_FILE_" +TAB_OBJECT_FILE =3D "OBJECT-FILE" +TAB_VFR_FILE =3D 'VISUAL-FORM-REPRESENTATION-FILE' + +# used by BRG +TAB_BRG_PCD =3D 'PCD' +TAB_BRG_LIBRARY =3D 'Library' + +# +# Build Rule File Version Definition +# +TAB_BUILD_RULE_VERSION =3D "build_rule_version" + +# section name for PCDs +PCDS_DYNAMIC_DEFAULT =3D "PcdsDynamicDefault" +PCDS_DYNAMIC_VPD =3D "PcdsDynamicVpd" +PCDS_DYNAMIC_HII =3D "PcdsDynamicHii" +PCDS_DYNAMICEX_DEFAULT =3D "PcdsDynamicExDefault" +PCDS_DYNAMICEX_VPD =3D "PcdsDynamicExVpd" +PCDS_DYNAMICEX_HII =3D "PcdsDynamicExHii" + +SECTIONS_HAVE_ITEM_PCD_SET =3D {PCDS_DYNAMIC_DEFAULT.upper(), PCDS_DYNAMIC= _VPD.upper(), PCDS_DYNAMIC_HII.upper(), \ + PCDS_DYNAMICEX_DEFAULT.upper(), PCDS_DYNAMIC= EX_VPD.upper(), PCDS_DYNAMICEX_HII.upper()} +# Section allowed to have items after arch +SECTIONS_HAVE_ITEM_AFTER_ARCH_SET =3D {TAB_LIBRARY_CLASSES.upper(), TAB_DE= PEX.upper(), TAB_USER_EXTENSIONS.upper(), + PCDS_DYNAMIC_DEFAULT.upper(), + PCDS_DYNAMIC_VPD.upper(), + PCDS_DYNAMIC_HII.upper(), + PCDS_DYNAMICEX_DEFAULT.upper(), + PCDS_DYNAMICEX_VPD.upper(), + PCDS_DYNAMICEX_HII.upper(), + TAB_BUILD_OPTIONS.upper(), + TAB_INCLUDES.upper()} + +# +# pack codes as used in PcdDb and elsewhere +# +PACK_PATTERN_GUID =3D '=3DLHHBBBBBBBB' +PACK_CODE_BY_SIZE =3D {8:'=3DQ', + 4:'=3DL', + 2:'=3DH', + 1:'=3DB', + 0:'=3DB', + 16:""} + +TAB_COMPILER_MSFT =3D 'MSFT' --=20 2.7.4 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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