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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id d18sm685280lfl.95.2019.05.24.08.59.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 24 May 2019 08:59:28 -0700 (PDT) From: "Marcin Wojtas" To: devel@edk2.groups.io Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, mw@semihalf.com, jsd@semihalf.com, jaz@semihalf.com, kostap@marvell.com, Jici.Gao@arm.com, rebecca@bluestop.org, kettenis@jive.eu Subject: [edk2-devel] [edk2-platforms: PATCH v3 01/14] Marvell/Library: MvGpioLib: Extend GPIO pin description Date: Fri, 24 May 2019 17:58:58 +0200 Message-Id: <1558713551-25363-2-git-send-email-mw@semihalf.com> In-Reply-To: <1558713551-25363-1-git-send-email-mw@semihalf.com> References: <1558713551-25363-1-git-send-email-mw@semihalf.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mw@semihalf.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1558713572; bh=N8ZHGD/U2YEJTYAs7CLDDz+9lSj+5EW/Wi/QPOy61qM=; h=Cc:Date:From:Reply-To:Subject:To; b=Y56kiULbGrANP8qBTk20ZbW88jW4xp6CRXLQ0Hm/yVECzYEbAz0tt8wfdcL1ygIm6qz xH+PhFqyz5BnNFUzGIwfTOqWsHLLYY8zExuW5LZlY4WT+fVJhyAyK6G/IJ4BDlUUEaTNF wsUr1uWUnKpiVePKbxqOH5tzUnJDJ8TDyc8= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" In order to avoid hardcoding the controller type when using MV_GPIO_PIN, extend this structure with new according field. This patch is required to properly handle PCIE slot reset with the GPIO pin. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- Silicon/Marvell/Include/Library/MvGpioLib.h = | 1 + Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDiscoverableInitLi= b.c | 4 ++++ Platform/Marvell/Armada80x0Db/NonDiscoverableInitLib/NonDiscoverableInitLi= b.c | 6 ++++++ Platform/SolidRun/Armada80x0McBin/NonDiscoverableInitLib/NonDiscoverableIn= itLib.c | 1 + 4 files changed, 12 insertions(+) diff --git a/Silicon/Marvell/Include/Library/MvGpioLib.h b/Silicon/Marvell/= Include/Library/MvGpioLib.h index 6ca9e79..35d979d 100644 --- a/Silicon/Marvell/Include/Library/MvGpioLib.h +++ b/Silicon/Marvell/Include/Library/MvGpioLib.h @@ -47,6 +47,7 @@ typedef struct { } MV_GPIO_DEVICE_PATH; =20 typedef struct { + MV_GPIO_DRIVER_TYPE ControllerType; UINTN ControllerId; UINTN PinNumber; BOOLEAN ActiveHigh; diff --git a/Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDiscov= erableInitLib.c b/Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonD= iscoverableInitLib.c index 554155e..92a14bb 100644 --- a/Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDiscoverableI= nitLib.c +++ b/Platform/Marvell/Armada70x0Db/NonDiscoverableInitLib/NonDiscoverableI= nitLib.c @@ -23,21 +23,25 @@ =20 STATIC CONST MV_GPIO_PIN mXhciVbusPins[] =3D { { + MV_GPIO_DRIVER_TYPE_PCA95XX, ARMADA_70x0_DB_IO_EXPANDER0, ARMADA_70x0_DB_VBUS0_PIN, TRUE, }, { + MV_GPIO_DRIVER_TYPE_PCA95XX, ARMADA_70x0_DB_IO_EXPANDER0, ARMADA_70x0_DB_VBUS0_LIMIT_PIN, TRUE, }, { + MV_GPIO_DRIVER_TYPE_PCA95XX, ARMADA_70x0_DB_IO_EXPANDER0, ARMADA_70x0_DB_VBUS1_PIN, TRUE, }, { + MV_GPIO_DRIVER_TYPE_PCA95XX, ARMADA_70x0_DB_IO_EXPANDER0, ARMADA_70x0_DB_VBUS1_LIMIT_PIN, TRUE, diff --git a/Platform/Marvell/Armada80x0Db/NonDiscoverableInitLib/NonDiscov= erableInitLib.c b/Platform/Marvell/Armada80x0Db/NonDiscoverableInitLib/NonD= iscoverableInitLib.c index 804339f..cde73dd 100644 --- a/Platform/Marvell/Armada80x0Db/NonDiscoverableInitLib/NonDiscoverableI= nitLib.c +++ b/Platform/Marvell/Armada80x0Db/NonDiscoverableInitLib/NonDiscoverableI= nitLib.c @@ -23,31 +23,37 @@ =20 STATIC CONST MV_GPIO_PIN mXhciVbusPins[] =3D { { + MV_GPIO_DRIVER_TYPE_PCA95XX, ARMADA_80x0_DB_IO_EXPANDER0, ARMADA_80x0_DB_VBUS0_PIN, TRUE, }, { + MV_GPIO_DRIVER_TYPE_PCA95XX, ARMADA_80x0_DB_IO_EXPANDER0, ARMADA_80x0_DB_VBUS0_LIMIT_PIN, TRUE, }, { + MV_GPIO_DRIVER_TYPE_PCA95XX, ARMADA_80x0_DB_IO_EXPANDER0, ARMADA_80x0_DB_VBUS1_PIN, TRUE, }, { + MV_GPIO_DRIVER_TYPE_PCA95XX, ARMADA_80x0_DB_IO_EXPANDER0, ARMADA_80x0_DB_VBUS1_LIMIT_PIN, TRUE, }, { + MV_GPIO_DRIVER_TYPE_PCA95XX, ARMADA_80x0_DB_IO_EXPANDER1, ARMADA_80x0_DB_VBUS2_PIN, TRUE, }, { + MV_GPIO_DRIVER_TYPE_PCA95XX, ARMADA_80x0_DB_IO_EXPANDER1, ARMADA_80x0_DB_VBUS2_LIMIT_PIN, TRUE, diff --git a/Platform/SolidRun/Armada80x0McBin/NonDiscoverableInitLib/NonDi= scoverableInitLib.c b/Platform/SolidRun/Armada80x0McBin/NonDiscoverableInit= Lib/NonDiscoverableInitLib.c index c9e8872..f4e7246 100644 --- a/Platform/SolidRun/Armada80x0McBin/NonDiscoverableInitLib/NonDiscovera= bleInitLib.c +++ b/Platform/SolidRun/Armada80x0McBin/NonDiscoverableInitLib/NonDiscovera= bleInitLib.c @@ -22,6 +22,7 @@ #include "NonDiscoverableInitLib.h" =20 STATIC CONST MV_GPIO_PIN mXhciVbusPin =3D { + MV_GPIO_DRIVER_TYPE_SOC_CONTROLLER, MV_GPIO_CP0_CONTROLLER1, ARMADA_80x0_MCBIN_VBUS0_PIN, TRUE, --=20 2.7.4 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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