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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id p20-v6sm3367058lji.37.2018.07.12.00.40.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 12 Jul 2018 00:40:52 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::243; helo=mail-lf0-x243.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=BWZvCmJMPNnJqXpAYTpyMg5PqkORAGAREWYG1XnApYc=; b=xNCeN7plqD/6pXKvyi0uHV4VmlaI6W02080kVrdvNvgZEk0ioE+1qa6cn/Lrv6KADK XnAHWYy/xnW8dx2Mx1wLs6XVS5b+WR5qpkOLnXmBCB+bfhTYBT8fEU5CSSxjLIQNR2Sn UUp6KyOB4uo668LppUEQP8X9TxOBkbQRr3XyIoOXjUZQ1TWcIBMS0PACG5Jboyef8RX5 p2/ACJwIRotxg4+i8pXZDL/XIlGDCb3sBdLTvVqxh18oTk+6H3f3cKBATH333PjKdvsh 4bFEiaQAGtdc+Y4u0pZ1NruZroDGmMqZm2bEaLJxUOhpERSt6H4+z1iHqc3iG/3BTNvd ZdqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=BWZvCmJMPNnJqXpAYTpyMg5PqkORAGAREWYG1XnApYc=; b=f6FbUqvQdbUJPuG6SwzumRgNlVqjl4b9xP1PAdLJ6kFiwJfo1trCICOHxU/sq5q4ib VU5DenVkzORuYC1h6g56K2DbY0Gb66Tu2dRfO2LvzlMl+9U5dx+4QD8+BUfHIijslW2/ qJf8RZa5ITjkdhUj5zL6+MHMoCWnFrbHxhn6OFWMXM+V1EsHGo7Kz7i8ksks+5SUv0Oh fCwUJbGMjnBsGQFXyDSfrfYo+yEtgrZA0s9SCYD5DoQhsLTsJpcuts2QGq1jHH5S696d X+2qwYi61SHtDrOeYAR69IjSuhgkiLnoebxDmN8WP7CaWvYjE36E2/0IjBhBOTbLE5eg cCCw== X-Gm-Message-State: AOUpUlEinkx3SoxXQYP0jaGAfrvKDn5owHrf5u/OHxgnvtFSBQdUG2tS Dy3m0AJMnuvFV4bw09VsNPp6ErQhdZI= X-Google-Smtp-Source: AAOMgpdPGjKNDuEaV+39mJ9+j5hVvoQsCdEbMCA4yB4Qcv3ps2M0IT53OG+cvhKDdRHU5xzS8fuPcQ== X-Received: by 2002:a19:921a:: with SMTP id u26-v6mr946547lfd.89.1531381252842; Thu, 12 Jul 2018 00:40:52 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Thu, 12 Jul 2018 09:39:59 +0200 Message-Id: <1531381201-5022-5-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1531381201-5022-1-git-send-email-mw@semihalf.com> References: <1531381201-5022-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms: PATCH 4/6] Marvell/Library: Armada7k8kSoCDescLib: Introduce ICU information X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jaz@semihalf.com, hannah@marvell.com, nadavh@marvell.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" This patch introduces new library callback (ArmadaSoCDescIcuGet ()), which dynamically allocates and fills MV_SOC_ICU_DESC structure with the SoC description of ICU (Interrupt Consolidation Unit). Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescL= ib.h | 12 ++++++ Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h = | 30 +++++++++++++++ Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescL= ib.c | 39 ++++++++++++++++++++ 3 files changed, 81 insertions(+) diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada= 7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/= Armada7k8kSoCDescLib.h index 3072883..c14b985 100644 --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoC= DescLib.h +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoC= DescLib.h @@ -44,6 +44,18 @@ #define MV_SOC_I2C_BASE(I2c) (0x701000 + ((I2c) * 0x100)) =20 // +// Platform description of ICU (Interrupt Consolidation Unit) controllers +// +#define ICU_GIC_MAPPING_OFFSET 0 +#define ICU_NSR_SET_SPI_BASE 0xf03f0040 +#define ICU_NSR_CLEAR_SPI_BASE 0xf03f0048 +#define ICU_SEI_SET_SPI_BASE 0xf03f0230 +#define ICU_SEI_CLEAR_SPI_BASE 0xf03f0230 +#define ICU_REI_SET_SPI_BASE 0xf03f0270 +#define ICU_REI_CLEAR_SPI_BASE 0xf03f0270 +#define ICU_GROUP_UNSUPPORTED 0x0 + +// // Platform description of MDIO controllers // #define MV_SOC_MDIO_BASE(Cp) (MV_SOC_CP_BASE (Cp) + 0x12A200) diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/M= arvell/Include/Library/ArmadaSoCDescLib.h index 56efdbe..4d2a85f 100644 --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h @@ -58,6 +58,36 @@ ArmadaSoCDescI2cGet ( ); =20 // +// ICU (Interrupt Consolidation Unit) +// +typedef enum { + ICU_GROUP_NSR =3D 0, + ICU_GROUP_SR =3D 1, + ICU_GROUP_LPI =3D 2, + ICU_GROUP_VLPI =3D 3, + ICU_GROUP_SEI =3D 4, + ICU_GROUP_REI =3D 5, + ICU_GROUP_MAX, +} ICU_GROUP; + +typedef struct { + ICU_GROUP Group; + UINTN SetSpiAddr; + UINTN ClrSpiAddr; +} ICU_MSI; + +typedef struct { + UINTN IcuSpiBase; + ICU_MSI IcuMsi[ICU_GROUP_MAX]; +} MV_SOC_ICU_DESC; + +EFI_STATUS +EFIAPI +ArmadaSoCDescIcuGet ( + IN OUT MV_SOC_ICU_DESC **IcuDesc + ); + +// // MDIO // typedef struct { diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada= 7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/= Armada7k8kSoCDescLib.c index c7c9c13..8383206 100644 --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoC= DescLib.c +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoC= DescLib.c @@ -103,6 +103,45 @@ ArmadaSoCDescI2cGet ( return EFI_SUCCESS; } =20 +// +// Allocate the MSI address per interrupt Group, +// unsupported Groups get NULL address. +// +STATIC +MV_SOC_ICU_DESC mA7k8kIcuDescTemplate =3D { + ICU_GIC_MAPPING_OFFSET, + { + /* Non secure interrupts */ + {ICU_GROUP_NSR, ICU_NSR_SET_SPI_BASE, ICU_NSR_CLEAR_SPI_BASE}, + /* Secure interrupts */ + {ICU_GROUP_SR, ICU_GROUP_UNSUPPORTED, ICU_GROUP_UNSUPPORTED}, + /* LPI interrupts */ + {ICU_GROUP_LPI, ICU_GROUP_UNSUPPORTED, ICU_GROUP_UNSUPPORTED}, + /* Virtual LPI interrupts */ + {ICU_GROUP_VLPI, ICU_GROUP_UNSUPPORTED, ICU_GROUP_UNSUPPORTED}, + /* System error interrupts */ + {ICU_GROUP_SEI, ICU_SEI_SET_SPI_BASE, ICU_SEI_CLEAR_SPI_BASE}, + /* RAM error interrupts */ + {ICU_GROUP_REI, ICU_REI_SET_SPI_BASE, ICU_REI_CLEAR_SPI_BASE}, + } +}; + +EFI_STATUS +EFIAPI +ArmadaSoCDescIcuGet ( + IN OUT MV_SOC_ICU_DESC **IcuDesc + ) +{ + *IcuDesc =3D AllocateCopyPool (sizeof (mA7k8kIcuDescTemplate), + &mA7k8kIcuDescTemplate); + if (*IcuDesc =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); + return EFI_OUT_OF_RESOURCES; + } + + return EFI_SUCCESS; +} + EFI_STATUS EFIAPI ArmadaSoCDescMdioGet ( --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel