From nobody Fri Nov 1 12:37:04 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1517573160080482.1263883120678; Fri, 2 Feb 2018 04:06:00 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 953B42239364E; Fri, 2 Feb 2018 04:00:20 -0800 (PST) Received: from mail-pl0-x242.google.com (mail-pl0-x242.google.com [IPv6:2607:f8b0:400e:c01::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D574D2215BD98 for ; Fri, 2 Feb 2018 04:00:19 -0800 (PST) Received: by mail-pl0-x242.google.com with SMTP id o13so6020847pli.6 for ; Fri, 02 Feb 2018 04:05:58 -0800 (PST) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id b8sm3673047pff.31.2018.02.02.04.05.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 02 Feb 2018 04:05:57 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::242; helo=mail-pl0-x242.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=iZ+cEfG1WLJoRHUoBA3LH1y40EbR8cYfi3WCZ9rwQqQ=; b=RDtXd1yIR6iiy5kRf03mtWRyVl77sZSgqfUekGnEb63BE7nBLbH/1o3IGxgGlncpoN 7lxl7+3aANcN78QJo/X6RHryWP1gM8ouArCduVg2iyGJVNgrZy5WRHMo0JrtZmfmAINY IxRxSVF4B+mKiW93ML9jCEqvPxINghi8t0K5g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=iZ+cEfG1WLJoRHUoBA3LH1y40EbR8cYfi3WCZ9rwQqQ=; b=Z1pHVvPUarhBKSPFUywZJ7qn0Tmw8aEIQkpCJkXB5WlC2oWJoyYC6+3esjtLKLZURu Wk2Z7Bzh4CJpkm4GRDcOsHHYmVF0RBvu1DMtOo+cObsAw4K2iJ1lCniCTAtW8xGzycON 0iu0YZ1eSz3mxKJlL4soUZuFBudGhjqqha1lUZgEwBvUWnLHT5bHN65owc3YjYtd8Eh6 /6+jJqgDEbHQMAzwaNKlry8qr8/ZWFZmcHi2rs1etoNt4qjV62gKu7cCTcR13V6qMi1t edF345NTcuzmMG0LIf1w47mRMDKoCXY0oL/hQ1kcI8LQaELO02cd2KSKixXFK4gdFb2b adYA== X-Gm-Message-State: AKwxytctAqtHyiVGbilPHCvVcPoyzzTEAbwsmOb/d7kW8DBWao3LdFYa pXslpsG4HwES14xaV76zzKbnsw== X-Google-Smtp-Source: AH8x226tjcefaN7grLXvfQ8LTnNyuPawjDVKz/mmOC+EDUcvfhAXTgtIAD36d9sFrMOngCJZuJ4slw== X-Received: by 2002:a17:902:c01:: with SMTP id 1-v6mr3707558pls.55.1517573157696; Fri, 02 Feb 2018 04:05:57 -0800 (PST) From: Heyi Guo To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Fri, 2 Feb 2018 20:05:30 +0800 Message-Id: <1517573143-11451-3-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1517573143-11451-1-git-send-email-heyi.guo@linaro.org> References: <1517573143-11451-1-git-send-email-heyi.guo@linaro.org> Subject: [edk2] [PATCH edk2-platforms v3 02/15] Hisilicon/D05: Add PPTT support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com, huangdaode@hisilicon.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Add Processor Properties Topology Table, PPTT include Processor hierarchy node, Cache Type Structure and ID structure. PPTT is needed for lscpu command to show socket information correctly. https://bugs.linaro.org/show_bug.cgi?id=3D3206 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo Reviewed-by: Ard Biesheuvel Reviewed-by: Graeme Gregory Reveiwed-by: Jeremy Linton Reviewed-by: Leif Lindholm --- Platform/Hisilicon/D05/D05.dsc | 1 + Platform/Hisilicon/D05/D05.fdf | 1 + Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 529 ++++++++++++++++++++ Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 67 +++ Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 48 ++ 5 files changed, 646 insertions(+) diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 77a89fd..710339c 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -506,6 +506,7 @@ MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf =20 Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf + Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf =20 # diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index 78ab0c8..97de4d2 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -241,6 +241,7 @@ READ_LOCK_STATUS =3D TRUE INF Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf =20 INF RuleOverride=3DACPITABLE Silicon/Hisilicon/Hi1616/D05AcpiTables/Acpi= TablesHi1616.inf + INF Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf =20 # diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c b/Silicon/Hisilicon/Hi161= 6/Pptt/Pptt.c new file mode 100644 index 0000000..9ce2b32 --- /dev/null +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c @@ -0,0 +1,529 @@ +/** @file +* +* Copyright (c) 2018, Hisilicon Limited. All rights reserved. +* Copyright (c) 2018, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +* Based on the files under Platform/ARM/JunoPkg/AcpiTables/ +* +**/ + +#include "Pptt.h" + +EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol =3D NULL; +EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol =3D NULL; + +EFI_ACPI_DESCRIPTION_HEADER mPpttHeader =3D + ARM_ACPI_HEADER ( + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE, + EFI_ACPI_DESCRIPTION_HEADER, + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION + ); + +EFI_ACPI_6_2_PPTT_STRUCTURE_ID mPpttSocketType2[PPTT_SOCKET_COMPONENT_NO] = =3D +{ + {2, sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_ID), {0, 0}, PPTT_VENDOR_ID, 0, = 0, 0, 0, 0} +}; + +EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE mPpttCacheType1[PPTT_CACHE_NO]; + + +STATIC +VOID +InitCacheInfo ( + VOID + ) +{ + UINT8 Index; + EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_ATTRIBUTES Type1Attributes; + CSSELR_DATA CsselrData; + CCSIDR_DATA CcsidrData; + + for (Index =3D 0; Index < PPTT_CACHE_NO; Index++) { + CsselrData.Data =3D 0; + CcsidrData.Data =3D 0; + SetMem ( + &Type1Attributes, + sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_ATTRIBUTES), + 0 + ); + + if (Index =3D=3D 0) { //L1I + CsselrData.Bits.InD =3D 1; + CsselrData.Bits.Level =3D 0; + Type1Attributes.CacheType =3D 1; + } else if (Index =3D=3D 1) { + Type1Attributes.CacheType =3D 0; + CsselrData.Bits.Level =3D Index - 1; + } else { + Type1Attributes.CacheType =3D 2; + CsselrData.Bits.Level =3D Index - 1; + } + + CcsidrData.Data =3D ReadCCSIDR (CsselrData.Data); + + if (CcsidrData.Bits.Wa =3D=3D 1) { + Type1Attributes.AllocationType =3D EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALL= OCATION_WRITE; + if (CcsidrData.Bits.Ra =3D=3D 1) { + Type1Attributes.AllocationType =3D EFI_ACPI_6_2_CACHE_ATTRIBUTES_A= LLOCATION_READ_WRITE; + } + } + + if (CcsidrData.Bits.Wt =3D=3D 1) { + Type1Attributes.WritePolicy =3D 1; + } + DEBUG ((DEBUG_INFO, + "[Acpi PPTT] Level =3D %x!CcsidrData =3D %x!\n", + CsselrData.Bits.Level, + CcsidrData.Data)); + + mPpttCacheType1[Index].Type =3D EFI_ACPI_6_2_PPTT_TYPE_CACHE; + mPpttCacheType1[Index].Length =3D sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_= CACHE); + mPpttCacheType1[Index].Reserved[0] =3D 0; + mPpttCacheType1[Index].Reserved[1] =3D 0; + mPpttCacheType1[Index].Flags.SizePropertyValid =3D EFI_ACPI_6_2_PPTT_V= ALID; + mPpttCacheType1[Index].Flags.NumberOfSetsValid =3D EFI_ACPI_6_2_PPTT_V= ALID; + mPpttCacheType1[Index].Flags.AssociativityValid =3D EFI_ACPI_6_2_PPTT_= VALID; + mPpttCacheType1[Index].Flags.AllocationTypeValid =3D EFI_ACPI_6_2_PPTT= _VALID; + mPpttCacheType1[Index].Flags.CacheTypeValid =3D EFI_ACPI_6_2_PPTT_VALI= D; + mPpttCacheType1[Index].Flags.WritePolicyValid =3D EFI_ACPI_6_2_PPTT_VA= LID; + mPpttCacheType1[Index].Flags.LineSizeValid =3D EFI_ACPI_6_2_PPTT_VALID; + mPpttCacheType1[Index].Flags.Reserved =3D 0; + mPpttCacheType1[Index].NextLevelOfCache =3D 0; + + if (Index !=3D PPTT_CACHE_NO - 1) { + mPpttCacheType1[Index].NumberOfSets =3D (UINT16)CcsidrData.Bits.NumS= ets + 1; + mPpttCacheType1[Index].Associativity =3D (UINT16)CcsidrData.Bits.Ass= ociativity + 1; + mPpttCacheType1[Index].LineSize =3D (UINT16)( 1 << (CcsidrData.Bits.= LineSize + 4)); + mPpttCacheType1[Index].Size =3D mPpttCacheType1[Index].LineSize * = \ + mPpttCacheType1[Index].Associativity *= \ + mPpttCacheType1[Index].NumberOfSets; + CopyMem ( + &mPpttCacheType1[Index].Attributes, + &Type1Attributes, + sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_ATTRIBUTES) + ); + } else { + // L3 cache + mPpttCacheType1[Index].Size =3D 0x1000000; // 16m + mPpttCacheType1[Index].NumberOfSets =3D 0x2000; + mPpttCacheType1[Index].Associativity =3D 0x10; // CacheAssociativi= ty16Way + SetMem ( + &mPpttCacheType1[Index].Attributes, + sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_ATTRIBUTES), + 0x0A + ); + mPpttCacheType1[Index].LineSize =3D 0x80; // 128byte + } + } +} + +STATIC +EFI_STATUS +AddCoreTable ( + IN EFI_ACPI_DESCRIPTION_HEADER *PpttTable, + IN OUT UINT32 *PpttTableLengthRemain, + IN UINT32 Parent, + IN UINT32 ResourceNo, + IN UINT32 ProcessorId + ) +{ + EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR *PpttType0; + EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE *PpttType1; + UINT32 *PrivateResource; + UINT8 Index; + + if (*PpttTableLengthRemain < + (sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR) + ResourceNo * 4)) { + return EFI_OUT_OF_RESOURCES; + } + PpttType0 =3D (EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR *)((UINT8 *)PpttTab= le + + PpttTable->Length); + PpttType0->Type =3D 0; + SetMem (&PpttType0->Flags, sizeof (PpttType0->Flags), 0); + PpttType0->Flags.AcpiProcessorIdValid =3D EFI_ACPI_6_2_PPTT_VALID; + PpttType0->Parent=3D Parent; + PpttType0->AcpiProcessorId =3D ProcessorId; + PpttType0->NumberOfPrivateResources =3D ResourceNo; + PpttType0->Length =3D sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR) + + ResourceNo * 4; + + *PpttTableLengthRemain -=3D (UINTN)PpttType0->Length; + PpttTable->Length +=3D PpttType0->Length; + PrivateResource =3D (UINT32 *)((UINT8 *)PpttType0 + + sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESS= OR)); + + // Add cache type structure + for (Index =3D 0; Index < ResourceNo; Index++, PrivateResource++) { + if (*PpttTableLengthRemain < sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE= )) { + return EFI_OUT_OF_RESOURCES; + } + *PrivateResource =3D PpttTable->Length; + PpttType1 =3D (EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE *)((UINT8 *)PpttTable= + + PpttTable->Length); + gBS->CopyMem ( + PpttType1, + &mPpttCacheType1[Index], + sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE) + ); + *PpttTableLengthRemain -=3D PpttType1->Length; + PpttTable->Length +=3D PpttType1->Length; + } + + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS +AddClusterTable ( + IN EFI_ACPI_DESCRIPTION_HEADER *PpttTable, + IN OUT UINT32 *PpttTableLengthRemain, + IN UINT32 Parent, + IN UINT32 ResourceNo + ) +{ + EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR *PpttType0; + EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE *PpttType1; + UINT32 *PrivateResource; + + if ((*PpttTableLengthRemain) < + (sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR) + ResourceNo * 4)) { + return EFI_OUT_OF_RESOURCES; + } + PpttType0 =3D (EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR *)((UINT8 *)PpttTab= le + + PpttTable->Length); + PpttType0->Type =3D 0; + SetMem (&PpttType0->Flags, sizeof (PpttType0->Flags), 0); + PpttType0->Parent=3D Parent; + PpttType0->NumberOfPrivateResources =3D ResourceNo; + PpttType0->Length =3D sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR) + + ResourceNo * 4; + + *PpttTableLengthRemain -=3D PpttType0->Length; + PpttTable->Length +=3D PpttType0->Length; + PrivateResource =3D (UINT32 *)((UINT8 *)PpttType0 + + sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESS= OR)); + + // Add cache type structure + if (*PpttTableLengthRemain < sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE))= { + return EFI_OUT_OF_RESOURCES; + } + *PrivateResource =3D PpttTable->Length; + PpttType1 =3D (EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE *)((UINT8 *)PpttTable + + PpttTable->Length); + gBS->CopyMem ( + PpttType1, + &mPpttCacheType1[2], + sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE) + ); + *PpttTableLengthRemain -=3D PpttType1->Length; + PpttTable->Length +=3D PpttType1->Length; + + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS +AddScclTable ( + IN EFI_ACPI_DESCRIPTION_HEADER *PpttTable, + IN OUT UINT32 *PpttTableLengthRemain, + IN UINT32 Parent, + IN UINT32 ResourceNo + ) +{ + EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR *PpttType0; + EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE *PpttType1; + UINT32 *PrivateResource; + + if (*PpttTableLengthRemain < + (sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR) + ResourceNo * 4)) { + return EFI_OUT_OF_RESOURCES; + } + PpttType0 =3D (EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR *)((UINT8 *)PpttTab= le + + PpttTable->Length); + PpttType0->Type =3D 0; + SetMem (&PpttType0->Flags, sizeof (PpttType0->Flags), 0); + PpttType0->Parent=3D Parent; + PpttType0->NumberOfPrivateResources =3D ResourceNo; + PpttType0->Length =3D sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR) + + ResourceNo * 4; + + *PpttTableLengthRemain -=3D PpttType0->Length; + PpttTable->Length +=3D PpttType0->Length; + PrivateResource =3D (UINT32 *)((UINT8 *)PpttType0 + + sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESS= OR)); + + // Add cache type structure + if (*PpttTableLengthRemain < sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE))= { + return EFI_OUT_OF_RESOURCES; + } + *PrivateResource =3D PpttTable->Length; + PpttType1 =3D (EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE *)((UINT8 *)PpttTable + + PpttTable->Length); + gBS->CopyMem ( + PpttType1, + &mPpttCacheType1[3], + sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE) + ); + *PpttTableLengthRemain -=3D PpttType1->Length; + PpttTable->Length +=3D PpttType1->Length; + + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS +AddSocketTable ( + IN EFI_ACPI_DESCRIPTION_HEADER *PpttTable, + IN OUT UINT32 *PpttTableLengthRemain, + IN UINT32 Parent, + IN UINT32 ResourceNo + ) +{ + EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR *PpttType0; + EFI_ACPI_6_2_PPTT_STRUCTURE_ID *PpttType2; + UINT32 *PrivateResource; + UINT8 Index; + + if (*PpttTableLengthRemain < sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESS= OR)) { + return EFI_OUT_OF_RESOURCES; + } + PpttType0 =3D (EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR *)((UINT8 *)PpttTab= le + + PpttTable->Length); + PpttType0->Type =3D 0; + SetMem (&PpttType0->Flags, sizeof (PpttType0->Flags), 0); + PpttType0->Flags.PhysicalPackage =3D EFI_ACPI_6_2_PPTT_VALID; + PpttType0->Parent=3D Parent; + PpttType0->NumberOfPrivateResources =3D ResourceNo; + PpttType0->Length =3D sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR) + + ResourceNo * 4; + PpttTable->Length +=3D PpttType0->Length; + + *PpttTableLengthRemain -=3D PpttType0->Length; + if (*PpttTableLengthRemain < ResourceNo * 4) { + return EFI_OUT_OF_RESOURCES; + } + PrivateResource =3D (UINT32 *)((UINT8 *)PpttType0 + + sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESS= OR)); + DEBUG ((DEBUG_INFO, + "[Acpi PPTT] sizeof(EFI_ACPI_6_2_PPTT_STRUCTURE_ID) =3D %x!\n", + sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_ID))); + + for (Index =3D 0; Index < ResourceNo; Index++, PrivateResource++) { + if (*PpttTableLengthRemain < sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_ID)) { + return EFI_OUT_OF_RESOURCES; + } + *PrivateResource =3D PpttTable->Length; + PpttType2 =3D (EFI_ACPI_6_2_PPTT_STRUCTURE_ID *)((UINT8 *)PpttTable + + PpttTable->Length); + gBS->CopyMem ( + PpttType2, + &mPpttSocketType2[Index], + sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_ID) + ); + *PpttTableLengthRemain -=3D PpttType2->Length; + PpttTable->Length +=3D PpttType2->Length; + } + + return EFI_SUCCESS; +} + +STATIC +VOID +GetApic ( + IN EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable, + IN OUT EFI_ACPI_DESCRIPTION_HEADER *PpttTable, + IN UINT32 PpttTableLengthRemai= n, + IN UINT32 Index1 +) +{ + UINT32 IndexSocket, IndexSccl, IndexCluster, IndexCore; + UINT32 SocketOffset, ScclOffset, ClusterOffset; + UINT32 Parent =3D 0; + UINT32 ResourceNo =3D 0; + + // Get APIC data + for (IndexSocket =3D 0; IndexSocket < PPTT_SOCKET_NO; IndexSocket++) { + SocketOffset =3D 0; + for (IndexSccl =3D 0; IndexSccl < PPTT_SCCL_NO; IndexSccl++) { + ScclOffset =3D 0; + for (IndexCluster =3D 0; IndexCluster < PPTT_CLUSTER_NO; IndexCluste= r++) { + ClusterOffset =3D 0; + for (IndexCore =3D 0; IndexCore < PPTT_CORE_NO; IndexCore++) { + if (ApicTable->GicInterfaces[Index1].AcpiProcessorUid !=3D Index= 1) { + // This processor is unusable + DEBUG ((DEBUG_ERROR, "[Acpi PPTT] Please check MADT table for = UID!\n")); + return; + } + if ((ApicTable->GicInterfaces[Index1].Flags & BIT0) =3D=3D 0) { + // This processor is unusable + Index1++; + continue; + } + + if (SocketOffset =3D=3D 0) { + // Add socket0 for type0 table + ResourceNo =3D PPTT_SOCKET_COMPONENT_NO; + SocketOffset =3D PpttTable->Length; + Parent =3D 0; + AddSocketTable ( + PpttTable, + &PpttTableLengthRemain, + Parent, + ResourceNo + ); + } + if (ScclOffset =3D=3D 0) { + // Add socket0sccl0 for type0 table + ResourceNo =3D 1; + ScclOffset =3D PpttTable->Length; + Parent =3D SocketOffset; + AddScclTable ( + PpttTable, + &PpttTableLengthRemain, + Parent, + ResourceNo + ); + } + if (ClusterOffset =3D=3D 0) { + // Add socket0sccl0ClusterId for type0 table + ResourceNo =3D 1; + ClusterOffset =3D PpttTable->Length ; + Parent =3D ScclOffset; + AddClusterTable ( + PpttTable, + &PpttTableLengthRemain, + Parent, + ResourceNo + ); + } + + // Add socket0sccl0ClusterIdCoreId for type0 table + ResourceNo =3D 2; + Parent =3D ClusterOffset; + AddCoreTable ( + PpttTable, + &PpttTableLengthRemain, + Parent, + ResourceNo, + Index1 + ); + + Index1++; + } + } + } + } + return ; +} + +STATIC +VOID +PpttSetAcpiTable ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + UINTN AcpiTableHandle; + EFI_STATUS Status; + UINT8 Checksum; + EFI_ACPI_SDT_HEADER *Table; + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable; + EFI_ACPI_TABLE_VERSION TableVersion; + EFI_ACPI_DESCRIPTION_HEADER *PpttTable; + UINTN TableKey; + UINT32 Index0, Index1; + UINT32 PpttTableLengthRemain =3D = 0; + + gBS->CloseEvent (Event); + + InitCacheInfo (); + + PpttTable =3D (EFI_ACPI_DESCRIPTION_HEADER *)AllocateZeroPool (PPTT_TABL= E_MAX_LEN); + gBS->CopyMem ( + (VOID *)PpttTable, + &mPpttHeader, + sizeof (EFI_ACPI_DESCRIPTION_HEADER) + ); + PpttTableLengthRemain =3D PPTT_TABLE_MAX_LEN - sizeof (EFI_ACPI_DESCRIPT= ION_HEADER); + + for (Index0 =3D 0; Index0 < EFI_ACPI_MAX_NUM_TABLES; Index0++) { + Status =3D mAcpiSdtProtocol->GetAcpiTable ( + Index0, + &Table, + &TableVersion, + &TableKey + ); + if (EFI_ERROR (Status)) { + break; + } + + // Find APIC table + if (Table->Signature =3D=3D EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TAB= LE_SIGNATURE) { + break; + } + + } + + if (!EFI_ERROR (Status) && (Index0 !=3D EFI_ACPI_MAX_NUM_TABLES)) { + ApicTable =3D (EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *)Table; + Index1 =3D 0; + + GetApic (ApicTable, PpttTable, PpttTableLengthRemain, Index1); + + Checksum =3D CalculateCheckSum8 ((UINT8 *)(PpttTable), PpttTable->Leng= th); + PpttTable->Checksum =3D Checksum; + + AcpiTableHandle =3D 0; + Status =3D mAcpiTableProtocol->InstallAcpiTable ( + mAcpiTableProtocol, + PpttTable, + PpttTable->Length, + &AcpiTableHandle); + } + + FreePool (PpttTable); + return ; +} + +EFI_STATUS +EFIAPI +PpttEntryPoint( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_EVENT ReadyToBootEvent; + + Status =3D gBS->LocateProtocol ( + &gEfiAcpiTableProtocolGuid, + NULL, + (VOID **)&mAcpiTableProtocol); + ASSERT_EFI_ERROR (Status); + + Status =3D gBS->LocateProtocol ( + &gEfiAcpiSdtProtocolGuid, + NULL, + (VOID **)&mAcpiSdtProtocol); + ASSERT_EFI_ERROR (Status); + + Status =3D EfiCreateEventReadyToBootEx ( + TPL_NOTIFY, + PpttSetAcpiTable, + NULL, + &ReadyToBootEvent + ); + ASSERT_EFI_ERROR (Status); + + DEBUG ((DEBUG_INFO, "Acpi Pptt init done.\n")); + + return Status; +} diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h b/Silicon/Hisilicon/Hi161= 6/Pptt/Pptt.h new file mode 100644 index 0000000..01926e1 --- /dev/null +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h @@ -0,0 +1,67 @@ +/** @file +* +* Copyright (c) 2018, Hisilicon Limited. All rights reserved. +* Copyright (c) 2018, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +* Based on the files under Platform/ARM/JunoPkg/AcpiTables/ +* +**/ + +#ifndef _PPTT_H_ +#define _PPTT_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../D05AcpiTables/Hi1616Platform.h" + +#define PPTT_VENDOR_ID SIGNATURE_32('H', 'I', 'S', 'I') + +#define EFI_ACPI_MAX_NUM_TABLES 20 + +#define PPTT_TABLE_MAX_LEN 0x6000 +#define PPTT_SOCKET_NO 0x2 +#define PPTT_SCCL_NO 0x2 +#define PPTT_CLUSTER_NO 0x4 +#define PPTT_CORE_NO 0x4 +#define PPTT_SOCKET_COMPONENT_NO 0x1 +#define PPTT_CACHE_NO 0x4 + +typedef union { + struct { + UINT32 InD :1; + UINT32 Level :3; + UINT32 Reserved :28; + } Bits; + UINT32 Data; +} CSSELR_DATA; + +typedef union { + struct { + UINT32 LineSize :3; + UINT32 Associativity :10; + UINT32 NumSets :15; + UINT32 Wa :1; + UINT32 Ra :1; + UINT32 Wb :1; + UINT32 Wt :1; + } Bits; + UINT32 Data; +} CCSIDR_DATA; + +#endif // _PPTT_H_ + diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf b/Silicon/Hisilicon/Hi1= 616/Pptt/Pptt.inf new file mode 100644 index 0000000..ff6f772 --- /dev/null +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf @@ -0,0 +1,48 @@ +/** @file +* +* Copyright (c) 2018, Hisilicon Limited. All rights reserved. +* Copyright (c) 2018, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +* Based on the files under Platform/ARM/JunoPkg/AcpiTables/ +* +**/ + +[Defines] + INF_VERSION =3D 0x0001001A + BASE_NAME =3D AcpiPptt + FILE_GUID =3D AAB14F90-DC2E-4f33-A594-C7894A5B412D + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D PpttEntryPoint + +[Sources.common] + Pptt.c + +[Packages] + ArmPkg/ArmPkg.dec + MdePkg/MdePkg.dec + Silicon/Hisilicon/HisiPkg.dec + +[LibraryClasses] + ArmLib + BaseMemoryLib + DebugLib + HobLib + UefiDriverEntryPoint + UefiRuntimeServicesTableLib + +[Protocols] + gEfiAcpiSdtProtocolGuid ## PROTOCOL ALWAYS_CONSUMED + gEfiAcpiTableProtocolGuid ## PROTOCOL ALWAYS_CONSUMED + +[Depex] + gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid + --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel