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Thu, 18 Jan 2018 07:01:55 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c05::241; helo=mail-pg0-x241.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=aPKMvYmzXe7zCb7a1/VnHj4Kk3wV7WlFai7616QFLcQ=; b=cVnPX9im2WkTKt18Kh+M0/UPMNWtLKBa0RPpjIOeKWnFUVoZgI+7GrI/IQ5ajg4CtW xOSzZv65XJzpYuMBdAn/XfNaZbJdh3E+on8Da1iIq6KanhN5jcFUrN0+frIeAHrHJycj Il+6ZvC0RSe0R5fDEJK1MN5d3t1UnRl1wAJOc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=aPKMvYmzXe7zCb7a1/VnHj4Kk3wV7WlFai7616QFLcQ=; b=AGmQ2uY7CbwZkvph/zXeyMDoCw1KQRFKJt0NyfBijh4m0Lch3a725L+SSp4JuDeduH nv3HQy+eEr4V637q1AP0UwxnEdcD9NDYs11ReClM2yy9zg1S03p2CbDU8Yz9RR1yMtfE u3vWPIOCerSebAUVjKvl6SP7gbHxI/4AQYmLYD4AIuWAqleD5+Yxz6jgdVhEl0ZItGAE 6/bKldpcTb3pHxRviBaykPusXUVV5/So5WYWhLJWN0W2YfF+rDEJYMFgzuT4uDUMbVNj 2hNxtEYbI6jW21QwYtRqR3qhqpAGzizIfWMnjKODQCdIswJ8CB9icoXkfTJWBKylz2tE 5+3Q== X-Gm-Message-State: AKwxytemc8+Pg6IuIy+AKxiRL0BQY7IPvdcK+4Z1WGqcQUf0VqFHZqYK nK8rCs51NBxd6NweTAyhmLIHyg== X-Google-Smtp-Source: ACJfBouWUbbeNMw82Ohgs/LS2cq+6hSVXh5zAsItEKqJuMZMpnxv4nH3gBh9HrE18iiW65xIL0RDZQ== X-Received: by 10.98.58.194 with SMTP id v63mr29717688pfj.36.1516287716491; Thu, 18 Jan 2018 07:01:56 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 18 Jan 2018 23:01:30 +0800 Message-Id: <1516287703-35516-2-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516287703-35516-1-git-send-email-huangming23@huawei.com> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> Subject: [edk2] [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Jason Zhang Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jason Zhang Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Platform/Hisilicon/D05/D05.dsc | 1 + Platform/Hisilicon/D05/D05.fdf | 1 + Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 27 ++ Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc | 31 +- Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 447 ++++++++++++= ++++++++ Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 142 +++++++ Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 55 +++ 7 files changed, 677 insertions(+), 27 deletions(-) diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 77a89fd..710339c 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -506,6 +506,7 @@ MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf =20 Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf + Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf =20 # diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index 78ab0c8..97de4d2 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -241,6 +241,7 @@ READ_LOCK_STATUS =3D TRUE INF Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf =20 INF RuleOverride=3DACPITABLE Silicon/Hisilicon/Hi1616/D05AcpiTables/Acpi= TablesHi1616.inf + INF Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf =20 # diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h b/Sili= con/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h index 808219a..f1927e8 100644 --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h @@ -19,6 +19,7 @@ =20 #ifndef _HI1610_PLATFORM_H_ #define _HI1610_PLATFORM_H_ +#include =20 // // ACPI table information used to initialize tables. @@ -44,5 +45,31 @@ } =20 #define HI1616_WATCHDOG_COUNT 2 +#define HI1616_GIC_STRUCTURE_COUNT 64 + +#define HI1616_MPID_TA_BASE 0x10000 +#define HI1616_MPID_TB_BASE 0x30000 +#define HI1616_MPID_TA_2_BASE 0x50000 +#define HI1616_MPID_TB_2_BASE 0x70000 + +// Differs from Juno, we have another affinity level beyond cluster and co= re +#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (HI1616_MPID_TA_BASE | (= (ClusterId) << 8) | (CoreId)) +#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (HI1616_MPID_TB_BASE | (= (ClusterId) << 8) | (CoreId)) +#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (HI1616_MPID_TA_2_BASE= | ((ClusterId) << 8) | (CoreId)) +#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (HI1616_MPID_TB_2_BASE= | ((ClusterId) << 8) | (CoreId)) + +// +// Multiple APIC Description Table +// +#pragma pack (1) + +typedef struct { + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header; + EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[HI16= 16_GIC_STRUCTURE_COUNT]; + EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor; + EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8]; +} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE; + +#pragma pack () =20 #endif diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc b/Silic= on/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc index 169ee72..33dca03 100644 --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc @@ -1,9 +1,9 @@ /** @file * Multiple APIC Description Table (MADT) * -* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved. -* Copyright (c) 2015 - 2016, Hisilicon Limited. All rights reserved. -* Copyright (c) 2015 - 2016, Linaro Limited. All rights reserved. +* Copyright (c) 2012 - 2018, ARM Limited. All rights reserved. +* Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved. +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved. * * This program and the accompanying materials * @@ -19,34 +19,11 @@ * **/ =20 - -#include +#include "Hi1616Platform.h" #include #include #include #include -#include "Hi1616Platform.h" - -// Differs from Juno, we have another affinity level beyond cluster and co= re -// 0x20000 is only for socket 0 -#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (0x10000 | ((ClusterId) = << 8) | (CoreId)) -#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (0x30000 | ((ClusterId) = << 8) | (CoreId)) -#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (0x50000 | ((ClusterId= ) << 8) | (CoreId)) -#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (0x70000 | ((ClusterId= ) << 8) | (CoreId)) - -// -// Multiple APIC Description Table -// -#pragma pack (1) - -typedef struct { - EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header; - EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[64]; - EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor; - EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8]; -} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE; - -#pragma pack () =20 EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt =3D { { diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c b/Silicon/Hisilicon/Hi161= 6/Pptt/Pptt.c new file mode 100644 index 0000000..eac4736 --- /dev/null +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c @@ -0,0 +1,447 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/ +* +**/ + +#include "Pptt.h" + +EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol =3D NULL; +EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol =3D NULL; + +EFI_ACPI_DESCRIPTION_HEADER mPpttHeader =3D + ARM_ACPI_HEADER ( + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE, + EFI_ACPI_DESCRIPTION_HEADER, + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION + ); + +EFI_ACPI_6_2_PPTT_TYPE2 mPpttSocketType2[PPTT_SOCKET_COMPONENT_NO] =3D +{ + {2, sizeof(EFI_ACPI_6_2_PPTT_TYPE2), 0, 0, 0, 0, 0, 0, 0} +}; + +EFI_ACPI_6_2_PPTT_TYPE1 mPpttCacheType1[PPTT_CACHE_NO] =3D +{ + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, = //L1I 48K 0xC000 CacheAssociativity8Way + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, = //L1D 32k 0x8000 CacheAssociativity8Way + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, = //L2 1M 0x100000 CacheAssociativity8Way + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0x1000000, 0x2000, 0x10, 0= x0A, 0x80} //L3 16M 0x1000000 CacheAssociativity16Way Linesize-128byte +}; + +EFI_STATUS +InitCacheInfo( + ) +{ + UINT8 Index; + PPTT_TYPE1_ATTRIBUTES Type1Attributes; + CSSELR_DATA CsselrData; + CCSIDR_DATA CcsidrData; + + for (Index =3D 0; Index < PPTT_CACHE_NO - 1; Index++) { + CsselrData.Data =3D 0; + CcsidrData.Data =3D 0; + Type1Attributes.Data =3D 0; + + if (Index =3D=3D 0) { //L1I + CsselrData.Bits.InD =3D 1; + CsselrData.Bits.Level =3D 0; + Type1Attributes.Bits.CacheType =3D 1; + } else if (Index =3D=3D 1) { + Type1Attributes.Bits.CacheType =3D 0; + CsselrData.Bits.Level =3D Index -1; + } else { + Type1Attributes.Bits.CacheType =3D 2; + CsselrData.Bits.Level =3D Index -1; + } + + CcsidrData.Data =3D ReadCCSIDR (CsselrData.Data); + + if (CcsidrData.Bits.Wa =3D=3D 1) { + Type1Attributes.Bits.AllocateType =3D 1; + if (CcsidrData.Bits.Ra =3D=3D 1) { + Type1Attributes.Bits.AllocateType++; + } + } + + if (CcsidrData.Bits.Wt =3D=3D 1) { + Type1Attributes.Bits.WritePolicy =3D 1; + } + DEBUG ((DEBUG_INFO, "[Acpi PPTT] Level =3D %x!CcsidrData =3D %x!\n",Cs= selrData.Bits.Level, CcsidrData.Data)); + + mPpttCacheType1[Index].NumberOfSets =3D (UINT16)CcsidrData.Bits.NumSet= s + 1; + mPpttCacheType1[Index].Associativity =3D (UINT16)CcsidrData.Bits.Assoc= iativity + 1; + mPpttCacheType1[Index].LineSize =3D (UINT16)( 1 << (CcsidrData.Bits.Li= neSize + 4)); + mPpttCacheType1[Index].Size =3D mPpttCacheType1[Index].LineSize * = \ + mPpttCacheType1[Index].Associativity * \ + mPpttCacheType1[Index].NumberOfSets; + mPpttCacheType1[Index].Attributes =3D Type1Attributes.Data; + mPpttCacheType1[Index].Flags =3D PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NU= MBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \ + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT= _TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \ + PPTT_TYPE1_LINE_SIZE_VALID; + + } + + // L3 + mPpttCacheType1[3].Flags =3D PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_O= F_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \ + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1= _CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \ + PPTT_TYPE1_LINE_SIZE_VALID; + + return EFI_SUCCESS; +} + +EFI_STATUS +AddCoreTable( + IN VOID *PpttTable, + IN OUT VOID *PpttTableLengthRemain, + IN UINT32 Flags, + IN UINT32 Parent, + IN UINT32 ResourceNo, + IN UINT32 ProcessorId + ) +{ + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0; + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1; + UINT32 *PrivateResource; + UINT8 Index; + + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) += ResourceNo * 4) { + return EFI_OUT_OF_RESOURCES; + } + PpttType0 =3D (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIP= TION_HEADER *)PpttTable)->Length); + PpttType0->Type =3D 0; + PpttType0->Flags =3D Flags; + PpttType0->Parent=3D Parent; + PpttType0->AcpiProcessorId =3D ProcessorId; + PpttType0->PrivateResourceNo =3D ResourceNo; + PpttType0->Length =3D sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4; + + *(UINT32 *)PpttTableLengthRemain -=3D (UINTN)PpttType0->Length; + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length +=3D PpttType0->Lengt= h; + PrivateResource =3D (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_= PPTT_TYPE0)); + + // Add cache type structure + for (Index =3D 0; Index < ResourceNo; Index++, PrivateResource++) { + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)= ) { + return EFI_OUT_OF_RESOURCES; + } + *PrivateResource =3D ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Lengt= h; + PpttType1 =3D (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCR= IPTION_HEADER *)PpttTable)->Length); + gBS->CopyMem (PpttType1, &mPpttCacheType1[Index], sizeof(EFI_ACPI_6_2_= PPTT_TYPE1)); + *(UINT32 *)PpttTableLengthRemain -=3D PpttType1->Length; + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length +=3D PpttType1->Len= gth; + } + + return EFI_SUCCESS; +} + +EFI_STATUS +AddClusterTable ( + IN VOID *PpttTable, + IN OUT VOID *PpttTableLengthRemain, + IN UINT32 Flags, + IN UINT32 Parent, + IN UINT32 ResourceNo + ) +{ + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0; + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1; + UINT32 *PrivateResource; + + if ((*(UINT32 *)PpttTableLengthRemain) < (sizeof(EFI_ACPI_6_2_PPTT_TYPE0= ) + ResourceNo * 4)) { + return EFI_OUT_OF_RESOURCES; + } + PpttType0 =3D (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIP= TION_HEADER *)PpttTable)->Length); + PpttType0->Type =3D 0; + PpttType0->Flags =3D Flags; + PpttType0->Parent=3D Parent; + PpttType0->PrivateResourceNo =3D ResourceNo; + PpttType0->Length =3D sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4; + + *(UINT32 *)PpttTableLengthRemain -=3D PpttType0->Length; + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length +=3D PpttType0->Lengt= h; + PrivateResource =3D (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_= PPTT_TYPE0)); + + // Add cache type structure + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) { + return EFI_OUT_OF_RESOURCES; + } + *PrivateResource =3D ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length; + PpttType1 =3D (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIP= TION_HEADER *)PpttTable)->Length); + gBS->CopyMem (PpttType1, &mPpttCacheType1[2], sizeof(EFI_ACPI_6_2_PPTT_T= YPE1)); + *(UINT32 *)PpttTableLengthRemain -=3D PpttType1->Length; + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length +=3D PpttType1->Lengt= h; + + return EFI_SUCCESS; +} + +EFI_STATUS +AddScclTable( + IN VOID *PpttTable, + IN OUT VOID *PpttTableLengthRemain, + IN UINT32 Flags, + IN UINT32 Parent, + IN UINT32 ResourceNo + ) +{ + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0; + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1; + UINT32 *PrivateResource; + + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) += ResourceNo * 4) { + return EFI_OUT_OF_RESOURCES; + } + PpttType0 =3D (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIP= TION_HEADER *)PpttTable)->Length); + PpttType0->Type =3D 0; + PpttType0->Flags =3D Flags; + PpttType0->Parent=3D Parent; + PpttType0->PrivateResourceNo =3D ResourceNo; + PpttType0->Length =3D sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4; + + *(UINT32 *)PpttTableLengthRemain -=3D PpttType0->Length; + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length +=3D PpttType0->Lengt= h; + PrivateResource =3D (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_= PPTT_TYPE0)); + + // Add cache type structure + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) { + return EFI_OUT_OF_RESOURCES; + } + *PrivateResource =3D ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length; + PpttType1 =3D (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIP= TION_HEADER *)PpttTable)->Length); + gBS->CopyMem (PpttType1, &mPpttCacheType1[3], sizeof(EFI_ACPI_6_2_PPTT_T= YPE1)); + *(UINT32 *)PpttTableLengthRemain -=3D PpttType1->Length; + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length +=3D PpttType1->Lengt= h; + + return EFI_SUCCESS; +} + +EFI_STATUS +AddSocketTable( + IN VOID *PpttTable, + IN OUT VOID *PpttTableLengthRemain, + IN UINT32 Flags, + IN UINT32 Parent, + IN UINT32 ResourceNo + ) +{ + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0; + EFI_ACPI_6_2_PPTT_TYPE2 *PpttType2; + UINT32 *PrivateResource; + UINT8 Index; + + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0)) { + return EFI_OUT_OF_RESOURCES; + } + PpttType0 =3D (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIP= TION_HEADER *)PpttTable)->Length); + PpttType0->Type =3D 0; + PpttType0->Flags =3D Flags; + PpttType0->Parent=3D Parent; + PpttType0->PrivateResourceNo =3D ResourceNo; + PpttType0->Length =3D sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4; + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length +=3D PpttType0->Lengt= h; + + *(UINT32 *)PpttTableLengthRemain -=3D PpttType0->Length; + if (*(UINT32 *)PpttTableLengthRemain < ResourceNo * 4) { + return EFI_OUT_OF_RESOURCES; + } + PrivateResource =3D (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_= PPTT_TYPE0)); + DEBUG ((DEBUG_INFO, "[Acpi PPTT] sizeof(EFI_ACPI_6_2_PPTT_TYPE2) =3D %x= !\n", sizeof(EFI_ACPI_6_2_PPTT_TYPE2))); + + for (Index =3D 0; Index < ResourceNo; Index++, PrivateResource++) { + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE2)= ) { + return EFI_OUT_OF_RESOURCES; + } + *PrivateResource =3D ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Lengt= h; + PpttType2 =3D (EFI_ACPI_6_2_PPTT_TYPE2 *)(PpttTable + ((EFI_ACPI_DESCR= IPTION_HEADER *)PpttTable)->Length); + gBS->CopyMem (PpttType2, &mPpttSocketType2[Index], sizeof(EFI_ACPI_6_2= _PPTT_TYPE2)); + *(UINT32 *)PpttTableLengthRemain -=3D PpttType2->Length; + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length +=3D PpttType2->Len= gth; + } + + return EFI_SUCCESS; +} + +VOID +GetApic( +EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable, +VOID *PpttTable, +IN UINT32 PpttTableLengthRemain, +IN UINT32 Index1 +) +{ + UINT32 IndexSocket, IndexSccl, IndexCulster, IndexCore; + UINT32 SocketOffset, ScclOffset, ClusterOffset; + UINT32 Parent =3D 0; + UINT32 Flags =3D 0; + UINT32 ResourceNo =3D 0; + //Get APIC data + for (IndexSocket =3D 0; IndexSocket < PPTT_SOCKET_NO; IndexSocket++) { + SocketOffset =3D 0; + for (IndexSccl =3D 0; IndexSccl < PPTT_DIE_NO; IndexSccl++) { + ScclOffset =3D 0; + for (IndexCulster =3D 0; IndexCulster < PPTT_CULSTER_NO; IndexCulste= r++) { + ClusterOffset =3D 0; + for (IndexCore =3D 0; IndexCore < PPTT_CORE_NO; IndexCore++) { + + DEBUG ((DEBUG_INFO, "[Acpi PPTT] IndexSocket:%x, IndexSccl:%x, I= ndexCulster:%x, IndexCore:%x!\n",IndexSocket,IndexSccl ,IndexCulster,IndexC= ore)); + + if (ApicTable->GicInterfaces[Index1].AcpiProcessorUid !=3D Index= 1) { + //This processor is unusable + DEBUG ((DEBUG_ERROR, "[Acpi PPTT] Please check MADT table for = UID!\n")); + return; + } + if ((ApicTable->GicInterfaces[Index1].Flags & BIT0) =3D=3D 0 ) { + //This processor is unusable + Index1++; + continue; + } + + if (SocketOffset =3D=3D 0) { + //Add socket0 for type0 table + ResourceNo =3D PPTT_SOCKET_COMPONENT_NO; + SocketOffset =3D ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->L= ength; + Parent =3D 0; + Flags =3D PPTT_TYPE0_SOCKET_FLAG; + AddSocketTable (PpttTable, &PpttTableLengthRemain, Flags, Pare= nt, ResourceNo); + } + if (ScclOffset =3D=3D 0) { + //Add socket0die0 for type0 table + ResourceNo =3D 1; + ScclOffset =3D ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Le= ngth ; + Parent =3D SocketOffset; + Flags =3D PPTT_TYPE0_DIE_FLAG; + AddScclTable (PpttTable, &PpttTableLengthRemain, Flags, Parent= , ResourceNo); + } + if (ClusterOffset =3D=3D 0) { + //Add socket0die0ClusterId for type0 table + ResourceNo =3D 1; + ClusterOffset =3D ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)-= >Length ; + Parent =3D ScclOffset; + Flags =3D PPTT_TYPE0_CLUSTER_FLAG; + AddClusterTable (PpttTable, &PpttTableLengthRemain, Flags, Par= ent, ResourceNo); + } + + //Add socket0die0ClusterIdCoreId for type0 table + ResourceNo =3D 2; + Parent =3D ClusterOffset; + Flags =3D PPTT_TYPE0_CORE_FLAG; + AddCoreTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, = ResourceNo, Index1); + + Index1++; + } + } + } + } + return ; +} + +VOID +PpttSetAcpiTable( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + UINTN AcpiTableHandle; + EFI_STATUS Status; + UINT8 Checksum; + EFI_ACPI_SDT_HEADER *Table; + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable; + EFI_ACPI_TABLE_VERSION TableVersion; + VOID *PpttTable; + UINTN TableKey; + UINT32 Index0, Index1; + UINT32 PpttTableLengthRemain =3D = 0; + + gBS->CloseEvent (Event); + + InitCacheInfo (); + + PpttTable =3D AllocateZeroPool (PPTT_TABLE_MAX_LEN); + gBS->CopyMem (PpttTable, &mPpttHeader, sizeof(EFI_ACPI_DESCRIPTION_HEADE= R)); + PpttTableLengthRemain =3D PPTT_TABLE_MAX_LEN - sizeof(EFI_ACPI_DESCRIPTI= ON_HEADER); + + for (Index0 =3D 0; Index0 < EFI_ACPI_MAX_NUM_TABLES; Index0++) { + Status =3D mAcpiSdtProtocol->GetAcpiTable (Index0, &Table, &TableVersi= on, &TableKey); + if (EFI_ERROR (Status)) { + break; + } + //Find APIC table + if (Table->Signature !=3D EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE= _SIGNATURE) { + continue; + } + + ApicTable =3D (EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *)Table; + Index1 =3D 0; + + GetApic (ApicTable, PpttTable, PpttTableLengthRemain, Index1); + break; + } + + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR,"%a:%d Status=3D%r\n",__FILE__,__LINE__,Status)); + } + + Checksum =3D CalculateCheckSum8 ((UINT8 *)(PpttTable), ((EFI_ACPI_DESCRI= PTION_HEADER *)PpttTable)->Length); + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Checksum=3D Checksum; + + AcpiTableHandle =3D 0; + Status =3D mAcpiTableProtocol->InstallAcpiTable (mAcpiTableProtocol, Ppt= tTable, ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length, &AcpiTableHandl= e); + + FreePool (PpttTable); + return ; +} + +EFI_STATUS +InitPpttTable( + ) +{ + EFI_STATUS Status; + EFI_EVENT ReadyToBootEvent; + + Status =3D EfiCreateEventReadyToBootEx ( + TPL_NOTIFY, + PpttSetAcpiTable, + NULL, + &ReadyToBootEvent + ); + ASSERT_EFI_ERROR (Status); + + return Status; +} + +EFI_STATUS +EFIAPI +PpttEntryPoint( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + Status =3D gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID= **)&mAcpiTableProtocol); + if (EFI_ERROR (Status)) { + return EFI_ABORTED; + } + + Status =3D gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID**)= &mAcpiSdtProtocol); + if (EFI_ERROR (Status)) { + return EFI_ABORTED; + } + + InitPpttTable (); + + DEBUG ((DEBUG_INFO, "Acpi Pptt init done.\n")); + + return EFI_SUCCESS; +} diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h b/Silicon/Hisilicon/Hi161= 6/Pptt/Pptt.h new file mode 100644 index 0000000..5dc635f --- /dev/null +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h @@ -0,0 +1,142 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/ +* +**/ + +#ifndef _PPTT_H_ +#define _PPTT_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../D05AcpiTables/Hi1616Platform.h" + +/// +/// "PPTT" Processor Properties Topology Table +/// +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE SIGNAT= URE_32('P', 'P', 'T', 'T') +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x01 +#define EFI_ACPI_MAX_NUM_TABLES 20 + +#define PPTT_TABLE_MAX_LEN 0x6000 +#define PPTT_SOCKET_NO 0x2 +#define PPTT_DIE_NO 0x2 +#define PPTT_CULSTER_NO 0x4 +#define PPTT_CORE_NO 0x4 +#define PPTT_SOCKET_COMPONENT_NO 0x1 +#define PPTT_CACHE_NO 0x4 + +#define PPTT_TYPE0_PHYSICAL_PKG BIT0 +#define PPTT_TYPE0_PROCESSORID_VALID BIT1 +#define PPTT_TYPE0_SOCKET_FLAG PPTT_TYPE0_PHYSICAL_PKG +#define PPTT_TYPE0_DIE_FLAG PPTT_TYPE0_PHYSICAL_PKG +#define PPTT_TYPE0_CLUSTER_FLAG 0 +#define PPTT_TYPE0_CORE_FLAG PPTT_TYPE0_PROCESSORID_VALID + +#define PPTT_TYPE1_SIZE_VALID BIT0 +#define PPTT_TYPE1_NUMBER_OF_SETS_VALID BIT1 +#define PPTT_TYPE1_ASSOCIATIVITY_VALID BIT2 +#define PPTT_TYPE1_ALLOCATION_TYPE_VALID BIT3 +#define PPTT_TYPE1_CACHE_TYPE_VALID BIT4 +#define PPTT_TYPE1_WRITE_POLICY_VALID BIT5 +#define PPTT_TYPE1_LINE_SIZE_VALID BIT6 + +typedef union { + struct { + UINT32 InD :1; + UINT32 Level :3; + UINT32 Reserved :28; + } Bits; + UINT32 Data; +}CSSELR_DATA; + +typedef union { + struct { + UINT32 LineSize :3; + UINT32 Associativity :10; + UINT32 NumSets :15; + UINT32 Wa :1; + UINT32 Ra :1; + UINT32 Wb :1; + UINT32 Wt :1; + } Bits; + UINT32 Data; +}CCSIDR_DATA; + +// +// Processor Hierarchy Node Structure +// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Reserved; + UINT32 Flags; + UINT32 Parent; + UINT32 AcpiProcessorId; + UINT32 PrivateResourceNo; +} EFI_ACPI_6_2_PPTT_TYPE0; + +// +// Cache Configuration +// +typedef union { + struct { + UINT8 AllocateType :2; + UINT8 CacheType :2; + UINT8 WritePolicy :1; + UINT8 Reserved :3; + } Bits; + UINT8 Data; +}PPTT_TYPE1_ATTRIBUTES; + +// +// Cache Type Structure +// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Reserved; + UINT32 Flags; + UINT32 NextLevelOfCache; + UINT32 Size; + UINT32 NumberOfSets; + UINT8 Associativity; + UINT8 Attributes; + UINT16 LineSize; +} EFI_ACPI_6_2_PPTT_TYPE1; + +// +// ID Structure +// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Reserved; + UINT32 VendorId; + UINT64 Level1Id; + UINT64 Level2Id; + UINT16 MajorRev; + UINT16 MinorRev; + UINT16 SpinRev; +} EFI_ACPI_6_2_PPTT_TYPE2; + +#endif // _PPTT_H_ + diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf b/Silicon/Hisilicon/Hi1= 616/Pptt/Pptt.inf new file mode 100644 index 0000000..ce26b97 --- /dev/null +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf @@ -0,0 +1,55 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/ +* +**/ + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D AcpiPptt + FILE_GUID =3D AAB14F90-DC2E-4f33-A594-C7894A5B412D + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D PpttEntryPoint + +[Sources.common] + Pptt.c + Pptt.h + +[Packages] + MdePkg/MdePkg.dec + edk2-platforms/Silicon/Hisilicon/HisiPkg.dec + ArmPkg/ArmPkg.dec + +[LibraryClasses] + ArmLib + HobLib + UefiRuntimeServicesTableLib + UefiDriverEntryPoint + BaseMemoryLib + DebugLib + +[Guids] + + +[Protocols] + gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED + gEfiAcpiSdtProtocolGuid + +[Pcd] + + +[Depex] + gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid + --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri May 3 09:52:25 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1516287725396899.2946025745877; Thu, 18 Jan 2018 07:02:05 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id F17832232BDEE; Thu, 18 Jan 2018 06:56:40 -0800 (PST) Received: from mail-pg0-x243.google.com (mail-pg0-x243.google.com [IPv6:2607:f8b0:400e:c05::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3F860222DDC1F for ; Thu, 18 Jan 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bh=P41G4knvBqPCgLjdm/CCAnvU5Kgd9or7OpFCWpHa4Wo=; b=OaPo0qb9V8k9uk5VC+vGSXsmOuyQtbH09cqeEGzpt76ln4TN6/rSP6m9dCbP3VFWGU OievsB+NQNFZjVF4MVzMQdcE5ZYD5QOxzKxG0gfm4trm3FONQ2q3WjnaQry52PRdlWkV nCDYIgw0Kl3/lJaXxWveuIUPWpCBiSxg2G2f4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=P41G4knvBqPCgLjdm/CCAnvU5Kgd9or7OpFCWpHa4Wo=; b=O0nB6yxGSioU5PJ4ltZRr14tXFIHKF7K3fBQj600cUOKmkIgE+K/Sgpi1j1dHfRMIH Aw1lP3XjpymZWkSCSY3AoCDX53hhvL0rOvdajBjgyZZ9wtkqjyUAN3fzcZ07fyQL12KB 6JT1lt+tr6yvW2fZ2wux6ALu63v8CbZwsGYU1NHmdf6bY+dPfFX74m9VXkdw+YlLbnjw ylKbGbbfSN3sXlw6sBOx+Aq8gQbwwbG4WMvIREAObQLcxSsXDOhjma980sHd8zBWssaP 9nu1bLubsdtiTQo5x5rjoNSDftUwSWyC7ushUcJTDEkxpwPap6Hc625OxJhA6GO87s1H scJg== X-Gm-Message-State: AKGB3mIPD0K9Q3mUulgLo7uEy6H/tkraDZwSPeUelsQqERo244Ketz4J mbBBeMgb8V9oxRy/oh9jhkEUKiRZspk= X-Google-Smtp-Source: ACJfBot7a6g1824HxW/olLCOR0P1tqx41gDu3tCJOnbYxGfB20kjsIfxRdFBOH7Sv0pYrSe1oqtWOQ== X-Received: by 10.98.224.3 with SMTP id f3mr34047669pfh.205.1516287719548; Thu, 18 Jan 2018 07:01:59 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 18 Jan 2018 23:01:31 +0800 Message-Id: <1516287703-35516-3-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516287703-35516-1-git-send-email-huangming23@huawei.com> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> MIME-Version: 1.0 Subject: [edk2] =?utf-8?q?=5BPATCH_edk2-platforms_v1_02/14=5D_Hisilicon_D0?= =?utf-8?q?3/D05=EF=BC=9ASwitch_to_Generic_BDS_driver?= X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo Signed-off-by: Jason Zhang --- Platform/Hisilicon/D03/D03.dsc = | 24 + Platform/Hisilicon/D03/D03.fdf = | 7 + Platform/Hisilicon/D05/D05.dsc = | 27 +- Platform/Hisilicon/D05/D05.fdf = | 7 + Silicon/Hisilicon/Hisilicon.dsc.inc = | 1 + Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c = | 588 +++++++++++++++++ Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h = | 59 ++ Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.in= f | 89 +++ Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c = | 681 ++++++++++++++++++++ 9 files changed, 1481 insertions(+), 2 deletions(-) diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index b434f68..f7efff5 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -28,6 +28,7 @@ BUILD_TARGETS =3D DEBUG|RELEASE SKUID_IDENTIFIER =3D DEFAULT FLASH_DEFINITION =3D Platform/Hisilicon/$(PLATFORM_NAME)/$= (PLATFORM_NAME).fdf + DEFINE GENERIC_BDS =3D TRUE =20 !include Silicon/Hisilicon/Hisilicon.dsc.inc =20 @@ -68,6 +69,14 @@ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLi= b.inf PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformInt= elBdsLib.inf +!if $(GENERIC_BDS) =3D=3D TRUE + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManag= erLib.inf + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeRepor= tStatusCodeLib.inf + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf + PlatformBootManagerLib|Silicon/Hisilicon/Library/PlatformBootManagerLib/= PlatformBootManagerLib.inf + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf +!endif CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/Customize= dDisplayLib.inf =20 # USB Requirements @@ -188,6 +197,9 @@ =20 gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FAL= SE gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x0= 4, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, = 0xD1 } +!if $(GENERIC_BDS) =3D=3D TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c= , 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0= x31 }|VOID*|0x0001006b +!endif =20 gHisiTokenSpaceGuid.PcdSysControlBaseAddress|0x40010000 gHisiTokenSpaceGuid.PcdMailBoxAddress|0x0000FFF8 @@ -405,6 +417,14 @@ MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf =20 +!if $(GENERIC_BDS) =3D=3D TRUE + MdeModulePkg/Application/UiApp/UiApp.inf { + + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanc= eManagerUiLib.inf + } +!endif MdeModulePkg/Application/HelloWorld/HelloWorld.inf # # Bds @@ -457,7 +477,11 @@ =20 MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf +!if $(GENERIC_BDS) =3D=3D TRUE + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf +!else IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf +!endif =20 # # UEFI application (Shell Embedded Boot Loader) diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf index 0b38eb4..0d704b5 100644 --- a/Platform/Hisilicon/D03/D03.fdf +++ b/Platform/Hisilicon/D03/D03.fdf @@ -283,6 +283,9 @@ READ_LOCK_STATUS =3D TRUE INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf !endif #$(INCLUDE_TFTP_COMMAND) =20 +!if $(GENERIC_BDS) =3D=3D TRUE + INF MdeModulePkg/Application/UiApp/UiApp.inf +!endif # # Bds # @@ -291,7 +294,11 @@ READ_LOCK_STATUS =3D TRUE INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDx= e.inf INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf +!if $(GENERIC_BDS) =3D=3D TRUE + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf +!else INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf +!endif =20 [FV.FVMAIN_COMPACT] FvAlignment =3D 16 diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 710339c..57370dc 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -31,7 +31,7 @@ DEFINE EDK2_SKIP_PEICORE=3D0 DEFINE NETWORK_IP6_ENABLE =3D FALSE DEFINE HTTP_BOOT_ENABLE =3D FALSE - + DEFINE GENERIC_BDS =3D TRUE !include Silicon/Hisilicon/Hisilicon.dsc.inc =20 [LibraryClasses.common] @@ -84,6 +84,14 @@ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLi= b.inf PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformInt= elBdsLib.inf +!if $(GENERIC_BDS) =3D=3D TRUE + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManag= erLib.inf + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeRepor= tStatusCodeLib.inf + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf + PlatformBootManagerLib|Silicon/Hisilicon/Library/PlatformBootManagerLib/= PlatformBootManagerLib.inf + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf +!endif CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/Customize= dDisplayLib.inf =20 # USB Requirements @@ -119,6 +127,7 @@ # It could be set FALSE to save size. gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE =20 [PcdsFixedAtBuild.common] gArmPlatformTokenSpaceGuid.PcdCoreCount|8 @@ -203,7 +212,9 @@ =20 gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FAL= SE gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x0= 4, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, = 0xD1 } - +!if $(GENERIC_BDS) =3D=3D TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c= , 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0= x31 }|VOID*|0x0001006b +!endif gHisiTokenSpaceGuid.PcdSysControlBaseAddress|0x40010000 gHisiTokenSpaceGuid.PcdMailBoxAddress|0x0000FFF8 =20 @@ -560,6 +571,14 @@ MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf =20 +!if $(GENERIC_BDS) =3D=3D TRUE + MdeModulePkg/Application/UiApp/UiApp.inf { + + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanc= eManagerUiLib.inf + } +!endif # # Bds # @@ -610,7 +629,11 @@ MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf +!if $(GENERIC_BDS) =3D=3D TRUE + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf +!else IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf +!endif # # UEFI application (Shell Embedded Boot Loader) # diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index 97de4d2..d209210 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -305,6 +305,9 @@ READ_LOCK_STATUS =3D TRUE INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf !endif #$(INCLUDE_TFTP_COMMAND) =20 +!if $(GENERIC_BDS) =3D=3D TRUE + INF MdeModulePkg/Application/UiApp/UiApp.inf +!endif # # Bds # @@ -313,7 +316,11 @@ READ_LOCK_STATUS =3D TRUE INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDx= e.inf INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf +!if $(GENERIC_BDS) =3D=3D TRUE + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf +!else INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf +!endif =20 [FV.FVMAIN_COMPACT] FvAlignment =3D 16 diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisili= con.dsc.inc index cc23673..308064b 100644 --- a/Silicon/Hisilicon/Hisilicon.dsc.inc +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc @@ -263,6 +263,7 @@ gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1 gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0 gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320 + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 =20 # DEBUG_ASSERT_ENABLED 0x01 # DEBUG_PRINT_ENABLED 0x02 diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c = b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c new file mode 100644 index 0000000..5d8d58e --- /dev/null +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c @@ -0,0 +1,588 @@ +/** @file + Implementation for PlatformBootManagerLib library class interfaces. + + Copyright (c) 2018, ARM Ltd. All rights reserved.
+ Copyright (c) 2018, Hisilicon Limited. All rights reserved. + Copyright (c) 2018, Linaro Ltd. All rights reserved.
+ + This program and the accompanying materials are licensed and made availa= ble + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WI= THOUT + WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "PlatformBm.h" + +#define DP_NODE_LEN(Type) { (UINT8)sizeof (Type), (UINT8)(sizeof (Type) >>= 8) } + + +#pragma pack (1) +typedef struct { + VENDOR_DEVICE_PATH SerialDxe; + UART_DEVICE_PATH Uart; + VENDOR_DEFINED_DEVICE_PATH TermType; + EFI_DEVICE_PATH_PROTOCOL End; +} PLATFORM_SERIAL_CONSOLE; +#pragma pack () + +#define SERIAL_DXE_FILE_GUID { \ + 0xD3987D4B, 0x971A, 0x435F, \ + { 0x8C, 0xAF, 0x49, 0x67, 0xEB, 0x62, 0x72, 0x41 } \ + } + +EFI_GUID EblAppGuid2 =3D {0x3CEF354A,0x3B7A,0x4519,{0xAD,0x70,0x72,0xA1,= 0x34,0x69,0x83,0x11}}; + +STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole =3D { + // + // VENDOR_DEVICE_PATH SerialDxe + // + { + { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, DP_NODE_LEN (VENDOR_DEVICE_PATH)= }, + SERIAL_DXE_FILE_GUID + }, + + // + // UART_DEVICE_PATH Uart + // + { + { MESSAGING_DEVICE_PATH, MSG_UART_DP, DP_NODE_LEN (UART_DEVICE_PATH) }, + 0, // Reserved + FixedPcdGet64 (PcdUartDefaultBaudRate), // BaudRate + FixedPcdGet8 (PcdUartDefaultDataBits), // DataBits + FixedPcdGet8 (PcdUartDefaultParity), // Parity + FixedPcdGet8 (PcdUartDefaultStopBits) // StopBits + }, + + // + // VENDOR_DEFINED_DEVICE_PATH TermType + // + { + { + MESSAGING_DEVICE_PATH, MSG_VENDOR_DP, + DP_NODE_LEN (VENDOR_DEFINED_DEVICE_PATH) + } + // + // Guid to be filled in dynamically + // + }, + + // + // EFI_DEVICE_PATH_PROTOCOL End + // + { + END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, + DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL) + } +}; + + +#pragma pack (1) +typedef struct { + USB_CLASS_DEVICE_PATH Keyboard; + EFI_DEVICE_PATH_PROTOCOL End; +} PLATFORM_USB_KEYBOARD; +#pragma pack () + +STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard =3D { + // + // USB_CLASS_DEVICE_PATH Keyboard + // + { + { + MESSAGING_DEVICE_PATH, MSG_USB_CLASS_DP, + DP_NODE_LEN (USB_CLASS_DEVICE_PATH) + }, + 0xFFFF, // VendorId: any + 0xFFFF, // ProductId: any + 3, // DeviceClass: HID + 1, // DeviceSubClass: boot + 1 // DeviceProtocol: keyboard + }, + + // + // EFI_DEVICE_PATH_PROTOCOL End + // + { + END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, + DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL) + } +}; + + +/** + Check if the handle satisfies a particular condition. + + @param[in] Handle The handle to check. + @param[in] ReportText A caller-allocated string passed in for reporting + purposes. It must never be NULL. + + @retval TRUE The condition is satisfied. + @retval FALSE Otherwise. This includes the case when the condition coul= d not + be fully evaluated due to an error. +**/ +typedef +BOOLEAN +(EFIAPI *FILTER_FUNCTION) ( + IN EFI_HANDLE Handle, + IN CONST CHAR16 *ReportText + ); + + +/** + Process a handle. + + @param[in] Handle The handle to process. + @param[in] ReportText A caller-allocated string passed in for reporting + purposes. It must never be NULL. +**/ +typedef +VOID +(EFIAPI *CALLBACK_FUNCTION) ( + IN EFI_HANDLE Handle, + IN CONST CHAR16 *ReportText + ); + +/** + Locate all handles that carry the specified protocol, filter them with a + callback function, and pass each handle that passes the filter to another + callback. + + @param[in] ProtocolGuid The protocol to look for. + + @param[in] Filter The filter function to pass each handle to. If = this + parameter is NULL, then all handles are process= ed. + + @param[in] Process The callback function to pass each handle to th= at + clears the filter. +**/ +STATIC +VOID +FilterAndProcess ( + IN EFI_GUID *ProtocolGuid, + IN FILTER_FUNCTION Filter OPTIONAL, + IN CALLBACK_FUNCTION Process + ) +{ + EFI_STATUS Status; + EFI_HANDLE *Handles; + UINTN NoHandles; + UINTN Idx; + + Status =3D gBS->LocateHandleBuffer (ByProtocol, ProtocolGuid, + NULL /* SearchKey */, &NoHandles, &Handles); + if (EFI_ERROR (Status)) { + // + // This is not an error, just an informative condition. + // + DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid, + Status)); + return; + } + + ASSERT (NoHandles > 0); + for (Idx =3D 0; Idx < NoHandles; ++Idx) { + CHAR16 *DevicePathText; + STATIC CHAR16 Fallback[] =3D L""; + + // + // The ConvertDevicePathToText() function handles NULL input transpare= ntly. + // + DevicePathText =3D ConvertDevicePathToText ( + DevicePathFromHandle (Handles[Idx]), + FALSE, // DisplayOnly + FALSE // AllowShortcuts + ); + if (DevicePathText =3D=3D NULL) { + DevicePathText =3D Fallback; + } + + if (Filter =3D=3D NULL || Filter (Handles[Idx], DevicePathText)) { + Process (Handles[Idx], DevicePathText); + } + + if (DevicePathText !=3D Fallback) { + FreePool (DevicePathText); + } + } + gBS->FreePool (Handles); +} + + +/** + This FILTER_FUNCTION checks if a handle corresponds to a PCI display dev= ice. +**/ +STATIC +BOOLEAN +EFIAPI +IsPciDisplay ( + IN EFI_HANDLE Handle, + IN CONST CHAR16 *ReportText + ) +{ + EFI_STATUS Status; + EFI_PCI_IO_PROTOCOL *PciIo; + PCI_TYPE00 Pci; + + Status =3D gBS->HandleProtocol (Handle, &gEfiPciIoProtocolGuid, + (VOID**)&PciIo); + if (EFI_ERROR (Status)) { + // + // This is not an error worth reporting. + // + return FALSE; + } + + Status =3D PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, 0 /* Offset */, + sizeof Pci / sizeof (UINT32), &Pci); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: %s: %r\n", __FUNCTION__, ReportText, Status)= ); + return FALSE; + } + + return IS_PCI_DISPLAY (&Pci); +} + + +/** + This CALLBACK_FUNCTION attempts to connect a handle non-recursively, ask= ing + the matching driver to produce all first-level child handles. +**/ +STATIC +VOID +EFIAPI +Connect ( + IN EFI_HANDLE Handle, + IN CONST CHAR16 *ReportText + ) +{ + EFI_STATUS Status; + + Status =3D gBS->ConnectController ( + Handle, // ControllerHandle + NULL, // DriverImageHandle + NULL, // RemainingDevicePath -- produce all children + FALSE // Recursive + ); + DEBUG ((EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE, "%a: %s: %r\n", + __FUNCTION__, ReportText, Status)); +} + + +/** + This CALLBACK_FUNCTION retrieves the EFI_DEVICE_PATH_PROTOCOL from the + handle, and adds it to ConOut and ErrOut. +**/ +STATIC +VOID +EFIAPI +AddOutput ( + IN EFI_HANDLE Handle, + IN CONST CHAR16 *ReportText + ) +{ + EFI_STATUS Status; + EFI_DEVICE_PATH_PROTOCOL *DevicePath; + + DevicePath =3D DevicePathFromHandle (Handle); + if (DevicePath =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "%a: %s: handle %p: device path not found\n", + __FUNCTION__, ReportText, Handle)); + return; + } + + Status =3D EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL= ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: %s: adding to ConOut: %r\n", __FUNCTION__, + ReportText, Status)); + return; + } + + Status =3D EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL= ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: %s: adding to ErrOut: %r\n", __FUNCTION__, + ReportText, Status)); + return; + } + + DEBUG ((DEBUG_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __FUNCTIO= N__, + ReportText)); +} + +STATIC +VOID +PlatformRegisterFvBootOption ( + EFI_GUID *FileGuid, + CHAR16 *Description, + UINT32 Attributes + ) +{ + EFI_STATUS Status; + INTN OptionIndex; + EFI_BOOT_MANAGER_LOAD_OPTION NewOption; + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions; + UINTN BootOptionCount; + MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode; + EFI_LOADED_IMAGE_PROTOCOL *LoadedImage; + EFI_DEVICE_PATH_PROTOCOL *DevicePath; + + Status =3D gBS->HandleProtocol ( + gImageHandle, + &gEfiLoadedImageProtocolGuid, + (VOID **) &LoadedImage + ); + ASSERT_EFI_ERROR (Status); + + EfiInitializeFwVolDevicepathNode (&FileNode, FileGuid); + DevicePath =3D DevicePathFromHandle (LoadedImage->DeviceHandle); + ASSERT (DevicePath !=3D NULL); + DevicePath =3D AppendDevicePathNode ( + DevicePath, + (EFI_DEVICE_PATH_PROTOCOL *) &FileNode + ); + ASSERT (DevicePath !=3D NULL); + + Status =3D EfiBootManagerInitializeLoadOption ( + &NewOption, + LoadOptionNumberUnassigned, + LoadOptionTypeBoot, + Attributes, + Description, + DevicePath, + NULL, + 0 + ); + ASSERT_EFI_ERROR (Status); + FreePool (DevicePath); + + BootOptions =3D EfiBootManagerGetLoadOptions ( + &BootOptionCount, LoadOptionTypeBoot + ); + + OptionIndex =3D EfiBootManagerFindLoadOption ( + &NewOption, BootOptions, BootOptionCount + ); + + if (OptionIndex =3D=3D -1) { + Status =3D EfiBootManagerAddLoadOptionVariable (&NewOption, MAX_UINTN); + ASSERT_EFI_ERROR (Status); + } + EfiBootManagerFreeLoadOption (&NewOption); + EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount); +} + + +STATIC +VOID +PlatformRegisterOptionsAndKeys ( + VOID + ) +{ + EFI_STATUS Status; + EFI_INPUT_KEY Enter; + EFI_INPUT_KEY F2; + EFI_INPUT_KEY Esc; + EFI_BOOT_MANAGER_LOAD_OPTION BootOption; + + // + // Register ENTER as CONTINUE key + // + Enter.ScanCode =3D SCAN_NULL; + Enter.UnicodeChar =3D CHAR_CARRIAGE_RETURN; + Status =3D EfiBootManagerRegisterContinueKeyOption (0, &Enter, NULL); + ASSERT_EFI_ERROR (Status); + + // + // Map F2 and ESC to Boot Manager Menu + // + F2.ScanCode =3D SCAN_F2; + F2.UnicodeChar =3D CHAR_NULL; + Esc.ScanCode =3D SCAN_ESC; + Esc.UnicodeChar =3D CHAR_NULL; + + Status =3D EfiBootManagerGetBootManagerMenu (&BootOption); + ASSERT_EFI_ERROR (Status); + Status =3D EfiBootManagerAddKeyOptionVariable ( + NULL, (UINT16) BootOption.OptionNumber, 0, &F2, NULL + ); + ASSERT (Status =3D=3D EFI_SUCCESS || Status =3D=3D EFI_ALREADY_STARTED); + Status =3D EfiBootManagerAddKeyOptionVariable ( + NULL, (UINT16) BootOption.OptionNumber, 0, &Esc, NULL + ); + ASSERT (Status =3D=3D EFI_SUCCESS || Status =3D=3D EFI_ALREADY_STARTED); +} + +VOID +UpdateMemory ( + ) +{ + EFI_STATUS Status; + EFI_GENERIC_MEMORY_TEST_PROTOCOL* MemoryTest; + BOOLEAN RequireSoftECCInit =3D FALSE; + + //Add MemoryTest for memmap add above 4G memory. + Status =3D gBS->LocateProtocol (&gEfiGenericMemTestProtocolGuid, NULL, (= VOID**)&MemoryTest); + if (!EFI_ERROR (Status)) { + (VOID)MemoryTest->MemoryTestInit (MemoryTest, IGNORE, &RequireSoftECCI= nit); + } else { + DEBUG ((DEBUG_ERROR, "LocateProtocol for GenericMemTestProtocol fail(%= r)\n", Status)); + } + + return; +} + +// +// BDS Platform Functions +// +/** + Do the platform init, can be customized by OEM/IBV + Possible things that can be done in PlatformBootManagerBeforeConsole: + > Update console variable: 1. include hot-plug devices; + > 2. Clear ConIn and add SOL for AMT + > Register new Driver#### or Boot#### + > Register new Key####: e.g.: F12 + > Signal ReadyToLock event + > Authentication action: 1. connect Auth devices; + > 2. Identify auto logon user. +**/ +VOID +EFIAPI +PlatformBootManagerBeforeConsole ( + VOID + ) +{ + // + // Signal EndOfDxe PI Event + // + EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid); + + UpdateMemory (); + + // + // Locate the PCI root bridges and make the PCI bus driver connect each, + // non-recursively. This will produce a number of child handles with Pci= Io on + // them. + // + FilterAndProcess (&gEfiPciRootBridgeIoProtocolGuid, NULL, Connect); + + // + // Find all display class PCI devices (using the handles from the previo= us + // step), and connect them non-recursively. This should produce a number= of + // child handles with GOPs on them. + // + FilterAndProcess (&gEfiPciIoProtocolGuid, IsPciDisplay, Connect); + + // + // Now add the device path of all handles with GOP on them to ConOut and + // ErrOut. + // + FilterAndProcess (&gEfiGraphicsOutputProtocolGuid, NULL, AddOutput); + + // + // Add the hardcoded short-form USB keyboard device path to ConIn. + // + EfiBootManagerUpdateConsoleVariable (ConIn, + (EFI_DEVICE_PATH_PROTOCOL *)&mUsbKeyboard, NULL); + + // + // Add the hardcoded serial console device path to ConIn, ConOut, ErrOut. + // + ASSERT (FixedPcdGet8 (PcdDefaultTerminalType) =3D=3D 4); + CopyGuid (&mSerialConsole.TermType.Guid, &gEfiTtyTermGuid); + + EfiBootManagerUpdateConsoleVariable (ConIn, + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL); + EfiBootManagerUpdateConsoleVariable (ConOut, + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL); + EfiBootManagerUpdateConsoleVariable (ErrOut, + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL); + + // + // Register platform-specific boot options and keyboard shortcuts. + // + PlatformRegisterOptionsAndKeys (); +} + +/** + Do the platform specific action after the console is ready + Possible things that can be done in PlatformBootManagerAfterConsole: + > Console post action: + > Dynamically switch output mode from 100x31 to 80x25 for certain sena= rino + > Signal console ready platform customized event + > Run diagnostics like memory testing + > Connect certain devices + > Dispatch aditional option roms + > Special boot: e.g.: USB boot, enter UI +**/ +VOID +EFIAPI +PlatformBootManagerAfterConsole ( + VOID + ) +{ + EFI_STATUS Status; + ESRT_MANAGEMENT_PROTOCOL *EsrtManagement =3D NULL; + + // + // Show the splash screen. + // + EnableQuietBoot (PcdGetPtr (PcdLogoFile)); + + // + // Connect the rest of the devices. + // + EfiBootManagerConnectAll (); + + // + // Enumerate all possible boot options. + // + EfiBootManagerRefreshAllBootOption (); + + // + //Sync Esrt Table + // + Status =3D gBS->LocateProtocol (&gEsrtManagementProtocolGuid, NULL, (VOI= D **)&EsrtManagement); + if (!EFI_ERROR (Status)) { + Status =3D EsrtManagement->SyncEsrtFmp (); + } + + // + // Register UEFI Shell + // + PlatformRegisterFvBootOption ( + PcdGetPtr (PcdShellFile), L"UEFI Shell", LOAD_OPTION_ACTIVE + ); +} + +/** + This function is called each second during the boot manager waits the + timeout. + + @param TimeoutRemain The remaining timeout. +**/ +VOID +EFIAPI +PlatformBootManagerWaitCallback ( + UINT16 TimeoutRemain + ) +{ + Print(L"\r%-2d seconds left, Press Esc or F2 to enter Setup.", TimeoutRe= main); +} diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h = b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h new file mode 100644 index 0000000..0a3c626 --- /dev/null +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h @@ -0,0 +1,59 @@ +/** @file + Head file for BDS Platform specific code + + Copyright (C) 2015-2016, Red Hat, Inc. + Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.
+ Copyright (c) 2016, Linaro Ltd. All rights reserved.
+ + This program and the accompanying materials are licensed and made availa= ble + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WI= THOUT + WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef _PLATFORM_BM_H_ +#define _PLATFORM_BM_H_ + +#include +#include +#include +#include +#include +#include +#include +#include + +/** + Use SystemTable Conout to stop video based Simple Text Out consoles from + going to the video device. Put up LogoFile on every video device that is= a + console. + + @param[in] LogoFile File name of logo to display on the center of the + screen. + + @retval EFI_SUCCESS ConsoleControl has been flipped to graphics and = logo + displayed. + @retval EFI_UNSUPPORTED Logo not found +**/ +EFI_STATUS +EnableQuietBoot ( + IN EFI_GUID *LogoFile + ); + +/** + Use SystemTable Conout to turn on video based Simple Text Out consoles. = The + Simple Text Out screens will now be synced up with all non video output + devices + + @retval EFI_SUCCESS UGA devices are back in text mode and synced up. +**/ +EFI_STATUS +DisableQuietBoot ( + VOID + ); + +#endif // _PLATFORM_BM_H_ diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootM= anagerLib.inf b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBo= otManagerLib.inf new file mode 100644 index 0000000..ae274f3 --- /dev/null +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerL= ib.inf @@ -0,0 +1,89 @@ +## @file +# Implementation for PlatformBootManagerLib library class interfaces. +# +# Copyright (C) 2015-2016, Red Hat, Inc. +# Copyright (c) 2014, ARM Ltd. All rights reserved.
+# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.
+# Copyright (c) 2016, Linaro Ltd. All rights reserved.
+# +# This program and the accompanying materials are licensed and made avail= able +# under the terms and conditions of the BSD License which accompanies this +# distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR +# IMPLIED. +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D PlatformBootManagerLib + FILE_GUID =3D 92FD2DE3-B9CB-4B35-8141-42AD34D73C9F + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D PlatformBootManagerLib|DXE_DRIVER + +# +# The following information is for reference only and not required by the = build tools. +# +# VALID_ARCHITECTURES =3D ARM AARCH64 +# + +[Sources] + PlatformBm.c + QuietBoot.c + +[Packages] + IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/Hisilicon/HisiPkg.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + DevicePathLib + DxeServicesLib + MemoryAllocationLib + PcdLib + PrintLib + UefiBootManagerLib + UefiBootServicesTableLib + UefiLib + +[FeaturePcd] + gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdBootlogoOnlyEnable + gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport + +[FixedPcd] + gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile + gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType + +[Pcd] + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut + +[Guids] + gEfiFileInfoGuid + gEfiFileSystemInfoGuid + gEfiFileSystemVolumeLabelInfoIdGuid + gEfiEndOfDxeEventGroupGuid + gEfiTtyTermGuid + +[Protocols] + gEfiDevicePathProtocolGuid + gEfiFirmwareVolume2ProtocolGuid + gEfiGenericMemTestProtocolGuid + gEfiGraphicsOutputProtocolGuid + gEfiLoadedImageProtocolGuid + gEfiOEMBadgingProtocolGuid + gEfiPciRootBridgeIoProtocolGuid + gEfiSimpleFileSystemProtocolGuid + gEsrtManagementProtocolGuid diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c b= /Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c new file mode 100644 index 0000000..0bd15da --- /dev/null +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c @@ -0,0 +1,681 @@ +/** @file +Platform BDS function for quiet boot support. + +Copyright (c) 2018, ARM Ltd. All rights reserved.
+Copyright (c) 2018, Hisilicon Limited. All rights reserved. +Copyright (c) 2018, Linaro Ltd. All rights reserved.
+This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD = License +which accompanies this distribution. The full text of the license may be = found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLI= ED. + +**/ + +#include +#include +#include +#include +#include + +#include "PlatformBm.h" + +/** + Convert a *.BMP graphics image to a GOP blt buffer. If a NULL Blt buffer + is passed in a GopBlt buffer will be allocated by this routine. If a Gop= Blt + buffer is passed in it will be used if it is big enough. + + @param BmpImage Pointer to BMP file + @param BmpImageSize Number of bytes in BmpImage + @param GopBlt Buffer containing GOP version of BmpImage. + @param GopBltSize Size of GopBlt in bytes. + @param PixelHeight Height of GopBlt/BmpImage in pixels + @param PixelWidth Width of GopBlt/BmpImage in pixels + + @retval EFI_SUCCESS GopBlt and GopBltSize are returned. + @retval EFI_UNSUPPORTED BmpImage is not a valid *.BMP image + @retval EFI_BUFFER_TOO_SMALL The passed in GopBlt buffer is not big eno= ugh. + GopBltSize will contain the required size. + @retval EFI_OUT_OF_RESOURCES No enough buffer to allocate. + +**/ +STATIC +EFI_STATUS +ConvertBmpToGopBlt ( + IN VOID *BmpImage, + IN UINTN BmpImageSize, + IN OUT VOID **GopBlt, + IN OUT UINTN *GopBltSize, + OUT UINTN *PixelHeight, + OUT UINTN *PixelWidth + ) +{ + UINT8 *Image; + UINT8 *ImageHeader; + BMP_IMAGE_HEADER *BmpHeader; + BMP_COLOR_MAP *BmpColorMap; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Blt; + UINT64 BltBufferSize; + UINTN Index; + UINTN Height; + UINTN Width; + UINTN ImageIndex; + UINT32 DataSizePerLine; + BOOLEAN IsAllocated; + UINT32 ColorMapNum; + + if (sizeof (BMP_IMAGE_HEADER) > BmpImageSize) { + return EFI_INVALID_PARAMETER; + } + + BmpHeader =3D (BMP_IMAGE_HEADER *) BmpImage; + + if (BmpHeader->CharB !=3D 'B' || BmpHeader->CharM !=3D 'M') { + return EFI_UNSUPPORTED; + } + + // + // Doesn't support compress. + // + if (BmpHeader->CompressionType !=3D 0) { + return EFI_UNSUPPORTED; + } + + // + // Only support BITMAPINFOHEADER format. + // BITMAPFILEHEADER + BITMAPINFOHEADER =3D BMP_IMAGE_HEADER + // + if (BmpHeader->HeaderSize !=3D sizeof (BMP_IMAGE_HEADER) - OFFSET_OF(BMP= _IMAGE_HEADER, HeaderSize)) { + return EFI_UNSUPPORTED; + } + + // + // The data size in each line must be 4 byte alignment. + // + DataSizePerLine =3D ((BmpHeader->PixelWidth * BmpHeader->BitPerPixel + 3= 1) >> 3) & (~0x3); + BltBufferSize =3D MultU64x32 (DataSizePerLine, BmpHeader->PixelHeight); + if (BltBufferSize > (UINT32) ~0) { + return EFI_INVALID_PARAMETER; + } + + if ((BmpHeader->Size !=3D BmpImageSize) || + (BmpHeader->Size < BmpHeader->ImageOffset) || + (BmpHeader->Size - BmpHeader->ImageOffset !=3D BmpHeader->PixelHeig= ht * DataSizePerLine)) { + return EFI_INVALID_PARAMETER; + } + + // + // Calculate Color Map offset in the image. + // + Image =3D BmpImage; + BmpColorMap =3D (BMP_COLOR_MAP *) (Image + sizeof (BMP_IMAGE_HEADER)); + if (BmpHeader->ImageOffset < sizeof (BMP_IMAGE_HEADER)) { + return EFI_INVALID_PARAMETER; + } + + if (BmpHeader->ImageOffset > sizeof (BMP_IMAGE_HEADER)) { + switch (BmpHeader->BitPerPixel) { + case 1: + ColorMapNum =3D 2; + break; + case 4: + ColorMapNum =3D 16; + break; + case 8: + ColorMapNum =3D 256; + break; + default: + ColorMapNum =3D 0; + break; + } + // + // BMP file may has padding data between the bmp header section and th= e bmp data section. + // + if (BmpHeader->ImageOffset - sizeof (BMP_IMAGE_HEADER) < sizeof (BMP_C= OLOR_MAP) * ColorMapNum) { + return EFI_INVALID_PARAMETER; + } + } + + // + // Calculate graphics image data address in the image + // + Image =3D ((UINT8 *) BmpImage) + BmpHeader->ImageOffset; + ImageHeader =3D Image; + + // + // Calculate the BltBuffer needed size. + // + BltBufferSize =3D MultU64x32 ((UINT64) BmpHeader->PixelWidth, BmpHeader-= >PixelHeight); + // + // Ensure the BltBufferSize * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) doe= sn't overflow + // + if (BltBufferSize > DivU64x32 ((UINTN) ~0, sizeof (EFI_GRAPHICS_OUTPUT_B= LT_PIXEL))) { + return EFI_UNSUPPORTED; + } + BltBufferSize =3D MultU64x32 (BltBufferSize, sizeof (EFI_GRAPHICS_OUTPUT= _BLT_PIXEL)); + + IsAllocated =3D FALSE; + if (*GopBlt =3D=3D NULL) { + // + // GopBlt is not allocated by caller. + // + *GopBltSize =3D (UINTN) BltBufferSize; + *GopBlt =3D AllocatePool (*GopBltSize); + IsAllocated =3D TRUE; + if (*GopBlt =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + } else { + // + // GopBlt has been allocated by caller. + // + if (*GopBltSize < (UINTN) BltBufferSize) { + *GopBltSize =3D (UINTN) BltBufferSize; + return EFI_BUFFER_TOO_SMALL; + } + } + + *PixelWidth =3D BmpHeader->PixelWidth; + *PixelHeight =3D BmpHeader->PixelHeight; + + // + // Convert image from BMP to Blt buffer format + // + BltBuffer =3D *GopBlt; + for (Height =3D 0; Height < BmpHeader->PixelHeight; Height++) { + Blt =3D &BltBuffer[(BmpHeader->PixelHeight - Height - 1) * BmpHeader->= PixelWidth]; + for (Width =3D 0; Width < BmpHeader->PixelWidth; Width++, Image++, Blt= ++) { + switch (BmpHeader->BitPerPixel) { + case 1: + // + // Convert 1-bit (2 colors) BMP to 24-bit color + // + for (Index =3D 0; Index < 8 && Width < BmpHeader->PixelWidth; Inde= x++) { + Blt->Red =3D BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Red; + Blt->Green =3D BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Gre= en; + Blt->Blue =3D BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Blu= e; + Blt++; + Width++; + } + + Blt--; + Width--; + break; + + case 4: + // + // Convert 4-bit (16 colors) BMP Palette to 24-bit color + // + Index =3D (*Image) >> 4; + Blt->Red =3D BmpColorMap[Index].Red; + Blt->Green =3D BmpColorMap[Index].Green; + Blt->Blue =3D BmpColorMap[Index].Blue; + if (Width < (BmpHeader->PixelWidth - 1)) { + Blt++; + Width++; + Index =3D (*Image) & 0x0f; + Blt->Red =3D BmpColorMap[Index].Red; + Blt->Green =3D BmpColorMap[Index].Green; + Blt->Blue =3D BmpColorMap[Index].Blue; + } + break; + + case 8: + // + // Convert 8-bit (256 colors) BMP Palette to 24-bit color + // + Blt->Red =3D BmpColorMap[*Image].Red; + Blt->Green =3D BmpColorMap[*Image].Green; + Blt->Blue =3D BmpColorMap[*Image].Blue; + break; + + case 24: + // + // It is 24-bit BMP. + // + Blt->Blue =3D *Image++; + Blt->Green =3D *Image++; + Blt->Red =3D *Image; + break; + + default: + // + // Other bit format BMP is not supported. + // + if (IsAllocated) { + FreePool (*GopBlt); + *GopBlt =3D NULL; + } + return EFI_UNSUPPORTED; + }; + + } + + ImageIndex =3D (UINTN) (Image - ImageHeader); + if ((ImageIndex % 4) !=3D 0) { + // + // Bmp Image starts each row on a 32-bit boundary! + // + Image =3D Image + (4 - (ImageIndex % 4)); + } + } + + return EFI_SUCCESS; +} + +/** + Use SystemTable Conout to stop video based Simple Text Out consoles from= going + to the video device. Put up LogoFile on every video device that is a con= sole. + + @param[in] LogoFile File name of logo to display on the center of the= screen. + + @retval EFI_SUCCESS ConsoleControl has been flipped to graphics and = logo displayed. + @retval EFI_UNSUPPORTED Logo not found + +**/ +EFI_STATUS +EnableQuietBoot ( + IN EFI_GUID *LogoFile + ) +{ + EFI_STATUS Status; + EFI_OEM_BADGING_PROTOCOL *Badging; + UINT32 SizeOfX; + UINT32 SizeOfY; + INTN DestX; + INTN DestY; + UINT8 *ImageData; + UINTN ImageSize; + UINTN BltSize; + UINT32 Instance; + EFI_BADGING_FORMAT Format; + EFI_BADGING_DISPLAY_ATTRIBUTE Attribute; + UINTN CoordinateX; + UINTN CoordinateY; + UINTN Height; + UINTN Width; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Blt; + EFI_UGA_DRAW_PROTOCOL *UgaDraw; + UINT32 ColorDepth; + UINT32 RefreshRate; + EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput; + EFI_BOOT_LOGO_PROTOCOL *BootLogo; + UINTN NumberOfLogos; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *LogoBlt; + UINTN LogoDestX; + UINTN LogoDestY; + UINTN LogoHeight; + UINTN LogoWidth; + UINTN NewDestX; + UINTN NewDestY; + UINTN NewHeight; + UINTN NewWidth; + UINT64 BufferSize; + + UgaDraw =3D NULL; + // + // Try to open GOP first + // + Status =3D gBS->HandleProtocol (gST->ConsoleOutHandle, &gEfiGraphicsOutp= utProtocolGuid, (VOID **) &GraphicsOutput); + if (EFI_ERROR (Status) && FeaturePcdGet (PcdUgaConsumeSupport)) { + GraphicsOutput =3D NULL; + // + // Open GOP failed, try to open UGA + // + Status =3D gBS->HandleProtocol (gST->ConsoleOutHandle, &gEfiUgaDrawPro= tocolGuid, (VOID **) &UgaDraw); + } + if (EFI_ERROR (Status)) { + return EFI_UNSUPPORTED; + } + + // + // Try to open Boot Logo Protocol. + // + BootLogo =3D NULL; + gBS->LocateProtocol (&gEfiBootLogoProtocolGuid, NULL, (VOID **) &BootLog= o); + + // + // Erase Cursor from screen + // + gST->ConOut->EnableCursor (gST->ConOut, FALSE); + + Badging =3D NULL; + Status =3D gBS->LocateProtocol (&gEfiOEMBadgingProtocolGuid, NULL, (VOI= D **) &Badging); + + if (GraphicsOutput !=3D NULL) { + SizeOfX =3D GraphicsOutput->Mode->Info->HorizontalResolution; + SizeOfY =3D GraphicsOutput->Mode->Info->VerticalResolution; + + } else if (UgaDraw !=3D NULL && FeaturePcdGet (PcdUgaConsumeSupport)) { + Status =3D UgaDraw->GetMode (UgaDraw, &SizeOfX, &SizeOfY, &ColorDepth,= &RefreshRate); + if (EFI_ERROR (Status)) { + return EFI_UNSUPPORTED; + } + } else { + return EFI_UNSUPPORTED; + } + + Blt =3D NULL; + NumberOfLogos =3D 0; + LogoDestX =3D 0; + LogoDestY =3D 0; + LogoHeight =3D 0; + LogoWidth =3D 0; + NewDestX =3D 0; + NewDestY =3D 0; + NewHeight =3D 0; + NewWidth =3D 0; + Instance =3D 0; + Height =3D 0; + Width =3D 0; + while (1) { + ImageData =3D NULL; + ImageSize =3D 0; + + if (Badging !=3D NULL) { + // + // Get image from OEMBadging protocol. + // + Status =3D Badging->GetImage ( + Badging, + &Instance, + &Format, + &ImageData, + &ImageSize, + &Attribute, + &CoordinateX, + &CoordinateY + ); + if (EFI_ERROR (Status)) { + goto Done; + } + + // + // Currently only support BMP format. + // + if (Format !=3D EfiBadgingFormatBMP) { + if (ImageData !=3D NULL) { + FreePool (ImageData); + } + continue; + } + } else { + // + // Get the specified image from FV. + // + Status =3D GetSectionFromAnyFv (LogoFile, EFI_SECTION_RAW, 0, (VOID = **) &ImageData, &ImageSize); + if (EFI_ERROR (Status)) { + return EFI_UNSUPPORTED; + } + + CoordinateX =3D 0; + CoordinateY =3D 0; + if (!FeaturePcdGet(PcdBootlogoOnlyEnable)) { + Attribute =3D EfiBadgingDisplayAttributeCenter; + } else { + Attribute =3D EfiBadgingDisplayAttributeCustomized; + } + } + + if (Blt !=3D NULL) { + FreePool (Blt); + } + Blt =3D NULL; + Status =3D ConvertBmpToGopBlt ( + ImageData, + ImageSize, + (VOID **) &Blt, + &BltSize, + &Height, + &Width + ); + if (EFI_ERROR (Status)) { + FreePool (ImageData); + + if (Badging =3D=3D NULL) { + return Status; + } else { + continue; + } + } + + // + // Calculate the display position according to Attribute. + // + switch (Attribute) { + case EfiBadgingDisplayAttributeLeftTop: + DestX =3D CoordinateX; + DestY =3D CoordinateY; + break; + + case EfiBadgingDisplayAttributeCenterTop: + DestX =3D (SizeOfX - Width) / 2; + DestY =3D CoordinateY; + break; + + case EfiBadgingDisplayAttributeRightTop: + DestX =3D (SizeOfX - Width - CoordinateX); + DestY =3D CoordinateY;; + break; + + case EfiBadgingDisplayAttributeCenterRight: + DestX =3D (SizeOfX - Width - CoordinateX); + DestY =3D (SizeOfY - Height) / 2; + break; + + case EfiBadgingDisplayAttributeRightBottom: + DestX =3D (SizeOfX - Width - CoordinateX); + DestY =3D (SizeOfY - Height - CoordinateY); + break; + + case EfiBadgingDisplayAttributeCenterBottom: + DestX =3D (SizeOfX - Width) / 2; + DestY =3D (SizeOfY - Height - CoordinateY); + break; + + case EfiBadgingDisplayAttributeLeftBottom: + DestX =3D CoordinateX; + DestY =3D (SizeOfY - Height - CoordinateY); + break; + + case EfiBadgingDisplayAttributeCenterLeft: + DestX =3D CoordinateX; + DestY =3D (SizeOfY - Height) / 2; + break; + + case EfiBadgingDisplayAttributeCenter: + DestX =3D (SizeOfX - Width) / 2; + DestY =3D (SizeOfY - Height) / 2; + break; + + case EfiBadgingDisplayAttributeCustomized: + DestX =3D (SizeOfX - Width) / 2; + DestY =3D ((SizeOfY * 382) / 1000) - Height / 2; + break; + + default: + DestX =3D CoordinateX; + DestY =3D CoordinateY; + break; + } + + if ((DestX >=3D 0) && (DestY >=3D 0)) { + if (GraphicsOutput !=3D NULL) { + Status =3D GraphicsOutput->Blt ( + GraphicsOutput, + Blt, + EfiBltBufferToVideo, + 0, + 0, + (UINTN) DestX, + (UINTN) DestY, + Width, + Height, + Width * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) + ); + } else if (UgaDraw !=3D NULL && FeaturePcdGet (PcdUgaConsumeSupport)= ) { + Status =3D UgaDraw->Blt ( + UgaDraw, + (EFI_UGA_PIXEL *) Blt, + EfiUgaBltBufferToVideo, + 0, + 0, + (UINTN) DestX, + (UINTN) DestY, + Width, + Height, + Width * sizeof (EFI_UGA_PIXEL) + ); + } else { + Status =3D EFI_UNSUPPORTED; + } + + // + // Report displayed Logo information. + // + if (!EFI_ERROR (Status)) { + NumberOfLogos++; + + if (LogoWidth =3D=3D 0) { + // + // The first Logo. + // + LogoDestX =3D (UINTN) DestX; + LogoDestY =3D (UINTN) DestY; + LogoWidth =3D Width; + LogoHeight =3D Height; + } else { + // + // Merge new logo with old one. + // + NewDestX =3D MIN ((UINTN) DestX, LogoDestX); + NewDestY =3D MIN ((UINTN) DestY, LogoDestY); + NewWidth =3D MAX ((UINTN) DestX + Width, LogoDestX + LogoWidth) = - NewDestX; + NewHeight =3D MAX ((UINTN) DestY + Height, LogoDestY + LogoHeigh= t) - NewDestY; + + LogoDestX =3D NewDestX; + LogoDestY =3D NewDestY; + LogoWidth =3D NewWidth; + LogoHeight =3D NewHeight; + } + } + } + + FreePool (ImageData); + + if (Badging =3D=3D NULL) { + break; + } + } + +Done: + if (BootLogo =3D=3D NULL || NumberOfLogos =3D=3D 0) { + // + // No logo displayed. + // + if (Blt !=3D NULL) { + FreePool (Blt); + } + + return Status; + } + + // + // Advertise displayed Logo information. + // + if (NumberOfLogos =3D=3D 1) { + // + // Only one logo displayed, use its Blt buffer directly for BootLogo p= rotocol. + // + LogoBlt =3D Blt; + Status =3D EFI_SUCCESS; + } else { + // + // More than one Logo displayed, get merged BltBuffer using VideoToBuf= fer operation. + // + if (Blt !=3D NULL) { + FreePool (Blt); + } + + // + // Ensure the LogoHeight * LogoWidth doesn't overflow + // + if (LogoHeight > DivU64x64Remainder ((UINTN) ~0, LogoWidth, NULL)) { + return EFI_UNSUPPORTED; + } + BufferSize =3D MultU64x64 (LogoWidth, LogoHeight); + + // + // Ensure the BufferSize * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) does= n't overflow + // + if (BufferSize > DivU64x32 ((UINTN) ~0, sizeof (EFI_GRAPHICS_OUTPUT_BL= T_PIXEL))) { + return EFI_UNSUPPORTED; + } + + LogoBlt =3D AllocateZeroPool ((UINTN)BufferSize * sizeof (EFI_GRAPHICS= _OUTPUT_BLT_PIXEL)); + if (LogoBlt =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + + if (GraphicsOutput !=3D NULL) { + Status =3D GraphicsOutput->Blt ( + GraphicsOutput, + LogoBlt, + EfiBltVideoToBltBuffer, + LogoDestX, + LogoDestY, + 0, + 0, + LogoWidth, + LogoHeight, + LogoWidth * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXE= L) + ); + } else if (UgaDraw !=3D NULL && FeaturePcdGet (PcdUgaConsumeSupport)) { + Status =3D UgaDraw->Blt ( + UgaDraw, + (EFI_UGA_PIXEL *) LogoBlt, + EfiUgaVideoToBltBuffer, + LogoDestX, + LogoDestY, + 0, + 0, + LogoWidth, + LogoHeight, + LogoWidth * sizeof (EFI_UGA_PIXEL) + ); + } else { + Status =3D EFI_UNSUPPORTED; + } + } + + if (!EFI_ERROR (Status)) { + BootLogo->SetBootLogo (BootLogo, LogoBlt, LogoDestX, LogoDestY, LogoWi= dth, LogoHeight); + } + FreePool (LogoBlt); + + return Status; +} + +/** + Use SystemTable Conout to turn on video based Simple Text Out consoles. = The + Simple Text Out screens will now be synced up with all non video output = devices + + @retval EFI_SUCCESS UGA devices are back in text mode and synced up. + +**/ +EFI_STATUS +DisableQuietBoot ( + VOID + ) +{ + + // + // Enable Cursor on Screen + // + gST->ConOut->EnableCursor (gST->ConOut, TRUE); + return EFI_SUCCESS; +} + --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri May 3 09:52:25 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1516287729011306.38829736481057; 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Thu, 18 Jan 2018 07:02:02 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 18 Jan 2018 23:01:32 +0800 Message-Id: <1516287703-35516-4-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516287703-35516-1-git-send-email-huangming23@huawei.com> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> Subject: [edk2] [PATCH edk2-platforms v1 03/14] Hisilicon D03/D05: Optimize the feature of BMC set boot option X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Modify the feature of BMC set boot option as switching generic BDS. Move main functions to BmcConfigBootLib. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Platform/Hisilicon/D03/D03.dsc = | 1 + Platform/Hisilicon/D05/D05.dsc = | 1 + Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h = | 31 ++ Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c = | 454 ++++++++++++++++++++ Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf = | 51 +++ Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c = | 7 + Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.in= f | 1 + Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c = | 434 +------------------ Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf = | 4 +- 9 files changed, 548 insertions(+), 436 deletions(-) diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index f7efff5..b2eae7d 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -70,6 +70,7 @@ GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLi= b.inf PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformInt= elBdsLib.inf !if $(GENERIC_BDS) =3D=3D TRUE + BmcConfigBootLib|Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBoo= tLib.inf UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManag= erLib.inf SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeRepor= tStatusCodeLib.inf diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 57370dc..b89cea3 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -85,6 +85,7 @@ GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLi= b.inf PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformInt= elBdsLib.inf !if $(GENERIC_BDS) =3D=3D TRUE + BmcConfigBootLib|Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBoo= tLib.inf UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManag= erLib.inf SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeRepor= tStatusCodeLib.inf diff --git a/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h b/Silicon= /Hisilicon/Include/Library/BmcConfigBootLib.h new file mode 100644 index 0000000..d937234 --- /dev/null +++ b/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h @@ -0,0 +1,31 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#ifndef _BMC_CONFIG_BOOT_LIB_H_ +#define _BMC_CONFIG_BOOT_LIB_H_ + +VOID +EFIAPI +RestoreBootOrder ( + VOID + ); + +VOID +EFIAPI +HandleBmcBootType ( + VOID + ); + +#endif diff --git a/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c = b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c new file mode 100644 index 0000000..c446f93 --- /dev/null +++ b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c @@ -0,0 +1,454 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +GUID gOemBootVariableGuid =3D {0xb7784577, 0x5aaf, 0x4557, {0xa1, 0x99, + 0xd4, 0xa4, 0x2f, 0x45, 0x06, 0xf8} }; + +STATIC +UINT16 +GetBBSTypeFromFileSysPath ( + IN CHAR16 *UsbPathTxt, + IN CHAR16 *FileSysPathTxt, + IN EFI_DEVICE_PATH_PROTOCOL *FileSysPath + ) +{ + EFI_DEVICE_PATH_PROTOCOL *Node; + + if (StrnCmp (UsbPathTxt, FileSysPathTxt, StrLen (UsbPathTxt)) =3D=3D 0) { + Node =3D FileSysPath; + while (!IsDevicePathEnd (Node)) { + if ((DevicePathType (Node) =3D=3D MEDIA_DEVICE_PATH) && + (DevicePathSubType (Node) =3D=3D MEDIA_CDROM_DP)) { + return BBS_TYPE_CDROM; + } + Node =3D NextDevicePathNode (Node); + } + } + + return BBS_TYPE_UNKNOWN; +} + +STATIC +UINT16 +GetBBSTypeFromUsbPath ( + IN CONST EFI_DEVICE_PATH_PROTOCOL *UsbPath + ) +{ + EFI_STATUS Status; + EFI_HANDLE *FileSystemHandles; + UINTN NumberFileSystemHandles; + UINTN Index; + EFI_DEVICE_PATH_PROTOCOL *FileSysPath; + EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *DevPathToText; + CHAR16 *UsbPathTxt; + CHAR16 *FileSysPathTxt; + UINT16 Result; + + Status =3D gBS->LocateProtocol (&gEfiDevicePathToTextProtocolGuid, NULL,= (VOID **) &DevPathToText); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Locate DevicePathToTextPro %r\n", Status)); + return BBS_TYPE_UNKNOWN; + } + + Result =3D BBS_TYPE_UNKNOWN; + UsbPathTxt =3D DevPathToText->ConvertDevicePathToText (UsbPath, TRUE, TR= UE); + if (UsbPathTxt =3D=3D NULL) { + return Result; + } + + Status =3D gBS->LocateHandleBuffer ( + ByProtocol, + &gEfiSimpleFileSystemProtocolGuid, + NULL, + &NumberFileSystemHandles, + &FileSystemHandles + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Locate SimpleFileSystemProtocol error(%r)\n", St= atus)); + FreePool (UsbPathTxt); + return BBS_TYPE_UNKNOWN; + } + + for (Index =3D 0; Index < NumberFileSystemHandles; Index++) { + FileSysPath =3D DevicePathFromHandle (FileSystemHandles[Index]); + FileSysPathTxt =3D DevPathToText->ConvertDevicePathToText (FileSysPath= , TRUE, TRUE); + + if (FileSysPathTxt =3D=3D NULL) { + continue; + } + + Result =3D GetBBSTypeFromFileSysPath (UsbPathTxt, FileSysPathTxt, File= SysPath); + FreePool (FileSysPathTxt); + + if (Result !=3D BBS_TYPE_UNKNOWN) { + break; + } + } + + if (NumberFileSystemHandles !=3D 0) { + FreePool (FileSystemHandles); + } + + FreePool (UsbPathTxt); + + return Result; +} + +STATIC +UINT16 +GetBBSTypeFromMessagingDevicePath ( + IN EFI_DEVICE_PATH_PROTOCOL *DevicePath, + IN EFI_DEVICE_PATH_PROTOCOL *Node + ) +{ + VENDOR_DEVICE_PATH *Vendor; + UINT16 Result; + + Result =3D BBS_TYPE_UNKNOWN; + + switch (DevicePathSubType (Node)) { + case MSG_MAC_ADDR_DP: + Result =3D BBS_TYPE_EMBEDDED_NETWORK; + break; + + case MSG_USB_DP: + Result =3D GetBBSTypeFromUsbPath (DevicePath); + if (Result =3D=3D BBS_TYPE_UNKNOWN) { + Result =3D BBS_TYPE_USB; + } + break; + + case MSG_SATA_DP: + Result =3D BBS_TYPE_HARDDRIVE; + break; + + case MSG_VENDOR_DP: + Vendor =3D (VENDOR_DEVICE_PATH *) (Node); + if ((&Vendor->Guid) !=3D NULL) { + if (CompareGuid (&Vendor->Guid, &((EFI_GUID) DEVICE_PATH_MESSAGING_S= AS))) { + Result =3D BBS_TYPE_HARDDRIVE; + } + } + break; + + default: + Result =3D BBS_TYPE_UNKNOWN; + break; + } + + return Result; +} + +STATIC +UINT16 +GetBBSTypeByDevicePath ( + IN EFI_DEVICE_PATH_PROTOCOL *DevicePath + ) +{ + EFI_DEVICE_PATH_PROTOCOL *Node; + UINT16 Result; + + Result =3D BBS_TYPE_UNKNOWN; + if (DevicePath =3D=3D NULL) { + return Result; + } + + Node =3D DevicePath; + while (!IsDevicePathEnd (Node)) { + switch (DevicePathType (Node)) { + case MEDIA_DEVICE_PATH: + if (DevicePathSubType (Node) =3D=3D MEDIA_CDROM_DP) { + Result =3D BBS_TYPE_CDROM; + } + break; + + case MESSAGING_DEVICE_PATH: + Result =3D GetBBSTypeFromMessagingDevicePath (DevicePath, Node); + break; + + default: + Result =3D BBS_TYPE_UNKNOWN; + break; + } + + if (Result !=3D BBS_TYPE_UNKNOWN) { + break; + } + + Node =3D NextDevicePathNode (Node); + } + + return Result; +} + +STATIC +EFI_STATUS +GetBmcBootOptionsSetting ( + OUT IPMI_GET_BOOT_OPTION *BmcBootOpt + ) +{ + EFI_STATUS Status; + + Status =3D IpmiCmdGetSysBootOptions (BmcBootOpt); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Get iBMC BootOpts %r!\n", Status)); + return Status; + } + + if (BmcBootOpt->BootFlagsValid !=3D BOOT_OPTION_BOOT_FLAG_VALID) { + return EFI_NOT_FOUND; + } + + if (BmcBootOpt->Persistent) { + BmcBootOpt->BootFlagsValid =3D BOOT_OPTION_BOOT_FLAG_VALID; + } else { + BmcBootOpt->BootFlagsValid =3D BOOT_OPTION_BOOT_FLAG_INVALID; + } + + Status =3D IpmiCmdSetSysBootOptions (BmcBootOpt); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Set iBMC BootOpts %r!\n", Status)); + } + + return Status; +} + +VOID +RestoreBootOrder ( + VOID + ) +{ + EFI_STATUS Status; + UINT16 *BootOrder; + UINTN BootOrderSize; + + GetVariable2 (L"BootOrderBackup", &gOemBootVariableGuid, (VOID **) &Boot= Order, &BootOrderSize); + if (BootOrder =3D=3D NULL) { + return ; + } + + Print (L"\nRestore BootOrder(%d).\n", BootOrderSize / sizeof (UINT16)); + + Status =3D gRT->SetVariable ( + L"BootOrder", + &gEfiGlobalVariableGuid, + EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_A= CCESS | EFI_VARIABLE_NON_VOLATILE, + BootOrderSize, + BootOrder + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "SetVariable BootOrder %r!\n", Status)); + } + + Status =3D gRT->SetVariable ( + L"BootOrderBackup", + &gOemBootVariableGuid, + EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLAT= ILE, + 0, + NULL + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "SetVariable BootOrderBackup %r!\n", Status)); + } + + FreePool (BootOrder); + + return; +} + + +VOID +RestoreBootOrderOnReadyToBoot ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + // restore BootOrder variable in normal condition. + RestoreBootOrder (); +} + +STATIC +VOID +UpdateBootOrder ( + IN UINT16 *NewOrder, + IN UINT16 *BootOrder, + IN UINTN BootOrderSize + ) +{ + EFI_STATUS Status; + EFI_EVENT Event; + + Status =3D gRT->SetVariable ( + L"BootOrderBackup", + &gOemBootVariableGuid, + EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLAT= ILE, + BootOrderSize, + BootOrder + ); + if (EFI_ERROR (Status)) { + return; + } + + Status =3D gRT->SetVariable ( + L"BootOrder", + &gEfiGlobalVariableGuid, + EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_A= CCESS | EFI_VARIABLE_NON_VOLATILE, + BootOrderSize, + NewOrder + ); + if (EFI_ERROR (Status)) { + return; + } + + // Register notify function to restore BootOrder variable on ReadyToBoot= Event. + Status =3D gBS->CreateEventEx ( + EVT_NOTIFY_SIGNAL, + TPL_CALLBACK, + RestoreBootOrderOnReadyToBoot, + NULL, + &gEfiEventReadyToBootGuid, + &Event + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Create ready to boot event %r!\n", Status)); + } + + return; +} + +STATIC +VOID +SetBootOrder ( + IN UINT16 BootType + ) +{ + EFI_STATUS Status; + UINT16 *NewOrder; + UINT16 *RemainBoots; + UINT16 *BootOrder; + UINTN BootOrderSize; + EFI_BOOT_MANAGER_LOAD_OPTION Option; + CHAR16 OptionName[sizeof ("Boot####")]; + UINTN Index; + UINTN SelectCnt; + UINTN RemainCnt; + + GetEfiGlobalVariable2 (L"BootOrder", (VOID **) &BootOrder, &BootOrderSiz= e); + if (BootOrder =3D=3D NULL) { + return ; + } + + NewOrder =3D AllocatePool (BootOrderSize); + RemainBoots =3D AllocatePool (BootOrderSize); + if ((NewOrder =3D=3D NULL) || (RemainBoots =3D=3D NULL)) { + DEBUG ((DEBUG_ERROR, "Out of resources.")); + goto Exit; + } + + SelectCnt =3D 0; + RemainCnt =3D 0; + + for (Index =3D 0; Index < BootOrderSize / sizeof (UINT16); Index++) { + UnicodeSPrint (OptionName, sizeof (OptionName), L"Boot%04x", BootOrder= [Index]); + Status =3D EfiBootManagerVariableToLoadOption (OptionName, &Option); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Boot%04x is invalid option!\n", BootOrder[Inde= x])); + continue; + } + + if (GetBBSTypeByDevicePath (Option.FilePath) =3D=3D BootType) { + NewOrder[SelectCnt++] =3D BootOrder[Index]; + } else { + RemainBoots[RemainCnt++] =3D BootOrder[Index]; + } + } + + if (SelectCnt !=3D 0) { + // append RemainBoots to NewOrder + for (Index =3D 0; Index < RemainCnt; Index++) { + NewOrder[SelectCnt + Index] =3D RemainBoots[Index]; + } + + if (CompareMem (NewOrder, BootOrder, BootOrderSize) !=3D 0) { + UpdateBootOrder (NewOrder, BootOrder, BootOrderSize); + } + } + +Exit: + FreePool (BootOrder); + if (NewOrder !=3D NULL) { + FreePool (NewOrder); + } + if (RemainBoots !=3D NULL) { + FreePool (RemainBoots); + } + + return ; +} + +VOID +HandleBmcBootType ( + VOID + ) +{ + EFI_STATUS Status; + IPMI_GET_BOOT_OPTION BmcBootOpt; + UINT16 BootType; + + Status =3D GetBmcBootOptionsSetting (&BmcBootOpt); + if (EFI_ERROR (Status)) { + return; + } + + Print (L"Boot Type from BMC is %x\n", BmcBootOpt.BootDeviceSelector); + + switch (BmcBootOpt.BootDeviceSelector) { + case ForcePxe: + BootType =3D BBS_TYPE_EMBEDDED_NETWORK; + break; + + case ForcePrimaryRemovableMedia: + BootType =3D BBS_TYPE_USB; + break; + + case ForceDefaultHardDisk: + BootType =3D BBS_TYPE_HARDDRIVE; + break; + + case ForceDefaultCD: + BootType =3D BBS_TYPE_CDROM; + break; + + default: + return; + } + + SetBootOrder (BootType); +} + diff --git a/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.in= f b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf new file mode 100644 index 0000000..7e407b4 --- /dev/null +++ b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf @@ -0,0 +1,51 @@ +#/** @file +# +# Copyright (c) 2015, Hisilicon Limited. All rights reserved. +# Copyright (c) 2015, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the= BSD License +# which accompanies this distribution. The full text of the license may= be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR = IMPLIED. +# +#**/ + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D BmcConfigBootLib + FILE_GUID =3D f174d192-7208-46c1-b9d1-65b2db06ad3b + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D BmcConfigBootLib + +[Sources.common] + BmcConfigBootLib.c + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Silicon/Hisilicon/HisiPkg.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + DevicePathLib + IpmiCmdLib + PcdLib + PrintLib + UefiBootManagerLib + +[BuildOptions] + +[Pcd] + +[Guids] + gEfiEventReadyToBootGuid + +[Protocols] + gEfiDevicePathToTextProtocolGuid ## CONSUMES + gEfiSimpleFileSystemProtocolGuid ## CONSUMES diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c = b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c index 5d8d58e..845519f 100644 --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c @@ -16,6 +16,7 @@ **/ =20 #include +#include #include #include #include @@ -474,6 +475,10 @@ PlatformBootManagerBeforeConsole ( // EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid); =20 + // restore BootOrder variable if previous BMC boot override attempt + // left it in a modified state + RestoreBootOrder (); + UpdateMemory (); =20 // @@ -570,6 +575,8 @@ PlatformBootManagerAfterConsole ( PlatformRegisterFvBootOption ( PcdGetPtr (PcdShellFile), L"UEFI Shell", LOAD_OPTION_ACTIVE ); + + HandleBmcBootType (); } =20 /** diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootM= anagerLib.inf b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBo= otManagerLib.inf index ae274f3..7b151a9 100644 --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerL= ib.inf +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerL= ib.inf @@ -44,6 +44,7 @@ [LibraryClasses] BaseLib BaseMemoryLib + BmcConfigBootLib DebugLib DevicePathLib DxeServicesLib diff --git a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform= .c b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c index dc23e46..20015da 100644 --- a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c +++ b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c @@ -20,25 +20,19 @@ **/ =20 #include +#include #include -#include -#include #include #include #include #include #include -#include #include #include #include -#include =20 #include "IntelBdsPlatform.h" =20 -GUID gOemBootVaraibleGuid =3D {0xb7784577, 0x5aaf, 0x4557, {0xa1, 0x99, - 0xd4, 0xa4, 0x2f, 0x45, 0x06, 0xf8} }; - //3CEF354A-3B7A-4519-AD70-72A134698311 GUID gEblFileGuid =3D {0x3CEF354A, 0x3B7A, 0x4519, {0xAD, 0x70, 0x72, 0xA1, 0x34, 0x69, 0x83, 0x11} }; @@ -149,432 +143,6 @@ STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard =3D { } }; =20 -STATIC -UINT16 -GetBBSTypeFromFileSysPath ( - IN CHAR16 *UsbPathTxt, - IN CHAR16 *FileSysPathTxt, - IN EFI_DEVICE_PATH_PROTOCOL *FileSysPath - ) -{ - EFI_DEVICE_PATH_PROTOCOL *Node; - - if (StrnCmp (UsbPathTxt, FileSysPathTxt, StrLen (UsbPathTxt)) =3D=3D 0) { - Node =3D FileSysPath; - while (!IsDevicePathEnd (Node)) { - if ((DevicePathType (Node) =3D=3D MEDIA_DEVICE_PATH) && - (DevicePathSubType (Node) =3D=3D MEDIA_CDROM_DP)) { - return BBS_TYPE_CDROM; - } - Node =3D NextDevicePathNode (Node); - } - } - - return BBS_TYPE_UNKNOWN; -} - -STATIC -UINT16 -GetBBSTypeFromUsbPath ( - IN CONST EFI_DEVICE_PATH_PROTOCOL *UsbPath - ) -{ - EFI_STATUS Status; - EFI_HANDLE *FileSystemHandles; - UINTN NumberFileSystemHandles; - UINTN Index; - EFI_DEVICE_PATH_PROTOCOL *FileSysPath; - EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *DevPathToText; - CHAR16 *UsbPathTxt; - CHAR16 *FileSysPathTxt; - UINT16 Result; - - Status =3D gBS->LocateProtocol (&gEfiDevicePathToTextProtocolGuid, NULL,= (VOID **) &DevPathToText); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "Locate DevicePathToTextPro %r\n", Status)); - return BBS_TYPE_UNKNOWN; - } - - Result =3D BBS_TYPE_UNKNOWN; - UsbPathTxt =3D DevPathToText->ConvertDevicePathToText (UsbPath, TRUE, TR= UE); - if (UsbPathTxt =3D=3D NULL) { - return Result; - } - - Status =3D gBS->LocateHandleBuffer ( - ByProtocol, - &gEfiSimpleFileSystemProtocolGuid, - NULL, - &NumberFileSystemHandles, - &FileSystemHandles - ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "Locate SimpleFileSystemProtocol error(%r)\n", St= atus)); - FreePool (UsbPathTxt); - return BBS_TYPE_UNKNOWN; - } - - for (Index =3D 0; Index < NumberFileSystemHandles; Index++) { - FileSysPath =3D DevicePathFromHandle (FileSystemHandles[Index]); - FileSysPathTxt =3D DevPathToText->ConvertDevicePathToText (FileSysPath= , TRUE, TRUE); - - if (FileSysPathTxt =3D=3D NULL) { - continue; - } - - Result =3D GetBBSTypeFromFileSysPath (UsbPathTxt, FileSysPathTxt, File= SysPath); - FreePool (FileSysPathTxt); - - if (Result !=3D BBS_TYPE_UNKNOWN) { - break; - } - } - - if (NumberFileSystemHandles !=3D 0) { - FreePool (FileSystemHandles); - } - - FreePool (UsbPathTxt); - - return Result; -} - -STATIC -UINT16 -GetBBSTypeFromMessagingDevicePath ( - IN EFI_DEVICE_PATH_PROTOCOL *DevicePath, - IN EFI_DEVICE_PATH_PROTOCOL *Node - ) -{ - VENDOR_DEVICE_PATH *Vendor; - UINT16 Result; - - Result =3D BBS_TYPE_UNKNOWN; - - switch (DevicePathSubType (Node)) { - case MSG_MAC_ADDR_DP: - Result =3D BBS_TYPE_EMBEDDED_NETWORK; - break; - - case MSG_USB_DP: - Result =3D GetBBSTypeFromUsbPath (DevicePath); - if (Result =3D=3D BBS_TYPE_UNKNOWN) { - Result =3D BBS_TYPE_USB; - } - break; - - case MSG_SATA_DP: - Result =3D BBS_TYPE_HARDDRIVE; - break; - - case MSG_VENDOR_DP: - Vendor =3D (VENDOR_DEVICE_PATH *) (Node); - if ((&Vendor->Guid) !=3D NULL) { - if (CompareGuid (&Vendor->Guid, &((EFI_GUID) DEVICE_PATH_MESSAGING_S= AS))) { - Result =3D BBS_TYPE_HARDDRIVE; - } - } - break; - - default: - Result =3D BBS_TYPE_UNKNOWN; - break; - } - - return Result; -} - -STATIC -UINT16 -GetBBSTypeByDevicePath ( - IN EFI_DEVICE_PATH_PROTOCOL *DevicePath - ) -{ - EFI_DEVICE_PATH_PROTOCOL *Node; - UINT16 Result; - - Result =3D BBS_TYPE_UNKNOWN; - if (DevicePath =3D=3D NULL) { - return Result; - } - - Node =3D DevicePath; - while (!IsDevicePathEnd (Node)) { - switch (DevicePathType (Node)) { - case MEDIA_DEVICE_PATH: - if (DevicePathSubType (Node) =3D=3D MEDIA_CDROM_DP) { - Result =3D BBS_TYPE_CDROM; - } - break; - - case MESSAGING_DEVICE_PATH: - Result =3D GetBBSTypeFromMessagingDevicePath (DevicePath, Node); - break; - - default: - Result =3D BBS_TYPE_UNKNOWN; - break; - } - - if (Result !=3D BBS_TYPE_UNKNOWN) { - break; - } - - Node =3D NextDevicePathNode (Node); - } - - return Result; -} - -STATIC -EFI_STATUS -GetBmcBootOptionsSetting ( - OUT IPMI_GET_BOOT_OPTION *BmcBootOpt - ) -{ - EFI_STATUS Status; - - Status =3D IpmiCmdGetSysBootOptions (BmcBootOpt); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "Get iBMC BootOpts %r!\n", Status)); - return Status; - } - - if (BmcBootOpt->BootFlagsValid !=3D BOOT_OPTION_BOOT_FLAG_VALID) { - return EFI_NOT_FOUND; - } - - if (BmcBootOpt->Persistent) { - BmcBootOpt->BootFlagsValid =3D BOOT_OPTION_BOOT_FLAG_VALID; - } else { - BmcBootOpt->BootFlagsValid =3D BOOT_OPTION_BOOT_FLAG_INVALID; - } - - Status =3D IpmiCmdSetSysBootOptions (BmcBootOpt); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "Set iBMC BootOpts %r!\n", Status)); - } - - return Status; -} - -STATIC -VOID -RestoreBootOrder ( - VOID - ) -{ - EFI_STATUS Status; - UINT16 *BootOrder; - UINTN BootOrderSize; - - GetVariable2 (L"BootOrderBackup", &gOemBootVaraibleGuid, (VOID **) &Boot= Order, &BootOrderSize); - if (BootOrder =3D=3D NULL) { - return ; - } - - Print (L"Restore BootOrder(%d).\n", BootOrderSize / sizeof (UINT16)); - - Status =3D gRT->SetVariable ( - L"BootOrder", - &gEfiGlobalVariableGuid, - EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_A= CCESS | EFI_VARIABLE_NON_VOLATILE, - BootOrderSize, - BootOrder - ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "SetVariable BootOrder %r!\n", Status)); - } - - Status =3D gRT->SetVariable ( - L"BootOrderBackup", - &gOemBootVaraibleGuid, - EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLAT= ILE, - 0, - NULL - ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "SetVariable BootOrderBackup %r!\n", Status)); - } - - FreePool (BootOrder); - - return; -} - - -VOID -RestoreBootOrderOnReadyToBoot ( - IN EFI_EVENT Event, - IN VOID *Context - ) -{ - // restore BootOrder variable in normal condition. - RestoreBootOrder (); -} - -STATIC -VOID -UpdateBootOrder ( - IN UINT16 *NewOrder, - IN UINT16 *BootOrder, - IN UINTN BootOrderSize - ) -{ - EFI_STATUS Status; - EFI_EVENT Event; - - Status =3D gRT->SetVariable ( - L"BootOrderBackup", - &gOemBootVaraibleGuid, - EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLAT= ILE, - BootOrderSize, - BootOrder - ); - if (EFI_ERROR (Status)) { - return; - } - - Status =3D gRT->SetVariable ( - L"BootOrder", - &gEfiGlobalVariableGuid, - EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_A= CCESS | EFI_VARIABLE_NON_VOLATILE, - BootOrderSize, - NewOrder - ); - if (EFI_ERROR (Status)) { - return; - } - - // Register notify function to restore BootOrder variable on ReadyToBoot= Event. - Status =3D gBS->CreateEventEx ( - EVT_NOTIFY_SIGNAL, - TPL_CALLBACK, - RestoreBootOrderOnReadyToBoot, - NULL, - &gEfiEventReadyToBootGuid, - &Event - ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "Create ready to boot event %r!\n", Status)); - } - - return; -} - -STATIC -VOID -SetBootOrder ( - IN UINT16 BootType - ) -{ - UINT16 *NewOrder; - UINT16 *RemainBoots; - UINT16 *BootOrder; - UINTN BootOrderSize; - CHAR16 OptionName[sizeof ("Boot####")]; - UINTN Index; - LIST_ENTRY BootOptionList; - BDS_COMMON_OPTION *Option; - UINTN SelectCnt; - UINTN RemainCnt; - - InitializeListHead (&BootOptionList); - - GetEfiGlobalVariable2 (L"BootOrder", (VOID **) &BootOrder, &BootOrderSiz= e); - if (BootOrder =3D=3D NULL) { - return ; - } - - NewOrder =3D AllocatePool (BootOrderSize); - RemainBoots =3D AllocatePool (BootOrderSize); - if ((NewOrder =3D=3D NULL) || (RemainBoots =3D=3D NULL)) { - DEBUG ((DEBUG_ERROR, "Out of resources.")); - goto Exit; - } - - SelectCnt =3D 0; - RemainCnt =3D 0; - - for (Index =3D 0; Index < BootOrderSize / sizeof (UINT16); Index++) { - UnicodeSPrint (OptionName, sizeof (OptionName), L"Boot%04x", BootOrder= [Index]); - Option =3D BdsLibVariableToOption (&BootOptionList, OptionName); - if (Option =3D=3D NULL) { - DEBUG ((DEBUG_ERROR, "Boot%04x is invalid option!\n", BootOrder[Inde= x])); - continue; - } - - if (GetBBSTypeByDevicePath (Option->DevicePath) =3D=3D BootType) { - NewOrder[SelectCnt++] =3D BootOrder[Index]; - } else { - RemainBoots[RemainCnt++] =3D BootOrder[Index]; - } - } - - if (SelectCnt !=3D 0) { - // append RemainBoots to NewOrder - for (Index =3D 0; Index < RemainCnt; Index++) { - NewOrder[SelectCnt + Index] =3D RemainBoots[Index]; - } - - if (CompareMem (NewOrder, BootOrder, BootOrderSize) !=3D 0) { - UpdateBootOrder (NewOrder, BootOrder, BootOrderSize); - } - } - -Exit: - FreePool (BootOrder); - if (NewOrder !=3D NULL) { - FreePool (NewOrder); - } - if (RemainBoots !=3D NULL) { - FreePool (RemainBoots); - } - - return ; -} - -STATIC -VOID -HandleBmcBootType ( - VOID - ) -{ - EFI_STATUS Status; - IPMI_GET_BOOT_OPTION BmcBootOpt; - UINT16 BootType; - - Status =3D GetBmcBootOptionsSetting (&BmcBootOpt); - if (EFI_ERROR (Status)) { - return; - } - - Print (L"Boot Type from BMC is %x\n", BmcBootOpt.BootDeviceSelector); - - switch (BmcBootOpt.BootDeviceSelector) { - case ForcePxe: - BootType =3D BBS_TYPE_EMBEDDED_NETWORK; - break; - - case ForcePrimaryRemovableMedia: - BootType =3D BBS_TYPE_USB; - break; - - case ForceDefaultHardDisk: - BootType =3D BBS_TYPE_HARDDRIVE; - break; - - case ForceDefaultCD: - BootType =3D BBS_TYPE_CDROM; - break; - - default: - return; - } - - SetBootOrder (BootType); -} - // // BDS Platform Functions // diff --git a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBds= Lib.inf b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib= .inf index 0feec06..793c7dc 100644 --- a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf +++ b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf @@ -47,10 +47,10 @@ [LibraryClasses] BaseLib BaseMemoryLib + BmcConfigBootLib DebugLib DevicePathLib GenericBdsLib - IpmiCmdLib MemoryAllocationLib PcdLib PrintLib @@ -70,14 +70,12 @@ =20 [Guids] gEfiEndOfDxeEventGroupGuid - gEfiEventReadyToBootGuid gEfiFileInfoGuid gEfiFileSystemInfoGuid gEfiFileSystemVolumeLabelInfoIdGuid =20 [Protocols] gEfiDevicePathProtocolGuid - gEfiDevicePathToTextProtocolGuid gEfiGraphicsOutputProtocolGuid gEfiLoadedImageProtocolGuid gEfiPciRootBridgeIoProtocolGuid --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri May 3 09:52:25 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" From: Jason Zhang Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jason Zhang Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUp= dateConfig.ini | 45 +++++++++ Platform/Hisilicon/D03/D03.dsc = | 17 +++- Platform/Hisilicon/D03/D03.fdf = | 70 +++++++++++++ Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUp= dateConfig.ini | 45 +++++++++ Platform/Hisilicon/D05/D05.dsc = | 19 +++- Platform/Hisilicon/D05/D05.fdf = | 70 +++++++++++++ Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescripto= r.aslc | 81 +++++++++++++++ Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescripto= r.inf | 50 +++++++++ Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescripto= rPei.c | 70 +++++++++++++ Silicon/Hisilicon/Hisilicon.dsc.inc = | 11 +- Silicon/Hisilicon/Hisilicon.fdf.inc = | 9 ++ Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe= .c | 106 ++++++++++++++++++++ Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe= .inf | 51 ++++++++++ 13 files changed, 641 insertions(+), 3 deletions(-) diff --git a/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/Syst= emFirmwareUpdateConfig.ini b/Platform/Hisilicon/D03/Capsule/SystemFirmwareU= pdateConfig/SystemFirmwareUpdateConfig.ini new file mode 100644 index 0000000..fc834d9 --- /dev/null +++ b/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmw= areUpdateConfig.ini @@ -0,0 +1,45 @@ +# +# Copyright (c) 2018, Hisilicon Limited. All rights reserved. +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# Copyright (c) 2016, Intel Corporation. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may = be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# +## + +[Head] +NumOfUpdate =3D 3 +NumOfRecovery =3D 0 +Update0 =3D SysFvMain +Update1 =3D SysCustom +Update2 =3D SysNvRam + +[SysFvMain] +FirmwareType =3D 0 # 0 - SystemFirmware, 1 - NvRam +AddressType =3D 0 # 0 - relative address, 1 - absolute addre= ss. +BaseAddress =3D 0x00000000 # Base address offset on flash +Length =3D 0x002D0000 # Length +ImageOffset =3D 0x00000000 # Image offset of this SystemFirmware image +FileGuid =3D 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFi= rmwareFileGuid + +[SysCustom] +FirmwareType =3D 0 # 0 - SystemFirmware, 1 - NvRam +AddressType =3D 0 # 0 - relative address, 1 - absolute addre= ss. +BaseAddress =3D 0x002F0000 # Base address offset on flash +Length =3D 0x00010000 # Length +ImageOffset =3D 0x002F0000 # Image offset of this SystemFirmware image +FileGuid =3D 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFi= rmwareFileGuid + +[SysNvRam] +FirmwareType =3D 1 # 0 - SystemFirmware, 1 - NvRam +AddressType =3D 0 # 0 - relative address, 1 - absolute addre= ss. +BaseAddress =3D 0x002D0000 # Base address offset on flash +Length =3D 0x00020000 # Length +ImageOffset =3D 0x002D0000 # Image offset of this SystemFirmware image +FileGuid =3D 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFi= rmwareFileGuid diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index b2eae7d..69bc7b4 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -66,7 +66,6 @@ OemAddressMapLib|Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddre= ssMap2PHi1610.inf PlatformSysCtrlLib|Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi= 1610/PlatformSysCtrlLibHi1610.inf =20 - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLi= b.inf PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformInt= elBdsLib.inf !if $(GENERIC_BDS) =3D=3D TRUE @@ -117,6 +116,11 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE =20 +[PcdsDynamicExDefault.common.DEFAULT] + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor= |{0x0}|VOID*|0x100 + gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29,= 0x3d, 0x4b, 0xd3, 0x85, 0x00, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0x= c5, 0x04, 0x89} + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{0xcf,= 0x4f, 0x2e, 0x64, 0xf7, 0x2d, 0x15, 0x44, 0x8b, 0x70, 0xa0, 0x39, 0x09, 0x= c5, 0x7b, 0x55} + [PcdsFixedAtBuild.common] gArmPlatformTokenSpaceGuid.PcdCoreCount|8 =20 @@ -310,6 +314,8 @@ Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf =20 + Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescrip= tor.inf + MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCus= tomDecompressLib.inf @@ -410,6 +416,9 @@ =20 Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf =20 + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.= inf + MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf + # # FAT filesystem + GPT/MBR partitioning # @@ -483,6 +492,12 @@ !else IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf !endif + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.= inf { + + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/F= mpAuthenticationLibPkcs7.inf + } + + MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf =20 # # UEFI application (Shell Embedded Boot Loader) diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf index 0d704b5..ffddd2d 100644 --- a/Platform/Hisilicon/D03/D03.fdf +++ b/Platform/Hisilicon/D03/D03.fdf @@ -275,6 +275,8 @@ READ_LOCK_STATUS =3D TRUE INF Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf INF Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf =20 + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReport= Dxe.inf + INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf # # Build Shell from latest source code instead of prebuilt binary # @@ -336,12 +338,80 @@ READ_LOCK_STATUS =3D TRUE =20 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf =20 + INF RuleOverride =3D FMP_IMAGE_DESC Silicon/Hisilicon/Drivers/SystemFirm= wareDescriptor/SystemFirmwareDescriptor.inf + FILE FV_IMAGE =3D 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRE= D =3D TRUE { SECTION FV_IMAGE =3D FVMAIN } } =20 +[FV.CapsuleDispatchFv] +FvAlignment =3D 16 +ERASE_POLARITY =3D 1 +MEMORY_MAPPED =3D TRUE +STICKY_WRITE =3D TRUE +LOCK_CAP =3D TRUE +LOCK_STATUS =3D TRUE +WRITE_DISABLED_CAP =3D TRUE +WRITE_ENABLED_CAP =3D TRUE +WRITE_STATUS =3D TRUE +WRITE_LOCK_CAP =3D TRUE +WRITE_LOCK_STATUS =3D TRUE +READ_DISABLED_CAP =3D TRUE +READ_ENABLED_CAP =3D TRUE +READ_STATUS =3D TRUE +READ_LOCK_CAP =3D TRUE +READ_LOCK_STATUS =3D TRUE + + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdate= Dxe.inf + +[FV.SystemFirmwareUpdateCargo] +FvAlignment =3D 16 +ERASE_POLARITY =3D 1 +MEMORY_MAPPED =3D TRUE +STICKY_WRITE =3D TRUE +LOCK_CAP =3D TRUE +LOCK_STATUS =3D TRUE +WRITE_DISABLED_CAP =3D TRUE +WRITE_ENABLED_CAP =3D TRUE +WRITE_STATUS =3D TRUE +WRITE_LOCK_CAP =3D TRUE +WRITE_LOCK_STATUS =3D TRUE +READ_DISABLED_CAP =3D TRUE +READ_ENABLED_CAP =3D TRUE +READ_STATUS =3D TRUE +READ_LOCK_CAP =3D TRUE +READ_LOCK_STATUS =3D TRUE + + FILE RAW =3D 642e4fcf-2df7-4415-8b70-a03909c57b55 { # PcdEdkiiSystemFirm= wareFileGuid + FD =3D D03 + } + + FILE RAW =3D ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCap= suleDriverFvFileGuid + FV =3D CapsuleDispatchFv + } + + FILE RAW =3D 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCap= suleConfigFileGuid + Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwa= reUpdateConfig.ini + } + +[FmpPayload.FmpPayloadSystemFirmwarePkcs7] +IMAGE_HEADER_INIT_VERSION =3D 0x02 +IMAGE_TYPE_ID =3D d34b3d29-0085-4ab3-8be8-84188cc50489 # PcdSy= stemFmpCapsuleImageTypeIdGuid +IMAGE_INDEX =3D 0x1 +HARDWARE_INSTANCE =3D 0x0 +MONOTONIC_COUNT =3D 0x1 +CERTIFICATE_GUID =3D 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7 + + FV =3D SystemFirmwareUpdateCargo + +[Capsule.StyxFirmwareUpdateCapsuleFmpPkcs7] +CAPSULE_GUID =3D 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEf= iFmpCapsuleGuid +CAPSULE_HEADER_SIZE =3D 0x20 +CAPSULE_HEADER_INIT_VERSION =3D 0x1 + + FMP_PAYLOAD =3D FmpPayloadSystemFirmwarePkcs7 =20 !include Silicon/Hisilicon/Hisilicon.fdf.inc =20 diff --git a/Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/Syst= emFirmwareUpdateConfig.ini b/Platform/Hisilicon/D05/Capsule/SystemFirmwareU= pdateConfig/SystemFirmwareUpdateConfig.ini new file mode 100644 index 0000000..fc834d9 --- /dev/null +++ b/Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmw= areUpdateConfig.ini @@ -0,0 +1,45 @@ +# +# Copyright (c) 2018, Hisilicon Limited. All rights reserved. +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# Copyright (c) 2016, Intel Corporation. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may = be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# +## + +[Head] +NumOfUpdate =3D 3 +NumOfRecovery =3D 0 +Update0 =3D SysFvMain +Update1 =3D SysCustom +Update2 =3D SysNvRam + +[SysFvMain] +FirmwareType =3D 0 # 0 - SystemFirmware, 1 - NvRam +AddressType =3D 0 # 0 - relative address, 1 - absolute addre= ss. +BaseAddress =3D 0x00000000 # Base address offset on flash +Length =3D 0x002D0000 # Length +ImageOffset =3D 0x00000000 # Image offset of this SystemFirmware image +FileGuid =3D 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFi= rmwareFileGuid + +[SysCustom] +FirmwareType =3D 0 # 0 - SystemFirmware, 1 - NvRam +AddressType =3D 0 # 0 - relative address, 1 - absolute addre= ss. +BaseAddress =3D 0x002F0000 # Base address offset on flash +Length =3D 0x00010000 # Length +ImageOffset =3D 0x002F0000 # Image offset of this SystemFirmware image +FileGuid =3D 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFi= rmwareFileGuid + +[SysNvRam] +FirmwareType =3D 1 # 0 - SystemFirmware, 1 - NvRam +AddressType =3D 0 # 0 - relative address, 1 - absolute addre= ss. +BaseAddress =3D 0x002D0000 # Base address offset on flash +Length =3D 0x00020000 # Length +ImageOffset =3D 0x002D0000 # Image offset of this SystemFirmware image +FileGuid =3D 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFi= rmwareFileGuid diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index b89cea3..b99cda5 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -81,7 +81,6 @@ OemAddressMapLib|Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddr= essMapD05.inf PlatformSysCtrlLib|Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi= 1616/PlatformSysCtrlLibHi1616.inf =20 - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLi= b.inf PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformInt= elBdsLib.inf !if $(GENERIC_BDS) =3D=3D TRUE @@ -130,6 +129,11 @@ gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE =20 +[PcdsDynamicExDefault.common.DEFAULT] + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor= |{0x0}|VOID*|0x100 + gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29,= 0x3d, 0x4b, 0xd3, 0x85, 0x00, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0x= c5, 0x04, 0x89} + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{0xcf,= 0x4f, 0x2e, 0x64, 0xf7, 0x2d, 0x15, 0x44, 0x8b, 0x70, 0xa0, 0x39, 0x09, 0x= c5, 0x7b, 0x55} + [PcdsFixedAtBuild.common] gArmPlatformTokenSpaceGuid.PcdCoreCount|8 =20 @@ -448,6 +452,8 @@ Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf =20 + Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescrip= tor.inf + MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCus= tomDecompressLib.inf @@ -564,6 +570,9 @@ =20 Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf =20 + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.= inf + MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf + # # FAT filesystem + GPT/MBR partitioning # @@ -635,6 +644,14 @@ !else IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf !endif + + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.= inf { + + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/F= mpAuthenticationLibPkcs7.inf + } + + MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf + # # UEFI application (Shell Embedded Boot Loader) # diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index d209210..9a61c52 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -297,6 +297,8 @@ READ_LOCK_STATUS =3D TRUE INF Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf INF Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf =20 + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReport= Dxe.inf + INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf # # Build Shell from latest source code instead of prebuilt binary # @@ -361,12 +363,80 @@ READ_LOCK_STATUS =3D TRUE =20 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf =20 + INF RuleOverride =3D FMP_IMAGE_DESC Silicon/Hisilicon/Drivers/SystemFirm= wareDescriptor/SystemFirmwareDescriptor.inf + FILE FV_IMAGE =3D 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRE= D =3D TRUE { SECTION FV_IMAGE =3D FVMAIN } } =20 +[FV.CapsuleDispatchFv] +FvAlignment =3D 16 +ERASE_POLARITY =3D 1 +MEMORY_MAPPED =3D TRUE +STICKY_WRITE =3D TRUE +LOCK_CAP =3D TRUE +LOCK_STATUS =3D TRUE +WRITE_DISABLED_CAP =3D TRUE +WRITE_ENABLED_CAP =3D TRUE +WRITE_STATUS =3D TRUE +WRITE_LOCK_CAP =3D TRUE +WRITE_LOCK_STATUS =3D TRUE +READ_DISABLED_CAP =3D TRUE +READ_ENABLED_CAP =3D TRUE +READ_STATUS =3D TRUE +READ_LOCK_CAP =3D TRUE +READ_LOCK_STATUS =3D TRUE + + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdate= Dxe.inf + +[FV.SystemFirmwareUpdateCargo] +FvAlignment =3D 16 +ERASE_POLARITY =3D 1 +MEMORY_MAPPED =3D TRUE +STICKY_WRITE =3D TRUE +LOCK_CAP =3D TRUE +LOCK_STATUS =3D TRUE +WRITE_DISABLED_CAP =3D TRUE +WRITE_ENABLED_CAP =3D TRUE +WRITE_STATUS =3D TRUE +WRITE_LOCK_CAP =3D TRUE +WRITE_LOCK_STATUS =3D TRUE +READ_DISABLED_CAP =3D TRUE +READ_ENABLED_CAP =3D TRUE +READ_STATUS =3D TRUE +READ_LOCK_CAP =3D TRUE +READ_LOCK_STATUS =3D TRUE + + FILE RAW =3D 642e4fcf-2df7-4415-8b70-a03909c57b55 { # PcdEdkiiSystemFirm= wareFileGuid + FD =3D D05 + } + + FILE RAW =3D ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCap= suleDriverFvFileGuid + FV =3D CapsuleDispatchFv + } + + FILE RAW =3D 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCap= suleConfigFileGuid + Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwa= reUpdateConfig.ini + } + +[FmpPayload.FmpPayloadSystemFirmwarePkcs7] +IMAGE_HEADER_INIT_VERSION =3D 0x02 +IMAGE_TYPE_ID =3D d34b3d29-0085-4ab3-8be8-84188cc50489 # PcdSy= stemFmpCapsuleImageTypeIdGuid +IMAGE_INDEX =3D 0x1 +HARDWARE_INSTANCE =3D 0x0 +MONOTONIC_COUNT =3D 0x1 +CERTIFICATE_GUID =3D 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7 + + FV =3D SystemFirmwareUpdateCargo + +[Capsule.StyxFirmwareUpdateCapsuleFmpPkcs7] +CAPSULE_GUID =3D 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEf= iFmpCapsuleGuid +CAPSULE_HEADER_SIZE =3D 0x20 +CAPSULE_HEADER_INIT_VERSION =3D 0x1 + + FMP_PAYLOAD =3D FmpPayloadSystemFirmwarePkcs7 =20 !include Silicon/Hisilicon/Hisilicon.fdf.inc =20 diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmw= areDescriptor.aslc b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/Sys= temFirmwareDescriptor.aslc new file mode 100644 index 0000000..465535e --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDesc= riptor.aslc @@ -0,0 +1,81 @@ +/** @file + System Firmware descriptor. + + Copyright (c) 2018, Hisilicon Limited. All rights reserved. + Copyright (c) 2018, Linaro Limited. All rights reserved. + Copyright (c) 2016, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include +#include +#include + +#define PACKAGE_VERSION 0xFFFFFFFF +#define PACKAGE_VERSION_STRING L"Unknown" + +#define CURRENT_FIRMWARE_VERSION 0x00000002 +#define CURRENT_FIRMWARE_VERSION_STRING L"0x00000002" +#define LOWEST_SUPPORTED_FIRMWARE_VERSION 0x00000001 + +#define IMAGE_ID SIGNATURE_64('H','W','A', 'R',= 'M', '_', 'F', 'd') +#define IMAGE_ID_STRING L"ARMPlatformFd" + +// PcdSystemFmpCapsuleImageTypeIdGuid +#define IMAGE_TYPE_ID_GUID { 0xd34b3d29, 0x0085, 0x4ab3, = { 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89 } } + +typedef struct { + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR Descriptor; + // real string data + CHAR16 ImageIdNameStr[sizeof(IMAGE_ID_S= TRING) / sizeof(CHAR16)]; + CHAR16 VersionNameStr[sizeof(CURRENT_FI= RMWARE_VERSION_STRING) / sizeof(CHAR16)]; + CHAR16 PackageVersionNameStr[sizeof(PAC= KAGE_VERSION_STRING) / sizeof(CHAR16)]; +} IMAGE_DESCRIPTOR; + +IMAGE_DESCRIPTOR mImageDescriptor =3D +{ + { + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR_SIGNATURE, + sizeof (EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR), + sizeof (IMAGE_DESCRIPTOR), + PACKAGE_VERSION, // PackageVersi= on + OFFSET_OF (IMAGE_DESCRIPTOR, PackageVersionNameStr), // PackageVersi= onName + 1, // ImageIndex; + {0x0}, // Reserved + IMAGE_TYPE_ID_GUID, // ImageTypeId; + IMAGE_ID, // ImageId; + OFFSET_OF (IMAGE_DESCRIPTOR, ImageIdNameStr), // ImageIdName; + CURRENT_FIRMWARE_VERSION, // Version; + OFFSET_OF (IMAGE_DESCRIPTOR, VersionNameStr), // VersionName; + {0x0}, // Reserved2 + FixedPcdGet32 (PcdFdSize), // Size; + IMAGE_ATTRIBUTE_IMAGE_UPDATABLE | + IMAGE_ATTRIBUTE_RESET_REQUIRED | + IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED | + IMAGE_ATTRIBUTE_IN_USE, // AttributesSu= pported; + IMAGE_ATTRIBUTE_IMAGE_UPDATABLE | + IMAGE_ATTRIBUTE_RESET_REQUIRED | + IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED | + IMAGE_ATTRIBUTE_IN_USE, // AttributesSe= tting; + 0x0, // Compatibilit= ies; + LOWEST_SUPPORTED_FIRMWARE_VERSION, // LowestSuppor= tedImageVersion; + 0x00000000, // LastAttemptV= ersion; + 0, // LastAttemptS= tatus; + {0x0}, // Reserved3 + 0, // HardwareInst= ance; + }, + // real string data + {IMAGE_ID_STRING}, + {CURRENT_FIRMWARE_VERSION_STRING}, + {PACKAGE_VERSION_STRING}, +}; + +VOID* CONST ReferenceAcpiTable =3D &mImageDescriptor; diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmw= areDescriptor.inf b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/Syst= emFirmwareDescriptor.inf new file mode 100644 index 0000000..c38a809 --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDesc= riptor.inf @@ -0,0 +1,50 @@ +## @file +# System Firmware descriptor. +# +# Copyright (c) 2018, Hisilicon Limited. All rights reserved. +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# Copyright (c) 2016, Intel Corporation. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may = be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D SystemFirmwareDescriptor + FILE_GUID =3D 90B2B846-CA6D-4D6E-A8D3-C140A8E110AC + MODULE_TYPE =3D PEIM + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D SystemFirmwareDescriptorPeimEntry + +[Sources] + SystemFirmwareDescriptorPei.c + SystemFirmwareDescriptor.aslc + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + SignedCapsulePkg/SignedCapsulePkg.dec + +[LibraryClasses] + DebugLib + PcdLib + PeimEntryPoint + PeiServicesLib + +[FixedPcd] + gArmTokenSpaceGuid.PcdFdSize + +[Pcd] + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor + +[Depex] + TRUE diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmw= areDescriptorPei.c b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/Sys= temFirmwareDescriptorPei.c new file mode 100644 index 0000000..27c0a71 --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDesc= riptorPei.c @@ -0,0 +1,70 @@ +/** @file + System Firmware descriptor producer. + + Copyright (c) 2018, Hisilicon Limited. All rights reserved. + Copyright (c) 2018, Linaro Limited. All rights reserved. + Copyright (c) 2016, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include +#include +#include +#include +#include +#include + +/** + Entrypoint for SystemFirmwareDescriptor PEIM. + + @param[in] FileHandle Handle of the file being invoked. + @param[in] PeiServices Describes the list of possible PEI Services. + + @retval EFI_SUCCESS PPI successfully installed. +**/ +EFI_STATUS +EFIAPI +SystemFirmwareDescriptorPeimEntry ( + IN EFI_PEI_FILE_HANDLE FileHandle, + IN CONST EFI_PEI_SERVICES **PeiServices + ) +{ + EFI_STATUS Status; + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR *Descriptor; + UINTN Size; + UINTN Index; + UINT32 AuthenticationStatus; + + // + // Search RAW section. + // + + Index =3D 0; + while (TRUE) { + Status =3D PeiServicesFfsFindSectionData3 (EFI_SECTION_RAW, Index, Fil= eHandle, (VOID **)&Descriptor, &AuthenticationStatus); + if (EFI_ERROR (Status)) { + // Should not happen, must something wrong in FDF. + DEBUG ((DEBUG_ERROR, "Not found SystemFirmwareDescriptor in fdf !\n"= )); + return EFI_NOT_FOUND; + } + if (Descriptor->Signature =3D=3D EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTO= R_SIGNATURE) { + break; + } + Index++; + } + + DEBUG ((DEBUG_INFO, "EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR size - 0x%x\= n", Descriptor->Length)); + + Size =3D Descriptor->Length; + PcdSetPtrS (PcdEdkiiSystemFirmwareImageDescriptor, &Size, Descriptor); + + return EFI_SUCCESS; +} diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisili= con.dsc.inc index 308064b..dfa11d1 100644 --- a/Silicon/Hisilicon/Hisilicon.dsc.inc +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc @@ -104,6 +104,15 @@ ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf =20 + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeCapsuleLib.inf + OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf + IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAu= thenticationLibPkcs7.inf + EdkiiSystemCapsuleLib|SignedCapsulePkg/Library/EdkiiSystemCapsuleLib/Edk= iiSystemCapsuleLib.inf + IniParsingLib|SignedCapsulePkg/Library/IniParsingLib/IniParsingLib.inf + PlatformFlashAccessLib|Silicon/Hisilicon/Library/PlatformFlashAccessLib/= PlatformFlashAccessLibDxe.inf + # # It is not possible to prevent the ARM compiler for generic intrinsic f= unctions. # This library provides the instrinsic functions generate by a given com= piler. @@ -198,7 +207,7 @@ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAll= ocationLib.inf ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/R= untimeDxeReportStatusCodeLib.inf - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf SerialPortLib|Silicon/Hisilicon/Library/Dw8250SerialPortRuntimeLib/Dw825= 0SerialPortRuntimeLib.inf DebugLib|IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/= PeiDxeDebugLibReportStatusCode.inf =20 diff --git a/Silicon/Hisilicon/Hisilicon.fdf.inc b/Silicon/Hisilicon/Hisili= con.fdf.inc index ee87cd1..986dd75 100644 --- a/Silicon/Hisilicon/Hisilicon.fdf.inc +++ b/Silicon/Hisilicon/Hisilicon.fdf.inc @@ -76,6 +76,15 @@ } } =20 +[Rule.Common.PEIM.FMP_IMAGE_DESC] + FILE PEIM =3D $(NAMED_GUID) { + RAW BIN |.acpi + PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex + PE32 PE32 Align=3D4K $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING=3D"$(MODULE_NAME)" Optional + VERSION STRING=3D"$(INF_VERSION)" Optional BUILD_NUM=3D$(BUILD_NU= MBER) + } + [Rule.Common.DXE_CORE] FILE DXE_CORE =3D $(NAMED_GUID) { PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi diff --git a/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlash= AccessLibDxe.c b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformF= lashAccessLibDxe.c new file mode 100644 index 0000000..db5725d --- /dev/null +++ b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessL= ibDxe.c @@ -0,0 +1,106 @@ +/** @file + Platform Flash Access library. + + Copyright (c) 2018, Hisilicon Limited. All rights reserved. + Copyright (c) 2018, Linaro Limited. All rights reserved. + Copyright (c) 2016, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include +#include +#include +#include +#include +#include +#include +#include + +STATIC EFI_PHYSICAL_ADDRESS mInternalFdAddress; +STATIC EFI_PHYSICAL_ADDRESS mSFCMEM0BaseAddress; + +HISI_SPI_FLASH_PROTOCOL *mSpiProtocol; + +/** + Perform flash write opreation. + + @param[in] FirmwareType The type of firmware. + @param[in] FlashAddress The address of flash device to be accessed. + @param[in] FlashAddressType The type of flash device address. + @param[in] Buffer The pointer to the data buffer. + @param[in] Length The length of data buffer in bytes. + + @retval EFI_SUCCESS The operation returns successfully. + @retval EFI_WRITE_PROTECTED The flash device is read only. + @retval EFI_UNSUPPORTED The flash device access is unsupported. + @retval EFI_INVALID_PARAMETER The input parameter is not valid. +**/ +EFI_STATUS +EFIAPI +PerformFlashWrite ( + IN PLATFORM_FIRMWARE_TYPE FirmwareType, + IN EFI_PHYSICAL_ADDRESS FlashAddress, + IN FLASH_ADDRESS_TYPE FlashAddressType, + IN VOID *Buffer, + IN UINTN Length + ) +{ + UINT32 RomAddress; + EFI_STATUS Status; + + DEBUG ((DEBUG_INFO, "PerformFlashWrite - 0x%x(%x) - 0x%x\n", (UINTN)Flas= hAddress, (UINTN)FlashAddressType, Length)); + + if (FlashAddressType =3D=3D FlashAddressTypeAbsoluteAddress) { + FlashAddress =3D FlashAddress - mInternalFdAddress; + } + + RomAddress =3D (UINT32)FlashAddress + (mInternalFdAddress - mSFCMEM0Base= Address); + + DEBUG ((DEBUG_INFO, "Erase and Write Flash Start\n")); + + Status =3D mSpiProtocol->EraseWrite (mSpiProtocol, (UINT32) RomAddress, = (UINT8 *)Buffer, (UINT32) Length); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Erase and Write Status =3D %r \n", Status)); + } + + return Status; +} + +/** + Platform Flash Access Lib Constructor. + + @param[in] ImageHandle The firmware allocated handle for the EFI = image. + @param[in] SystemTable A pointer to the EFI System Table. + + @retval EFI_SUCCESS Constructor returns successfully. +**/ +EFI_STATUS +EFIAPI +PerformFlashAccessLibConstructor ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + mInternalFdAddress =3D (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet64 (PcdFdBase= Address); + + mSFCMEM0BaseAddress =3D (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet64 (PcdSFCME= M0BaseAddress); + + DEBUG ((DEBUG_INFO, "PcdFlashAreaBaseAddress - 0x%x, PcdSFCMEM0BaseAddre= ss - 0x%x \n", mInternalFdAddress, mSFCMEM0BaseAddress)); + + Status =3D gBS->LocateProtocol (&gHisiSpiFlashProtocolGuid, NULL, (VOID = **)&mSpiProtocol); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "LocateProtocol gHisiSpiFlashProtocolGuid Status = =3D %r \n", Status)); + } + + return Status; +} diff --git a/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlash= AccessLibDxe.inf b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/Platfor= mFlashAccessLibDxe.inf new file mode 100644 index 0000000..f4533ac --- /dev/null +++ b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessL= ibDxe.inf @@ -0,0 +1,51 @@ +## @file +# Platform Flash Access library. +# +# Copyright (c) 2018, Hisilicon Limited. All rights reserved. +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# Copyright (c) 2016, Intel Corporation. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may = be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D PlatformFlashAccessLibDxe + FILE_GUID =3D 9168384A-5F66-4CF7-AEB6-845BDEBD3012 + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D PlatformFlashAccessLib|DXE_DRIVER + CONSTRUCTOR =3D PerformFlashAccessLibConstructor + +[Sources] + PlatformFlashAccessLibDxe.c + +[Packages] + ArmPkg/ArmPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + SignedCapsulePkg/SignedCapsulePkg.dec + Silicon/Hisilicon/HisiPkg.dec + +[LibraryClasses] + BaseMemoryLib + DebugLib + PcdLib + UefiBootServicesTableLib + +[Protocols] + gHisiSpiFlashProtocolGuid + +[FixedPcd] + gArmTokenSpaceGuid.PcdFdBaseAddress + gHisiTokenSpaceGuid.PcdSFCMEM0BaseAddress + +[Depex] + gHisiSpiFlashProtocolGuid --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri May 3 09:52:25 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Thu, 18 Jan 2018 07:02:07 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::242; helo=mail-pf0-x242.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SfU+KhLij4/G58sKgYjNWWuAxDOUWfOuEBUnROUet1I=; b=hprKgPcktbiRS7LV6H3y+aR0qmvmLr47NViTlnbAcj11DaD47YTMgy75edvX1Od24S l/o+hhlmt9QOFV4jBTK/m7GlHI/+SuFTpLvW7Ax5HpLYJX8FPHoA42d6DNrtXMpZd1bP KZvUWw2vdutREv9GcOo7lP79d2sgnVoPuLM1s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; 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charset="utf-8" From: Jason Zhang Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jason Zhang Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Platform/Hisilicon/D03/D03.dsc | 2 +- Platform/Hisilicon/D03/D03.fdf | 3 +- Platform/Hisilicon/D05/D05.dsc | 1 + Platform/Hisilicon/D05/D05.fdf | 2 +- Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c | 89 ++++++++++++= ++++++++ Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h | 49 +++++++++++ Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf | 61 ++++++++++++= ++ Silicon/Hisilicon/HisiPkg.dec | 2 + Silicon/Hisilicon/Include/Library/OemDevicePath.h | 54 ++++++++++++ Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h | 11 +++ 10 files changed, 270 insertions(+), 4 deletions(-) diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index 69bc7b4..370e17b 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -474,7 +474,7 @@ Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugD= idVidToBmc.inf Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.inf Platform/Hisilicon/D03/Drivers/Sm750Dxe/UefiSmi.inf - + Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf =20 =20 diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf index ffddd2d..6e43228 100644 --- a/Platform/Hisilicon/D03/D03.fdf +++ b/Platform/Hisilicon/D03/D03.fdf @@ -271,8 +271,7 @@ READ_LOCK_STATUS =3D TRUE # VGA Driver # INF Platform/Hisilicon/D03/Drivers/Sm750Dxe/UefiSmi.inf - - INF Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf + INF Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf INF Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf =20 INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReport= Dxe.inf diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index b99cda5..0d19909 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -627,6 +627,7 @@ Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugD= idVidToBmc.inf Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.inf Platform/Hisilicon/D05/Drivers/Sm750Dxe/UefiSmi.inf + Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf =20 diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index 9a61c52..9edc679 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -294,7 +294,7 @@ READ_LOCK_STATUS =3D TRUE # INF Platform/Hisilicon/D05/Drivers/Sm750Dxe/UefiSmi.inf INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf - INF Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf + INF Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf INF Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf =20 INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReport= Dxe.inf diff --git a/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c b/Silicon/= Hisilicon/Drivers/SasPlatform/SasPlatform.c new file mode 100644 index 0000000..d57905e --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c @@ -0,0 +1,89 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + + +#include "SasPlatform.h" +#include +#include + +#define SAS0BusAddr 0xc3000000 +#define SAS1BusAddr 0xa2000000 +#define SAS2BusAddr 0xa3000000 + +#define SAS0ResetAddr 0xc0000000 +#define SAS1ResetAddr 0xa0000000 +#define SAS2ResetAddr 0xa0000000 + +HISI_PLATFORM_SAS_PROTOCOL mSasPlatformProtocol[] =3D { + { + 0, + FALSE, + SAS0BusAddr, + SAS0ResetAddr + }, + { + 1, + TRUE, + SAS1BusAddr, + SAS1ResetAddr + }, + { + 2, + FALSE, + SAS2BusAddr, + SAS2ResetAddr + } +}; +#define SAS_CONTROLLER_NUMBER sizeof (mSasPlatformProtocol) / sizeof (H= ISI_PLATFORM_SAS_PROTOCOL) + +EFI_STATUS +EFIAPI +SasPlatformInitialize ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + UINTN Loop; + SAS_PLATFORM_INSTANCE *PrivateData; + EFI_STATUS Status; + + for (Loop =3D 0; Loop < SAS_CONTROLLER_NUMBER; Loop++) { + if (mSasPlatformProtocol[Loop].Enable !=3D TRUE) { + continue; + } + PrivateData =3D AllocateZeroPool (sizeof(SAS_PLATFORM_INSTANCE)); + if (PrivateData =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + + PrivateData->SasPlatformProtocol =3D mSasPlatformProtocol[Loop]; + + Status =3D gBS->InstallMultipleProtocolInterfaces ( + &PrivateData->Handle, + &gHisiPlatformSasProtocolGuid, + &PrivateData->SasPlatformProtocol, + NULL + ); + if (EFI_ERROR (Status)) { + FreePool (PrivateData); + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] InstallProtocolInterface fail. %r\n= ", __FUNCTION__, __LINE__, Status)); + return Status; + } + } + + DEBUG ((DEBUG_INFO, "sas platform init dirver Ok!!!\n")); + return EFI_SUCCESS; +} + diff --git a/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h b/Silicon/= Hisilicon/Drivers/SasPlatform/SasPlatform.h new file mode 100644 index 0000000..a3e99dd --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h @@ -0,0 +1,49 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + + + +#ifndef _SAS_PLATFORM_H_ +#define _SAS_PLATFORM_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + + + +typedef struct { + UINTN Signature; + EFI_HANDLE Handle; + HISI_PLATFORM_SAS_PROTOCOL SasPlatformProtocol; +} SAS_PLATFORM_INSTANCE; + + +#endif // _SAS_PLATFORM_H_ + diff --git a/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf b/Silico= n/Hisilicon/Drivers/SasPlatform/SasPlatform.inf new file mode 100644 index 0000000..6237f50 --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf @@ -0,0 +1,61 @@ +#/** @file +# +# Copyright (c) 2017, Hisilicon Limited. All rights reserved. +# Copyright (c) 2017, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the= BSD License +# which accompanies this distribution. The full text of the license may= be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR = IMPLIED. +# +#**/ + +[Defines] + INF_VERSION =3D 0x00010019 + BASE_NAME =3D SasPlatform + FILE_GUID =3D 67B9CDE8-257D-44f9-9DE7-39DE866E3539 + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D SasPlatformInitialize + +[Sources] + SasPlatform.h + SasPlatform.c + +[Packages] + ArmPkg/ArmPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/Hisilicon/HisiPkg.dec + +[FeaturePcd] + + +[LibraryClasses] + ArmLib + BaseLib + BaseMemoryLib + CacheMaintenanceLib + DebugLib + DxeServicesTableLib + IoLib + MemoryAllocationLib + PcdLib + PlatformSysCtrlLib + ReportStatusCodeLib + UefiBootServicesTableLib + UefiDriverEntryPoint + UefiLib + +[Guids] + gEfiHisiSocControllerGuid + +[Protocols] + gHisiPlatformSasProtocolGuid + gEfiDevicePathProtocolGuid + +[Depex] + TRUE diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec index 81ba3be..9fa94fd 100644 --- a/Silicon/Hisilicon/HisiPkg.dec +++ b/Silicon/Hisilicon/HisiPkg.dec @@ -37,12 +37,14 @@ gBmcInfoProtocolGuid =3D {0x43fa6ffd, 0x35e4, 0x479e, {0xab, 0xec, 0x5, = 0x3, 0xf6, 0x48, 0x0, 0xf5}} gSataEnableFlagProtocolGuid =3D {0xc2b3c770, 0x8b4a, 0x4796, {0xb2, 0xcf= , 0x1d, 0xee, 0x44, 0xd0, 0x32, 0xf3}} gPlatformSasProtocolGuid =3D {0x40e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0= x45, 0x7d, 0x13, 0x50, 0x96, 0x5d}} + gHisiPlatformSasProtocolGuid =3D {0x20e9829f, 0x3a2c, 0x479a, {0x9a, 0x9= 3, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x6d}} =20 [Guids] gHisiTokenSpaceGuid =3D {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87, = 0xf7, 0x7c, 0xfd, 0x52, 0x1d}} =20 gHisiEfiMemoryMapGuid =3D {0xf8870015, 0x6994, 0x4b98, {0x95, 0xa2, 0xb= d, 0x56, 0xda, 0x91, 0xc0, 0x7f}} gVersionInfoHobGuid =3D {0xe13a14c, 0x859c, 0x4f22, {0x82, 0xbd, 0x18, 0= xe, 0xe1, 0x42, 0x12, 0xbf}} + gEfiHisiSocControllerGuid =3D {0xee369cc3, 0xa743, 0x5382, {0x75, 0x64, = 0x53, 0xe4, 0x31, 0x19, 0x38, 0x35}} =20 [LibraryClasses] PlatformSysCtrlLib|Include/Library/PlatformSysCtrlLib.h diff --git a/Silicon/Hisilicon/Include/Library/OemDevicePath.h b/Silicon/Hi= silicon/Include/Library/OemDevicePath.h new file mode 100644 index 0000000..ec8cd02 --- /dev/null +++ b/Silicon/Hisilicon/Include/Library/OemDevicePath.h @@ -0,0 +1,54 @@ +/** @file +* +* Copyright (c) 2015 - 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2015 - 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#ifndef _OEM_DEVICE_PATH_H_ +#define _OEM_DEVICE_PATH_H_ +#include + +typedef enum +{ + C_NIC =3D 1, + C_SATA =3D 2, + C_SAS =3D 3, + C_USB =3D 4, +} CONTROLLER_TYPE; + +typedef struct{ + VENDOR_DEVICE_PATH Vender; + UINT8 ControllerType; + UINT8 Socket; + UINT8 Port; +} EXT_VENDOR_DEVICE_PATH; + +typedef struct{ + UINT16 BootIndex; + UINT16 Port; +}SATADES; + +typedef struct{ + UINT16 BootIndex; + UINT16 ParentPortNumber; + UINT16 InterfaceNumber; +}USBDES; + +typedef struct{ + UINT16 BootIndex; + UINT16 Port; +}PXEDES; + +extern EFI_GUID gEfiHisiSocControllerGuid; + +#endif + diff --git a/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h b/Sil= icon/Hisilicon/Include/Protocol/PlatformSasProtocol.h index 1e1892b..dbd215a 100644 --- a/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h +++ b/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h @@ -34,4 +34,15 @@ struct _PLATFORM_SAS_PROTOCOL { SAS_INIT Init; }; =20 +typedef struct _HISI_PLATFORM_SAS_PROTOCOL HISI_PLATFORM_SAS_PROTOCOL; + +struct _HISI_PLATFORM_SAS_PROTOCOL { + UINT32 ControllerId; + BOOLEAN Enable; + UINT64 BaseAddr; + UINT64 ResetAddr; +}; + +extern EFI_GUID gHisiPlatformSasProtocolGuid; + #endif --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri May 3 09:52:25 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1516287742604101.85923966179371; Thu, 18 Jan 2018 07:02:22 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id D4BFC2232BE06; Thu, 18 Jan 2018 06:56:50 -0800 (PST) Received: from mail-pf0-x244.google.com (mail-pf0-x244.google.com [IPv6:2607:f8b0:400e:c00::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1C93A221F93B6 for ; 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charset="utf-8" From: Jason Zhang 1. Open driver source code. 2. This code includes network sequence correction solution. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jason Zhang Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Platform/Hisilicon/D03/D03.dsc | 2 + Platform/Hisilicon/D03/D03.fdf | 2 +- Platform/Hisilicon/D05/D05.dsc | 2 + Platform/Hisilicon/D05/D05.fdf | 3 +- Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c | 99 ++++++++++++= ++++++++ Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h | 43 +++++++++ Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf | 60 ++++++++++++ Silicon/Hisilicon/HisiPkg.dec | 1 + Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h | 32 +++++++ 9 files changed, 241 insertions(+), 3 deletions(-) diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index 370e17b..b22afe3 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -404,6 +404,8 @@ =20 Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.inf =20 + Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf + MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf index 6e43228..e93985b 100644 --- a/Platform/Hisilicon/D03/D03.fdf +++ b/Platform/Hisilicon/D03/D03.fdf @@ -242,7 +242,7 @@ READ_LOCK_STATUS =3D TRUE #Network # =20 - INF Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf + INF Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf INF Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf =20 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 0d19909..4e19de2 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -541,6 +541,8 @@ =20 Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf =20 + Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf + MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index 9edc679..9873677 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -247,8 +247,7 @@ READ_LOCK_STATUS =3D TRUE # #Network # - - INF Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf + INF Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf INF Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf =20 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf diff --git a/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c b/Silicon/= Hisilicon/Drivers/SnpPlatform/SnpPlatform.c new file mode 100644 index 0000000..385c04a --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c @@ -0,0 +1,99 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + + +#include "SnpPlatform.h" + + HISI_PLATFORM_SNP_PROTOCOL mSnpPlatformProtocol[] =3D { + { + 4, + 1 + }, + { + 5, + 1 + }, + { + 2, + 0 + }, + { + 3, + 0 + }, + { + 0, + 1 + }, + { + 1, + 1 + }, + { + 6, + 0 + }, + { + 7, + 0 + } +}; + +#define SNP_CONTROLLER_NUMBER sizeof (mSnpPlatformProtocol) / = sizeof (HISI_PLATFORM_SNP_PROTOCOL) + +EFI_STATUS +EFIAPI +SnpPlatformInitialize ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + UINTN Loop; + SNP_PLATFORM_INSTANCE *PrivateData; + EFI_STATUS Status; + + for (Loop =3D 0; Loop < SNP_CONTROLLER_NUMBER; Loop++) { + if(mSnpPlatformProtocol[Loop].Enable !=3D 1) { + continue; + } + PrivateData =3D AllocateZeroPool (sizeof(SNP_PLATFORM_INSTANCE)); + if (PrivateData =3D=3D NULL) { + DEBUG ((DEBUG_INFO,"SnpPlatformInitialize error 1\n")); + return EFI_OUT_OF_RESOURCES; + } + + + PrivateData->SnpPlatformProtocol =3D mSnpPlatformProtocol[Loop]; + + // + // Install the snp protocol, device path protocol + // + Status =3D gBS->InstallMultipleProtocolInterfaces ( + &PrivateData->Handle, + &gHisiSnpPlatformProtocolGuid, + &PrivateData->SnpPlatformProtocol, + NULL + ); + if (EFI_ERROR (Status)) { + FreePool (PrivateData); + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] InstallProtocolInterface fail. %r\n= ", __FUNCTION__, __LINE__, Status)); + return Status; + } + } + + DEBUG ((DEBUG_INFO,"SnpPlatformInitialize succes!\n")); + + return EFI_SUCCESS; +} diff --git a/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h b/Silicon/= Hisilicon/Drivers/SnpPlatform/SnpPlatform.h new file mode 100644 index 0000000..031c8d3 --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h @@ -0,0 +1,43 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + + + +#ifndef _SNP_PLATFORM_H_ +#define _SNP_PLATFORM_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +typedef struct { + UINTN Signature; + EFI_HANDLE Handle; + HISI_PLATFORM_SNP_PROTOCOL SnpPlatformProtocol; +} SNP_PLATFORM_INSTANCE; +#endif diff --git a/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf b/Silico= n/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf new file mode 100644 index 0000000..804224b --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf @@ -0,0 +1,60 @@ +#/** @file +# +# Copyright (c) 2017, Hisilicon Limited. All rights reserved. +# Copyright (c) 2017, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the= BSD License +# which accompanies this distribution. The full text of the license may= be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR = IMPLIED. +# +#**/ + +[Defines] + INF_VERSION =3D 0x00010019 + BASE_NAME =3D SnpPlatform + FILE_GUID =3D 102D8FC9-20A4-42eb-AC14-1C98BA5B17A8 + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D SnpPlatformInitialize + +[Sources] + SnpPlatform.h + SnpPlatform.c + +[Packages] + ArmPkg/ArmPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Silicon/Hisilicon/HisiPkg.dec + +[FeaturePcd] + + +[LibraryClasses] + ArmLib + BaseLib + BaseMemoryLib + CacheMaintenanceLib + DebugLib + DxeServicesTableLib + IoLib + MemoryAllocationLib + PlatformSysCtrlLib + PcdLib + ReportStatusCodeLib + UefiLib + UefiBootServicesTableLib + UefiDriverEntryPoint + +[Guids] + +[Protocols] + gHisiSnpPlatformProtocolGuid + +[Depex] + TRUE + diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec index 9fa94fd..2bb6518 100644 --- a/Silicon/Hisilicon/HisiPkg.dec +++ b/Silicon/Hisilicon/HisiPkg.dec @@ -38,6 +38,7 @@ gSataEnableFlagProtocolGuid =3D {0xc2b3c770, 0x8b4a, 0x4796, {0xb2, 0xcf= , 0x1d, 0xee, 0x44, 0xd0, 0x32, 0xf3}} gPlatformSasProtocolGuid =3D {0x40e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0= x45, 0x7d, 0x13, 0x50, 0x96, 0x5d}} gHisiPlatformSasProtocolGuid =3D {0x20e9829f, 0x3a2c, 0x479a, {0x9a, 0x9= 3, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x6d}} + gHisiSnpPlatformProtocolGuid =3D {0x81321f27, 0xff58, 0x4a1d, {0x99, 0x9= 7, 0xd, 0xcc, 0xfa, 0x82, 0xf4, 0x6f}} =20 [Guids] gHisiTokenSpaceGuid =3D {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87, = 0xf7, 0x7c, 0xfd, 0x52, 0x1d}} diff --git a/Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h b/Sil= icon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h new file mode 100644 index 0000000..0d9f0b4 --- /dev/null +++ b/Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h @@ -0,0 +1,32 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#ifndef _SNP_PLATFORM_PROTOCOL_H_ +#define _SNP_PLATFORM_PROTOCOL_H_ +#define HISI_SNP_PLATFORM_PROTOCOL_GUID \ + { \ + 0x81321f27, 0xff58, 0x4a1d, 0x99, 0x97, 0xd, 0xcc, 0xfa, 0x82, 0xf4, 0= x6f \ + } + +typedef struct _HISI_PLATFORM_SNP_PROTOCOL HISI_PLATFORM_SNP_PROTOCOL; + +struct _HISI_PLATFORM_SNP_PROTOCOL { + UINT32 ControllerId; + UINT32 Enable; +}; + +extern EFI_GUID gHisiSnpPlatformProtocolGuid; + +#endif --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri May 3 09:52:25 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1516287748364339.15879785914035; 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Thu, 18 Jan 2018 07:02:13 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 18 Jan 2018 23:01:36 +0800 Message-Id: <1516287703-35516-8-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516287703-35516-1-git-send-email-huangming23@huawei.com> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> Subject: [edk2] [PATCH edk2-platforms v1 07/14] Hisilicon/Smbios: modify type 4 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" modify processorFamily of type 4 to ProcessorFamilyIndicatorFamily2, indicator to obtain the processor family from the Processor Family 2 field. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo Reviewed-by: Ard Biesheuvel --- Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c = | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/Processo= rSubClass.c b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/Process= orSubClass.c index 61473e8..c9903ba 100644 --- a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubCla= ss.c +++ b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubCla= ss.c @@ -125,7 +125,7 @@ SMBIOS_TABLE_TYPE4 mSmbiosProcessorTable[] =3D { }, 1, //Socket CentralProcessor, //ProcessorType - ProcessorFamilyOther, //ProcessorFamily + ProcessorFamilyIndicatorFamily2, //ProcessorFamily 2, //ProcessorManufac= ture { //ProcessorId { //Signature @@ -172,7 +172,7 @@ SMBIOS_TABLE_TYPE4 mSmbiosProcessorTable[] =3D { }, 1, //Socket CentralProcessor, //ProcessorType - ProcessorFamilyOther, //ProcessorFamily + ProcessorFamilyIndicatorFamily2, //ProcessorFamily 2, //ProcessorManufac= ture { //ProcessorId { //Signature --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri May 3 09:52:25 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Thu, 18 Jan 2018 07:02:16 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::243; helo=mail-pf0-x243.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=JttdTKxDx6zRdn9QTFDmKkXWxv3StsH9DISUOfgxk+0=; b=Z3kxxnuuRppdCGRFDdAyE1A70KPSsvGUb7+hDTgf705XNMMapyi3wpLZu4o5B6xBqA mTwc0WSTDLCWxeFFBvQWUzgeYBAcsjlAjqz0Ixw2w8o7iPh2MuoJmBiN1Mwy3aEm58ti ox3akXh/JNzVAQ9KAb84gKfvuVefRPi4odQvQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; 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charset="utf-8" From: Yan Zhang In order to replace command line parameter pcie_aspm=3Doff, BIOS needs to disable Pcie Aspm support during Pcie initilization. D03 and D05 do not support PCIe ASPM, so we disable it in BIOS. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo Signed-off-by: Yan Zhang --- Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c | 71 +++++++++= +++++++++++ Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h | 2 + Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h | 2 + 3 files changed, 75 insertions(+) diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c b/= Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c index f420c91..ca3b2f8 100644 --- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c +++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c @@ -1033,6 +1033,74 @@ DisableRcOptionRom ( return; } =20 +VOID +PcieDbiCs2Enable( + IN UINT32 HostBridgeNum, + IN UINT32 Port, + IN BOOLEAN Val + ) +{ + UINT32 RegVal; + RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_SUBCTRL_SC= _PCIE_SYS_CTRL21, RegVal); + if (Val) { + RegVal =3D RegVal | BIT2; + /*BIT2: DBI Chip Select indicator. 0 indicates CS, 1 indicates CS2.*/ + } else { + RegVal =3D RegVal & (~BIT2); + } + RegWrite (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_SUBCTRL_S= C_PCIE_SYS_CTRL21, RegVal); +} + +BOOLEAN +PcieDBIReadOnlyWriteEnable( + IN UINT32 HostBridgeNum, + IN UINT32 Port + ) +{ + UINT32 Val; + RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_DBI_READ_O= NLY_WRITE_ENABLE, Val); + if (Val =3D=3D 0x1) { + return TRUE; + } else { + RegWrite (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_DBI_REA= D_ONLY_WRITE_ENABLE, 0x1); + /*Delay 10us to make sure the PCIE device have enouph time to response= . */ + MicroSecondDelay(10); + RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_DBI_READ= _ONLY_WRITE_ENABLE, Val); + if (Val =3D=3D 0x1) { + return TRUE; + } + } + DEBUG ((DEBUG_ERROR,"PcieDBIReadOnlyWriteEnable Fail!!!\n")); + return FALSE; +} +VOID +SwitchPcieASPMSupport ( + IN UINT32 HostBridgeNum, + IN UINT32 Port, + IN UINT8 Val + ) +{ + PCIE_EP_PCIE_CAP3_U pcie_cap3; + + if (Port >=3D PCIE_MAX_ROOTBRIDGE) { + DEBUG ((DEBUG_ERROR, "Port is not valid\n")); + return; + } + if (!PcieDBIReadOnlyWriteEnable (HostBridgeNum, Port)) { + DEBUG ((DEBUG_INFO, "PcieDeEmphasisLevelSet ReadOnly Reg do not Enable= !!!\n")); + return; + } + PcieDbiCs2Enable (HostBridgeNum, Port, FALSE); + + RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_EP_PCIE_CA= P3_REG, pcie_cap3.UInt32); + pcie_cap3.Bits.active_state_power_management =3D Val; + RegWrite (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_EP_PCIE_C= AP3_REG, pcie_cap3.UInt32); + RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_EP_PCIE_CA= P3_REG, pcie_cap3.UInt32); + DEBUG ((DEBUG_INFO, "ASPI active state power management: %d\n", pcie_cap= 3.Bits.active_state_power_management)); + + PcieDbiCs2Enable (HostBridgeNum, Port, TRUE); +} + EFI_STATUS EFIAPI PciePortInit ( @@ -1090,6 +1158,9 @@ PciePortInit ( /* disable link up interrupt */ (VOID)PcieMaskLinkUpInit(soctype, HostBridgeNum, PortIndex); =20 + //disable ASPM + SwitchPcieASPMSupport (HostBridgeNum, PortIndex, PCIE_ASPM_DISABLE); + /* Pcie Equalization*/ (VOID)PcieEqualization(soctype ,HostBridgeNum, PortIndex); =20 diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h b/= Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h index 9a0f636..e96c53c 100644 --- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h +++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h @@ -77,6 +77,8 @@ #define RegWrite(addr,data) MmioWrite32((addr), (data)) #define RegRead(addr,data) ((data) =3D MmioRead32 (addr)) =20 +#define PCIE_ASPM_DISABLE 0x0 +#define PCIE_ASPM_ENABLE 0x1 =20 typedef struct tagPcieDebugInfo { diff --git a/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h b/Silicon= /Hisilicon/Include/Regs/HisiPcieV1RegOffset.h index bf57652..c8b9781 100644 --- a/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h +++ b/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h @@ -135,6 +135,7 @@ #define PCIE_EEP_PORTLOGIC53_REG (0x888) #define PCIE_EEP_GEN3_CONTRL_REG (0x890) #define PCIE_EEP_PIPE_LOOPBACK_REG (0x8B8) +#define PCIE_DBI_READ_ONLY_WRITE_ENABLE (0x8BC) #define PCIE_EEP_PORTLOGIC54_REG (0x900) #define PCIE_EEP_PORTLOGIC55_REG (0x904) #define PCIE_EEP_PORTLOGIC56_REG (0x908) @@ -12556,6 +12557,7 @@ typedef union tagPortlogic93 #define PCIE_SUBCTRL_SC_DISPATCH_DAW_ARRAY5_REG (PCIE_SUBCTRL_B= ASE + 0x1018) #define PCIE_SUBCTRL_SC_DISPATCH_DAW_ARRAY6_REG (PCIE_SUBCTRL_B= ASE + 0x101C) #define PCIE_SUBCTRL_SC_DISPATCH_DAW_ARRAY7_REG (PCIE_SUBCTRL_B= ASE + 0x1020) +#define PCIE_SUBCTRL_SC_PCIE_SYS_CTRL21 (PCIE_SUBCTRL_B= ASE + 0x1024) #define PCIE_SUBCTRL_SC_DISPATCH_RETRY_CONTROL_REG (PCIE_SUBCTRL_B= ASE + 0x1030) #define PCIE_SUBCTRL_SC_DISPATCH_INTMASK_REG (PCIE_SUBCTRL_B= ASE + 0x1100) #define PCIE_SUBCTRL_SC_DISPATCH_RAWINT_REG (PCIE_SUBCTRL_B= ASE + 0x1104) --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri May 3 09:52:25 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, GongChengYa , guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" In SCT test,we find SP805 watchdog driver can't reset when timeout so we use another driver in MdeModulePkg. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo Signed-off-by: GongChengYa Reviewed-by: Ard Biesheuvel --- Platform/Hisilicon/D05/D05.dsc | 2 +- Platform/Hisilicon/D05/D05.fdf | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 4e19de2..79890ef 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -515,7 +515,7 @@ =20 ArmPkg/Drivers/TimerDxe/TimerDxe.inf =20 - ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntim= eDxe.inf # #ACPI diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index 9873677..d05e227 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -193,7 +193,7 @@ READ_LOCK_STATUS =3D TRUE INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf =20 - INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf =20 # # FAT filesystem + GPT/MBR partitioning --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri May 3 09:52:25 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1516287764974498.5466643517095; Thu, 18 Jan 2018 07:02:44 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 717B52232BE1E; Thu, 18 Jan 2018 06:57:03 -0800 (PST) Received: from mail-pf0-x241.google.com (mail-pf0-x241.google.com [IPv6:2607:f8b0:400e:c00::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 64596221F93B6 for ; Thu, 18 Jan 2018 06:57:02 -0800 (PST) Received: by mail-pf0-x241.google.com with SMTP id a88so13277449pfe.12 for ; Thu, 18 Jan 2018 07:02:24 -0800 (PST) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id j14sm13621815pfh.94.2018.01.18.07.02.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 18 Jan 2018 07:02:22 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::241; helo=mail-pf0-x241.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=l/h/WC2EOrb7n/T7S0c2LJudMbXykIQ21K02d0cKqZI=; b=gIHb18C8V6RpxlfmrWCRzq93cu07lykazSH7vrEN5OV9X7TXGDy9HmrJ21AmmWGcRz bdtkEet9gGUHs9duQbIx1O3l03SyO56qui+uPvU7+p0KlEO4cGVaYZCx7ezzfDz4+cdJ KIqcRMBgRj625dci9XEHGcfFcaRBxSc4+uJng= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=l/h/WC2EOrb7n/T7S0c2LJudMbXykIQ21K02d0cKqZI=; b=C+pmkHG6tP5uona8Iwhw3Hti5/91t1xZVMMNw71ra7xCNz5ocFX3hcLdNDDZUOlftL +POUsM7Jem5i1FDFEbTTz7AQ0/MGYvIZev6spQZxQ/BSpJgoRflsA6902a0VEtBeyMSB ZAy+EZ3/Q/X431UBAPuISgNSoKEnuEoPLrsLVx+rP/PsJIxETOBtjVG+EQubATIhsJ0O WcyEJFnCJpKM+JzqtSJ4bVDNbLLjfagx2I5NbNEq8NNE1lz5zmvEIcww9AzrQzQ11wnt Eg6fKJ2GysUTVgAkkEARw/pDRthTluhurvZ3xOx/GbRa2eVcyWaVcwr7+r9peMZuiP5R Kf2Q== X-Gm-Message-State: AKwxytdaXz1N+EprMNom+F94ZKIoNBPTUoV/xnUjL8o7JnpIM7HAJnWq Ukx3L6XJg/UuXxI423UU/g9FLQ== X-Google-Smtp-Source: ACJfBosuDY9V2osvUaI3cs4IK8lTYMhQWVxJEHU48K7YBHN0dRITn2dYEMDiie+D+LdCXu0c3yBBkQ== X-Received: by 10.99.126.24 with SMTP id z24mr25240312pgc.143.1516287743726; Thu, 18 Jan 2018 07:02:23 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 18 Jan 2018 23:01:39 +0800 Message-Id: <1516287703-35516-11-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516287703-35516-1-git-send-email-huangming23@huawei.com> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> Subject: [edk2] [PATCH edk2-platforms v1 10/14] Hisilicon/D03: Replace SP805Watchdog by WatchdogTimer driver. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, GongChengYa , guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" In SCT test,we find SP805 watchdog driver can't reset when timeout so we use another driver in MdeModulePkg. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo Signed-off-by: GongChengYa Reviewed-by: Ard Biesheuvel --- Platform/Hisilicon/D03/D03.dsc | 2 +- Platform/Hisilicon/D03/D03.fdf | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index b22afe3..88c08dd 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -379,7 +379,7 @@ =20 ArmPkg/Drivers/TimerDxe/TimerDxe.inf =20 - ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntim= eDxe.inf # #ACPI diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf index e93985b..5b7bb1d 100644 --- a/Platform/Hisilicon/D03/D03.fdf +++ b/Platform/Hisilicon/D03/D03.fdf @@ -189,7 +189,7 @@ READ_LOCK_STATUS =3D TRUE INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf =20 - INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf =20 # # FAT filesystem + GPT/MBR partitioning --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri May 3 09:52:25 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Thu, 18 Jan 2018 07:02:26 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::244; helo=mail-pf0-x244.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tVhNRW/HU/+F8k69pRqO0YBhRcrjUwVC90Z17TlAXgQ=; b=MOEP6/YlP6NC8zWJsCAnu5qoZNJ4uljwlfzD4tcva/EU7MUTwM/NNC3YM/ytyGd2g6 VexQvBiX3yZ6XOLP3FCe9ea1ZwsBZZxVkEbDAb6XJa25LpkaCmV4prArlAlCaHkvaf7b KSKHMsqi6if5SFGmACatbQk2Sbus3zD8sqP00= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; 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charset="utf-8" Add ITS affinity structure in SRAT. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo Reviewed-by: Ard Biesheuvel --- Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc | 10 ++++++++++ Silicon/Hisilicon/Include/Library/AcpiNextLib.h | 10 +++++++++- 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc b/Silicon/= Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc index b448a29..8ea0c4b 100644 --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc @@ -121,6 +121,16 @@ EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE Srat =3D { EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003E,0x0000= 0001,0x00000000), //GICC Affinity Processor 62 EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003F,0x0000= 0001,0x00000000) //GICC Affinity Processor 63 }, + { + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000000, 0x00000000), + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000001, 0x00000001), + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000000, 0x00000002), + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000001, 0x00000003), + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000002, 0x00000004), + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000003, 0x00000005), + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000002, 0x00000006), + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000003, 0x00000007) + }, }; =20 // diff --git a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h b/Silicon/Hisi= licon/Include/Library/AcpiNextLib.h index 60f9925..fd05a3b 100644 --- a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h +++ b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h @@ -39,6 +39,13 @@ ACPIProcessorUID, Flags, ClockDomain = \ } =20 +#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT( = \ + ProximityDomain, ItsId) = \ + { = \ + 4, sizeof (EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE), ProximityDomain, = \ + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, ItsId = \ + } + #define EFI_ACPI_6_1_MEMORY_AFFINITY_STRUCTURE_INIT( = \ ProximityDomain, AddressBaseLow, AddressBaseHigh, LengthLow, LengthHig= h, Flags) \ { = \ @@ -70,12 +77,13 @@ // #define EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT 64 #define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT 10 - +#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 8 =20 typedef struct { EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header; EFI_ACPI_6_0_MEMORY_AFFINITY_STRUCTURE Memory[EFI_A= CPI_MEMORY_AFFINITY_STRUCTURE_COUNT]; EFI_ACPI_6_0_GICC_AFFINITY_STRUCTURE Gicc[EFI_ACP= I_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT]; + EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE Its[EFI_ACPI= _6_2_ITS_AFFINITY_STRUCTURE_COUNT]; } EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE; =20 #pragma pack() --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri May 3 09:52:25 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1516287776434995.7594743873008; Thu, 18 Jan 2018 07:02:56 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 42E802238B587; Thu, 18 Jan 2018 06:57:10 -0800 (PST) Received: from mail-pf0-x243.google.com (mail-pf0-x243.google.com [IPv6:2607:f8b0:400e:c00::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 94D312238B582 for ; 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charset="utf-8" Add PXM method for Pcie device, HNS device and SAS device. Add STA method for HNS. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: hensonwang Signed-off-by: Ming Huang Signed-off-by: Heyi Guo Reviewed-by: Ard Biesheuvel --- Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl | 9 ++++++ Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 34 ++++++++++++++= ++++-- Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl | 19 +++++++++-- 3 files changed, 57 insertions(+), 5 deletions(-) diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl b/Silic= on/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl index 11c28ba..7aa04af 100644 --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl @@ -233,6 +233,15 @@ Scope(_SB) } }) =20 + Method (_PXM, 0, NotSerialized) + { + Return(0x00) + } + Method (_STA, 0, NotSerialized) + { + Return(0x0F) + } + //reset XGE port //Arg0 : XGE port index in dsaf //Arg1 : 0 reset, 1 cancle reset diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl b/Silic= on/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl index 55c7f50..122e4f0 100644 --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl @@ -141,7 +141,10 @@ Scope(_SB) { Return (0xf) } - + Method (_PXM, 0, NotSerialized) + { + Return(0x00) + } } // Device(PCI2) =20 Device (RES2) @@ -240,7 +243,10 @@ Scope(_SB) { Return (RBYV()) } - + Method (_PXM, 0, NotSerialized) + { + Return(0x01) + } } // Device(PCI4) Device (RES4) { @@ -338,6 +344,10 @@ Scope(_SB) { Return (RBYV()) } + Method (_PXM, 0, NotSerialized) + { + Return(0x01) + } } // Device(PCI5) Device (RES5) { @@ -435,6 +445,10 @@ Scope(_SB) { Return (RBYV()) } + Method (_PXM, 0, NotSerialized) + { + Return(0x01) + } } // Device(PCI6) Device (RES6) { @@ -531,6 +545,10 @@ Scope(_SB) { Return (RBYV()) } + Method (_PXM, 0, NotSerialized) + { + Return(0x01) + } } // Device(PCI7) Device (RES7) { @@ -690,6 +708,10 @@ Scope(_SB) { Return (0xf) } + Method (_PXM, 0, NotSerialized) + { + Return(0x02) + } } // Device(PCIa) Device (RESa) { @@ -810,6 +832,10 @@ Scope(_SB) { Return (RBYV()) } + Method (_PXM, 0, NotSerialized) + { + Return(0x03) + } } // Device(PCIc) =20 Device (RESc) @@ -907,6 +933,10 @@ Scope(_SB) { Return (RBYV()) } + Method (_PXM, 0, NotSerialized) + { + Return(0x03) + } } // Device(PCId) Device (RESd) { diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl b/Silic= on/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl index 6455130..d5b7e2f 100644 --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl @@ -88,7 +88,10 @@ Scope(_SB) Store(0x7ffff, CLK) Sleep(1) } - + Method (_PXM, 0, NotSerialized) + { + Return(0x00) + } Method (_STA, 0, NotSerialized) { Return (0x0) @@ -169,8 +172,15 @@ Scope(_SB) Store(0x7ffff, CLK) Sleep(1) } + Method (_PXM, 0, NotSerialized) + { + Return(0x00) + } + Method (_STA, 0, NotSerialized) + { + Return(0x0F) + } } - Device(SAS2) { Name(_HID, "HISI0162") Name(_CCA, 1) @@ -244,7 +254,10 @@ Scope(_SB) Store(0x7ffff, CLK) Sleep(1) } - + Method (_PXM, 0, NotSerialized) + { + Return(0x00) + } Method (_STA, 0, NotSerialized) { Return (0x0) --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri May 3 09:52:25 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" OsBootLib can create OS option after upgrade firmware. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Platform/Hisilicon/D03/D03.dsc = | 1 + Platform/Hisilicon/D05/D05.dsc = | 1 + Silicon/Hisilicon/Include/Library/OsBootLib.h = | 47 ++ Silicon/Hisilicon/Library/OsBootLib/OsBoot.h = | 124 +++++ Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c = | 217 +++++++++ Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf = | 59 +++ Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c = | 514 ++++++++++++++++++++ Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c = | 6 + Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.in= f | 1 + 9 files changed, 970 insertions(+) diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index 88c08dd..6f1164e 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -47,6 +47,7 @@ UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServic= esLib.inf UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf + OsBootLib|Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf =20 =20 =20 diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 79890ef..52ffad5 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -55,6 +55,7 @@ FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + OsBootLib|Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf =20 !if $(NETWORK_IP6_ENABLE) =3D=3D TRUE TcpIoLib|MdeModulePkg/Library/DxeTcpIoLib/DxeTcpIoLib.inf diff --git a/Silicon/Hisilicon/Include/Library/OsBootLib.h b/Silicon/Hisili= con/Include/Library/OsBootLib.h new file mode 100644 index 0000000..f5cbc4a --- /dev/null +++ b/Silicon/Hisilicon/Include/Library/OsBootLib.h @@ -0,0 +1,47 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#ifndef _OS_BOOT_LIB_H_ +#define _OS_BOOT_LIB_H_ + + +/** + Remove invalid OS boot options, and then add new ones. + +*/ +EFI_STATUS +AdjustOsBootOrder ( + VOID + ); + +/** + Try to find UEFI OSs and create the boot options which haven't been list= ed in BootOrder. + +*/ +EFI_STATUS +CreateOsBootOptions ( + VOID + ); + +/** + Remove UEFI OS boot options when it is disappeared in system. + +*/ +EFI_STATUS +RemoveInvalidOsBootOptions ( + VOID + ); + +#endif diff --git a/Silicon/Hisilicon/Library/OsBootLib/OsBoot.h b/Silicon/Hisilic= on/Library/OsBootLib/OsBoot.h new file mode 100644 index 0000000..1991471 --- /dev/null +++ b/Silicon/Hisilicon/Library/OsBootLib/OsBoot.h @@ -0,0 +1,124 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#ifndef _OS_BOOT_H_ +#define _OS_BOOT_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + + +typedef struct { + CHAR16 *FilePathString; + CHAR16 *Description; + }UEFI_OS_BOOT_FILE; + +/** + Check same boot option by device path. + +*/ +BOOLEAN +BeHaveSameBootOptionByDP ( + EFI_DEVICE_PATH_PROTOCOL *DevicePath, + CHAR16 *FileName + ); + +/** + Remove UEFI OS boot options when it is disappeared in system. + +*/ +EFI_STATUS +RemoveInvalidOsBootOptions ( + VOID + ); + + +/** + Check Os Boot Option if exist in current system. + +*/ +BOOLEAN +BeInvalidOsBootOption ( + EFI_DEVICE_PATH_PROTOCOL *OptionDp + ); + +/** + Get the headers (dos, image, optional header) from an image + + @param Device SimpleFileSystem device handle + @param FileName File name for the image + @param DosHeader Pointer to dos header + @param Hdr The buffer in which to return the PE32, PE= 32+, or TE header. + + @retval EFI_SUCCESS Successfully get the machine type. + @retval EFI_NOT_FOUND The file is not found. + @retval EFI_LOAD_ERROR File is not a valid image file. + +**/ +EFI_STATUS +EFIAPI +OsBootGetImageHeader ( + IN EFI_HANDLE Device, + IN CHAR16 *FileName, + OUT EFI_IMAGE_DOS_HEADER *DosHeader, + OUT EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr + ); + +UINTN +GetOptionPositionWithoutGpt ( + VOID + ); + +VOID +PrintDevicePath ( + CHAR16 *PreStr, + EFI_DEVICE_PATH_PROTOCOL *Path + ); + +VOID +RemoveSuperfluousOption ( + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions, + UINT16 *OptionFlags, + UINTN BootOptionCount + ); + +BOOLEAN +IsOptionAddedByOsBootLib ( + UINT16 *OptionDescription + ); + +#endif diff --git a/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c b/Silicon/Hisi= licon/Library/OsBootLib/OsBootLib.c new file mode 100644 index 0000000..29b6b62 --- /dev/null +++ b/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c @@ -0,0 +1,217 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#include "OsBoot.h" + +UEFI_OS_BOOT_FILE mUefiOsBootFiles[] =3D { + {EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64, L"Uefi Default Boot"}, + {L"\\BOOT\\EFI\\EFI\\CENTOS\\grubaa64.efi", L"Uefi CENTOS Boot"}, + {L"\\EFI\\centos\\grubaa64.efi", L"Uefi CentOS Grub Boot"}, + {L"\\EFI\\debian\\grubaa64.efi", L"Uefi Debian Grub Boot"}, + {L"\\EFI\\GRUB2\\GRUBAA64.EFI", L"Hisilicon Linux Boot"}, + {L"\\EFI\\Microsoft\\Boot\\bootmgfw.efi", L"Uefi Windows Boot"}, + {L"\\EFI\\redhat\\grub.efi", L"Uefi Redhat Boot"}, + {L"\\EFI\\SuSE\\elilo.efi", L"Uefi SuSE Boot"}, + {L"\\EFI\\ubuntu\\grubaa64.efi", L"Uefi Ubuntu Grub Boot"}, + {L"\\EFI\\ubuntu\\shimx64.efi", L"Uefi Ubuntu Shimx64 Boo= t"}, + {L"\\EFI\\ubuntu\\grubx64.efi", L"Uefi Ubuntu Grubx64 Boo= t"}, + {L"\\EFI\\ubuntu\\shim.efi", L"Uefi Ubuntu Shim Boot"}, + {L"\\EFI\\ubuntu\\grub.efi", L"Uefi Ubuntu Grub Boot"}, + {L"\\EFI\\fedora\\shim.efi", L"Uefi Fedora Shim Boot"} +}; + +BOOLEAN +IsOptionAddedByOsBootLib ( + UINT16 *OptionDescription + ) +{ + UINTN Index; + + for (Index =3D 0; Index < (sizeof (mUefiOsBootFiles) / sizeof (UEFI_OS_B= OOT_FILE)); Index++) { + if (StrCmp (mUefiOsBootFiles[Index].Description, OptionDescription) = =3D=3D 0) { + return TRUE; + } + } + + return FALSE; +} + +/** + Remove invalid OS boot options, and then add new ones. + +*/ +EFI_STATUS +AdjustOsBootOrder ( + VOID + ) +{ + EFI_STATUS Status; + + Status =3D RemoveInvalidOsBootOptions (); + if (EFI_ERROR (Status)) { + return Status; + } + + Status =3D CreateOsBootOptions (); + return Status; +} + + +/** + Remove UEFI OS boot options when it is disappeared in system. + +*/ +EFI_STATUS +RemoveInvalidOsBootOptions ( + VOID + ) +{ + EFI_STATUS Status; + UINTN Index; + UINT16 *OptionDelFlags; + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions; + UINTN BootOptionCount; + + BootOptions =3D EfiBootManagerGetLoadOptions (&BootOptionCount, LoadOpti= onTypeBoot); + OptionDelFlags =3D AllocateZeroPool (BootOptionCount * sizeof(UINT16)); + if (OptionDelFlags =3D=3D NULL) { + goto exit; + } + + for (Index =3D 0; Index < BootOptionCount; Index++) { + if (OptionDelFlags[Index] =3D=3D 0) { + if (BeInvalidOsBootOption (BootOptions[Index].FilePath)) { + Status =3D EfiBootManagerDeleteLoadOptionVariable (BootOptions[Ind= ex].OptionNumber, LoadOptionTypeBoot); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "DeleteLoadOptionVariable: %r\n", Status)); + continue; + } + PrintDevicePath (L"Del Option,", BootOptions[Index].FilePath); + } else { + RemoveSuperfluousOption (&BootOptions[Index], OptionDelFlags, Boot= OptionCount - Index); + } + } + } + + exit: + if (OptionDelFlags !=3D NULL) { + FreePool (OptionDelFlags); + } + EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount); + + return EFI_SUCCESS; +} + + +/** + Try to find UEFI OSs and create the boot options which haven't been list= ed in BootOrder. + +*/ +EFI_STATUS +CreateOsBootOptions ( + VOID + ) +{ + EFI_STATUS Status; + EFI_HANDLE *FileSystemHandles; + UINTN NumberFileSystemHandles; + UINTN Index, Count; + EFI_DEVICE_PATH_PROTOCOL *OsFileDP; + EFI_BLOCK_IO_PROTOCOL *BlkIo; + UINTN MaxFiles; + EFI_IMAGE_OPTIONAL_HEADER_UNION HdrData; + EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr; + EFI_IMAGE_DOS_HEADER DosHeader; + EFI_BOOT_MANAGER_LOAD_OPTION NewOption; + + // + //Look for file system to find default Os boot load. + // + Status =3D gBS->LocateHandleBuffer ( + ByProtocol, + &gEfiSimpleFileSystemProtocolGuid, + NULL, + &NumberFileSystemHandles, + &FileSystemHandles + ); + if (EFI_ERROR (Status)) { + return Status; + } + + MaxFiles =3D sizeof (mUefiOsBootFiles) / sizeof (UEFI_OS_BOOT_FILE); + for (Index =3D 0; Index < NumberFileSystemHandles; Index++) { + Status =3D gBS->HandleProtocol ( + FileSystemHandles[Index], + &gEfiBlockIoProtocolGuid, + (VOID **) &BlkIo + ); + if (EFI_ERROR (Status)) { + continue; + } + + Hdr.Union =3D &HdrData; + for (Count =3D 0; Count < MaxFiles; Count++) { + // + //Read Boot File Path to check validation. + // + Status =3D OsBootGetImageHeader ( + FileSystemHandles[Index], + mUefiOsBootFiles[Count].FilePathString, + &DosHeader, + Hdr + ); + if (!EFI_ERROR (Status) && + EFI_IMAGE_MACHINE_TYPE_SUPPORTED (Hdr.Pe32->FileHeader.Machine) = && + Hdr.Pe32->OptionalHeader.Subsystem =3D=3D EFI_IMAGE_SUBSYSTEM_EF= I_APPLICATION) { + + OsFileDP =3D NULL; + OsFileDP =3D FileDevicePath (FileSystemHandles[Index], mUefiOsBoot= Files[Count].FilePathString); + PrintDevicePath (L"Exist", OsFileDP); + if (!BeHaveSameBootOptionByDP (OsFileDP, mUefiOsBootFiles[Count].F= ilePathString)) { + // + // Create new BootOption if it is not present. + // + DEBUG ((DEBUG_INFO, "CreateOsBootOptions (), Make New Boot Optio= n :%s.\n", mUefiOsBootFiles[Count].Description)); + Status =3D EfiBootManagerInitializeLoadOption ( + &NewOption, + LoadOptionNumberUnassigned, + LoadOptionTypeBoot, + LOAD_OPTION_ACTIVE, + mUefiOsBootFiles[Count].Description, + OsFileDP, + NULL, + 0 + ); + ASSERT_EFI_ERROR (Status); + Status =3D EfiBootManagerAddLoadOptionVariable (&NewOption, GetO= ptionPositionWithoutGpt ()); + ASSERT_EFI_ERROR (Status); + EfiBootManagerFreeLoadOption (&NewOption); + } + + if(OsFileDP !=3D NULL) { + FreePool (OsFileDP); + OsFileDP =3D NULL; + } + } + } + } + + if (NumberFileSystemHandles !=3D 0) { + FreePool (FileSystemHandles); + } + + return EFI_SUCCESS; +} + diff --git a/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf b/Silicon/Hi= silicon/Library/OsBootLib/OsBootLib.inf new file mode 100644 index 0000000..12e6d49 --- /dev/null +++ b/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf @@ -0,0 +1,59 @@ +## @file +# Manager Os Boot option. +# Copyright (c) 2017, Hisilicon Limited. All rights reserved. +# Copyright (c) 2017, Linaro Limited. All rights reserved. +# +# Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may = be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D OsBootLib + FILE_GUID =3D e406c654-ccde-4d32-8362-0aec01725139 + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D OsBootLib + +[Sources] + OsBootLib.c + OsBootLibMisc.c + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Silicon/Hisilicon/HisiPkg.dec + +[LibraryClasses] + BaseMemoryLib + BaseLib + DxeServicesLib + DebugLib + DxeServicesTableLib + DevicePathLib + MemoryAllocationLib + PrintLib + UefiRuntimeServicesTableLib + UefiLib + UefiBootServicesTableLib + UefiBootManagerLib + +[Guids] + gEfiGlobalVariableGuid + gEfiFileInfoGuid ## SOMETIMES_CONSUMES ## G= UID + +[Protocols] + gEfiSimpleFileSystemProtocolGuid ## SOMETIMES_CONSUMES + gEfiBlockIoProtocolGuid ## SOMETIMES_CONSUMES + gEfiFirmwareVolume2ProtocolGuid ## SOMETIMES_CONSUMES + gEfiDevicePathProtocolGuid ## CONSUMES + gEfiDevicePathToTextProtocolGuid + +[Pcd] diff --git a/Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c b/Silicon/= Hisilicon/Library/OsBootLib/OsBootLibMisc.c new file mode 100644 index 0000000..4e6d895 --- /dev/null +++ b/Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c @@ -0,0 +1,514 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#include "OsBoot.h" + +extern UEFI_OS_BOOT_FILE mUefiOsBootFiles[]; + +/** + Read file the headers of dos, image, optional header. + + @param Device SimpleFileSystem device handle + @param FileSize File size + @param DosHeader Pointer to dos header + @param Hdr The buffer in which to return the PE32, PE= 32+, or TE header. + + @retval EFI_SUCCESS Successfully get the File. + @retval EFI_LOAD_ERROR File is not a valid image file. + +**/ +EFI_STATUS +ReadDosHeader ( + EFI_FILE_HANDLE ThisFile, + UINT64 FileSize, + EFI_IMAGE_DOS_HEADER *DosHeader, + EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION *Hdr + ) +{ + EFI_STATUS Status; + UINTN BufferSize; + // + // Read dos header + // + BufferSize =3D sizeof (EFI_IMAGE_DOS_HEADER); + Status =3D ThisFile->Read (ThisFile, &BufferSize, DosHeader); + if (EFI_ERROR (Status) || + BufferSize < sizeof (EFI_IMAGE_DOS_HEADER) || + FileSize <=3D DosHeader->e_lfanew || + DosHeader->e_magic !=3D EFI_IMAGE_DOS_SIGNATURE) { + Status =3D EFI_LOAD_ERROR; + DEBUG ((DEBUG_ERROR, "%a(%d):error!\n", __FUNCTION__,__LINE__)); + goto ErrReadDos; + } + + // + // Move to PE signature + // + Status =3D ThisFile->SetPosition (ThisFile, DosHeader->e_lfanew); + if (EFI_ERROR (Status)) { + Status =3D EFI_LOAD_ERROR; + DEBUG((DEBUG_ERROR, "%a(%d):error!\n", __FUNCTION__,__LINE__)); + goto ErrReadDos; + } + + // + // Read and check PE signature + // + BufferSize =3D sizeof (EFI_IMAGE_OPTIONAL_HEADER_UNION); + Status =3D ThisFile->Read (ThisFile, &BufferSize, (VOID*)(Hdr->Pe32)); + if (EFI_ERROR (Status) || + BufferSize < sizeof (EFI_IMAGE_OPTIONAL_HEADER_UNION) || + Hdr->Pe32->Signature !=3D EFI_IMAGE_NT_SIGNATURE) { + Status =3D EFI_LOAD_ERROR; + DEBUG((DEBUG_ERROR, "%a(%d):error!\n", __FUNCTION__,__LINE__)); + goto ErrReadDos; + } + +ErrReadDos: + return Status; +} + +/** + Get the headers (dos, image, optional header) from an image + + @param Device SimpleFileSystem device handle + @param FileName File name for the image + @param DosHeader Pointer to dos header + @param Hdr The buffer in which to return the PE32, PE= 32+, or TE header. + + @retval EFI_SUCCESS Successfully get the machine type. + @retval EFI_NOT_FOUND The file is not found. + @retval EFI_LOAD_ERROR File is not a valid image file. + +**/ +EFI_STATUS +EFIAPI +OsBootGetImageHeader ( + IN EFI_HANDLE Device, + IN CHAR16 *FileName, + OUT EFI_IMAGE_DOS_HEADER *DosHeader, + OUT EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr + ) +{ + EFI_STATUS Status; + EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *Volume; + EFI_FILE_HANDLE Root; + EFI_FILE_HANDLE ThisFile; + UINTN BufferSize; + UINT64 FileSize; + EFI_FILE_INFO *Info; + BOOLEAN Condition =3D TRUE;//pclint + + Root =3D NULL; + ThisFile =3D NULL; + // + // Handle the file system interface to the device + // + Status =3D gBS->HandleProtocol ( + Device, + &gEfiSimpleFileSystemProtocolGuid, + (VOID *) &Volume + ); + if (EFI_ERROR (Status)) { + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,= Status)); + goto Done; + } + + Status =3D Volume->OpenVolume ( + Volume, + &Root + ); + if (EFI_ERROR (Status)) { + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,= Status)); + Root =3D NULL; + goto Done; + } + + if (Root =3D=3D NULL) { + Status =3D EFI_LOAD_ERROR; + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,= Status)); + goto Done; + } + Status =3D Root->Open (Root, &ThisFile, FileName, EFI_FILE_MODE_READ, 0); + if (EFI_ERROR (Status)) { + DEBUG((DEBUG_ERROR, "%a(%d):file not found ret :%r !\n", __FUNCTION__,= __LINE__,Status)); + goto Done; + } + + if (ThisFile =3D=3D NULL) { + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,= Status)); + Status =3D EFI_LOAD_ERROR; + goto Done; + } + // + // Get file size + // + BufferSize =3D SIZE_OF_EFI_FILE_INFO + 200; + do { + Info =3D NULL; + Status =3D gBS->AllocatePool (EfiBootServicesData, BufferSize, (VOI= D **) &Info); + if (EFI_ERROR (Status)) { + goto Done; + } + Status =3D ThisFile->GetInfo ( + ThisFile, + &gEfiFileInfoGuid, + &BufferSize, + Info + ); + if (!EFI_ERROR (Status)) { + break; + } + if (Status !=3D EFI_BUFFER_TOO_SMALL) { + FreePool (Info); + goto Done; + } + FreePool (Info); + } while (Condition); + + FileSize =3D Info->FileSize; + FreePool (Info); + + Status =3D ReadDosHeader(ThisFile, FileSize, DosHeader, &Hdr); + if (EFI_ERROR (Status)) { + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,= Status)); + goto Done; + } + // + // Check PE32 or PE32+ magic + // + if (Hdr.Pe32->OptionalHeader.Magic !=3D EFI_IMAGE_NT_OPTIONAL_HDR32_MAGI= C && + Hdr.Pe32->OptionalHeader.Magic !=3D EFI_IMAGE_NT_OPTIONAL_HDR64_MAG= IC) { + Status =3D EFI_LOAD_ERROR; + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE= __,Status)); + goto Done; + } + + Done: + if (ThisFile !=3D NULL) { + ThisFile->Close (ThisFile); + } + if (Root !=3D NULL) { + Root->Close (Root); + } + return Status; +} + + +VOID +PrintDevicePath ( + CHAR16 *PreStr, + EFI_DEVICE_PATH_PROTOCOL *Path + ) +{ + CHAR16 *DevicePathTxt; + EFI_STATUS Status; + EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *DevicePathToTextProtocol; + + DevicePathTxt =3D NULL; + Status =3D gBS->LocateProtocol (&gEfiDevicePathToTextProtocolGuid, NULL,= (VOID **)&DevicePathToTextProtocol); + if (!EFI_ERROR (Status)) { + DevicePathTxt =3D DevicePathToTextProtocol->ConvertDevicePathToText (P= ath, FALSE, TRUE); + DEBUG ((DEBUG_ERROR, "%s DevPath:[%s]\n", PreStr, DevicePathTxt)); + } + + if (DevicePathTxt !=3D NULL) { + FreePool (DevicePathTxt); + } + + return ; +} + +CHAR16 * +GetGptNodeText ( + EFI_DEVICE_PATH_PROTOCOL *Path + ) +{ + CHAR16 *NodeText; + + while (!IsDevicePathEnd (Path)) { + NodeText =3D ConvertDeviceNodeToText (Path, TRUE, TRUE); + if (StrStr (NodeText, L"GPT") !=3D NULL) { + return NodeText; + } + + if (NodeText !=3D NULL) { + FreePool (NodeText); + } + + Path =3D NextDevicePathNode (Path); + } + + return NULL; +} + +BOOLEAN +IsPartitionGuidEqual ( + EFI_DEVICE_PATH_PROTOCOL *OptionPath, + EFI_DEVICE_PATH_PROTOCOL *FilePath + ) +{ + CHAR16 *OptionGptText; + CHAR16 *FileGptText; + + OptionGptText =3D GetGptNodeText (OptionPath); + FileGptText =3D GetGptNodeText (FilePath); + if ((OptionGptText !=3D NULL) && (FileGptText !=3D NULL) && (StrCmp (Opt= ionGptText, FileGptText) =3D=3D 0)) { + return TRUE; + } + + if (OptionGptText !=3D NULL) { + FreePool (OptionGptText); + } + if (FileGptText !=3D NULL) { + FreePool (FileGptText); + } + + return FALSE; +} + +/* If a partition exist a valid grub, OsBootLib will create a Option after= bios firmware upgraded, + * and then installing the same OS on the same partition will create anoth= or Option. the two Options + * are superfluous, the Option added by OsBootLib should be remove. + * + * It's allowed of creating several Option in the same GPT by installing O= S. + */ +VOID +RemoveSuperfluousOption ( + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions, + UINT16 *OptionDelFlags, + UINTN BootOptionCount + ) +{ + EFI_STATUS Status; + UINTN Index; + + for (Index =3D 1; Index < BootOptionCount; Index++) { + if (OptionDelFlags[Index] =3D=3D 0) { + if ((IsPartitionGuidEqual (BootOptions[0].FilePath, BootOptions[Inde= x].FilePath)) && + (IsOptionAddedByOsBootLib (BootOptions[Index].Description))) { + OptionDelFlags[Index] =3D 1; + + Status =3D EfiBootManagerDeleteLoadOptionVariable (BootOptions[Ind= ex].OptionNumber, LoadOptionTypeBoot); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "DeleteLoadOptionVariable: %r\n", Status)); + continue; + } + + PrintDevicePath (L"Del Option(du),", BootOptions[Index].FilePath); + } + } + } + + return; +} + +UINTN +GetOptionPositionWithoutGpt ( + VOID + ) +{ + UINTN Index; + UINTN BootOptionCount; + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions; + + BootOptions =3D EfiBootManagerGetLoadOptions ( + &BootOptionCount, LoadOptionTypeBoot + ); + for (Index =3D 0; Index < BootOptionCount; Index++) { + if (GetGptNodeText (BootOptions[Index].FilePath) =3D=3D NULL) { + return Index; + } + } + + return 0; +} + +CHAR16 * +GetFileTextByDevicePath ( + EFI_DEVICE_PATH_PROTOCOL *DevicePath + ) +{ + CHAR16 *FileString; + + FileString =3D NULL; + + while (!IsDevicePathEnd (DevicePath)) { + if (MEDIA_DEVICE_PATH =3D=3D DevicePathType (DevicePath) && + MEDIA_FILEPATH_DP =3D=3D DevicePathSubType (DevicePath)) { + FileString =3D ConvertDeviceNodeToText (DevicePath, TRUE, TRUE); + break; + } + DevicePath =3D NextDevicePathNode (DevicePath); + } + + return FileString; +} + + +/** + Check same boot option by device path. + +*/ +BOOLEAN +BeHaveSameBootOptionByDP ( + EFI_DEVICE_PATH_PROTOCOL *DevicePath, + CHAR16 *FileName + ) +{ + UINTN Index; + UINTN ValidPathSize; + BOOLEAN Found; + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions; + UINTN BootOptionCount; + + if (NULL =3D=3D DevicePath) { + return FALSE; + } + + BootOptions =3D EfiBootManagerGetLoadOptions (&BootOptionCount, LoadOpti= onTypeBoot); + + Found =3D FALSE; + for (Index =3D 0; Index < BootOptionCount; Index++) { + /* If a partition exist a valid Option, then the new Option should not= be added. + * After installation, some iso will create several valid grub file, l= ike + * \EFI\centos\shimaa64.efi, \EFI\BOOT\BOOTAA64.EFI. + */ + if(IsPartitionGuidEqual (BootOptions[Index].FilePath, DevicePath)) { + DEBUG ((DEBUG_ERROR, "Get the same Option(GPT).\n")); + Found =3D TRUE; + break; + } + + /* If DevicePath of new Option is matched in exist Option and file nam= e of + * new Option is EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64, then the new O= ption should be ignored. + */ + ValidPathSize =3D GetDevicePathSize (BootOptions[Index].FilePath) - EN= D_DEVICE_PATH_LENGTH; + if ((CompareMem (BootOptions[Index].FilePath, DevicePath, ValidPathSi= ze) =3D=3D 0) && + (StrCmp (FileName, EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64) =3D=3D 0= )) + { + DEBUG ((DEBUG_ERROR, "Get the same Option.\n")); + Found =3D TRUE; + break; + } + } + + EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount); + + return Found; +} + +/** + Check Os Boot Option if exist in current system. + +*/ +BOOLEAN +BeInvalidOsBootOption ( + EFI_DEVICE_PATH_PROTOCOL *OptionDp + ) +{ + EFI_STATUS Status; + EFI_HANDLE *FileSystemHandles; + UINTN NumberFileSystemHandles; + UINTN Index; + EFI_DEVICE_PATH_PROTOCOL *FileSystemDP; + UINTN OptionDpSize; + EFI_BLOCK_IO_PROTOCOL *BlkIo; + EFI_IMAGE_OPTIONAL_HEADER_UNION HdrData; + EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr; + EFI_IMAGE_DOS_HEADER DosHeader; + BOOLEAN Invalid; + EFI_DEVICE_PATH_PROTOCOL* DevicePathNode; + CHAR16 *FileString; + + Invalid =3D TRUE; + if (NULL =3D=3D OptionDp) { + return FALSE; + } + + OptionDpSize =3D GetDevicePathSize (OptionDp); + if (OptionDpSize =3D=3D 0) { + return FALSE; + } + + // + // Os BootOption should be File Device Path. + // + DevicePathNode =3D OptionDp; + FileString =3D GetFileTextByDevicePath (DevicePathNode); + if (FileString =3D=3D NULL) { + return FALSE; + } + + // + // File should be exsiting in system. + // + Status =3D gBS->LocateHandleBuffer ( + ByProtocol, + &gEfiSimpleFileSystemProtocolGuid, + NULL, + &NumberFileSystemHandles, + &FileSystemHandles + ); + if (EFI_ERROR (Status)) { + FreePool (FileString); + return FALSE; + } + + for (Index =3D 0; Index < NumberFileSystemHandles; Index++) { + Status =3D gBS->HandleProtocol ( + FileSystemHandles[Index], + &gEfiBlockIoProtocolGuid, + (VOID **) &BlkIo + ); + if (EFI_ERROR (Status)) { + continue; + } + + FileSystemDP =3D FileDevicePath (FileSystemHandles[Index], FileString); + /* If Partition is existed and the grub file is existed, then the Opti= on is valid. */ + if ((CompareMem ((VOID *) OptionDp, (VOID *) FileSystemDP, OptionDpSiz= e) =3D=3D 0) || + (IsPartitionGuidEqual (OptionDp, FileSystemDP))) { + Hdr.Union =3D &HdrData; + Status =3D OsBootGetImageHeader ( + FileSystemHandles[Index], + FileString, + &DosHeader, + Hdr + ); + if (!EFI_ERROR (Status) && + EFI_IMAGE_MACHINE_TYPE_SUPPORTED (Hdr.Pe32->FileHeader.Machine) = && + Hdr.Pe32->OptionalHeader.Subsystem =3D=3D EFI_IMAGE_SUBSYSTEM_EF= I_APPLICATION) { + DEBUG ((DEBUG_ERROR, "BeValidOsBootOption (),Get Bootable file :%s= .\n", FileString)); + Invalid =3D FALSE; + break; + } + } + + if (FileSystemDP !=3D NULL) { + FreePool (FileSystemDP); + } + } + + if (NumberFileSystemHandles !=3D 0) { + FreePool (FileSystemHandles); + } + if (FileString !=3D NULL) { + FreePool (FileString); + } + + return Invalid; +} + diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c = b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c index 845519f..1c6e8bf 100644 --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -576,6 +577,11 @@ PlatformBootManagerAfterConsole ( PcdGetPtr (PcdShellFile), L"UEFI Shell", LOAD_OPTION_ACTIVE ); =20 + Status =3D AdjustOsBootOrder (); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a:%r\n", __FUNCTION__, Status)); + } + HandleBmcBootType (); } =20 diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootM= anagerLib.inf b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBo= otManagerLib.inf index 7b151a9..a6d597d 100644 --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerL= ib.inf +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerL= ib.inf @@ -49,6 +49,7 @@ DevicePathLib DxeServicesLib MemoryAllocationLib + OsBootLib PcdLib PrintLib UefiBootManagerLib --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri May 3 09:52:25 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1516287791958845.2554782142311; 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Thu, 18 Jan 2018 07:02:35 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 18 Jan 2018 23:01:43 +0800 Message-Id: <1516287703-35516-15-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516287703-35516-1-git-send-email-huangming23@huawei.com> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> Subject: [edk2] [PATCH edk2-platforms v1 14/14] Hisilicon D03/D05: Update firmware version to 18.02 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Replace the old string with short one. The old one is too long that can not be show integrallty in Setup nemu. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo Reviewed-by: Ard Biesheuvel --- Platform/Hisilicon/D03/D03.dsc | 2 +- Platform/Hisilicon/D05/D05.dsc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index 6f1164e..b6b8086 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -171,7 +171,7 @@ !ifdef $(FIRMWARE_VER) gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_V= ER)" !else - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development = build base on Hisilicon D03 UEFI 17.10 Release" + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"RP 18.02 for= Hisilicon D03" !endif =20 gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18" diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 52ffad5..a599c08 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -190,7 +190,7 @@ !ifdef $(FIRMWARE_VER) gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_V= ER)" !else - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development = build base on Hisilicon D05 UEFI 17.10 Release" + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"RP 18.02 for= Hisilicon D05" !endif =20 gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18" --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel