From nobody Sun May 5 18:44:00 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1515036833563983.1331546826104; Wed, 3 Jan 2018 19:33:53 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 11B53222D153C; Wed, 3 Jan 2018 19:28:48 -0800 (PST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 96FFD222A54FF for ; Wed, 3 Jan 2018 19:28:46 -0800 (PST) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 03 Jan 2018 19:33:49 -0800 Received: from shwdeopenpsi068.ccr.corp.intel.com ([10.239.158.46]) by fmsmga004.fm.intel.com with ESMTP; 03 Jan 2018 19:33:48 -0800 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=star.zeng@intel.com; receiver=edk2-devel@lists.01.org X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,505,1508828400"; d="scan'208";a="18012142" From: Star Zeng To: edk2-devel@lists.01.org Date: Thu, 4 Jan 2018 11:33:47 +0800 Message-Id: <1515036827-17944-1-git-send-email-star.zeng@intel.com> X-Mailer: git-send-email 2.7.0.windows.1 Subject: [edk2] [PATCH] IntelSiliconPkg IntelVTdDxe: Support early SetAttributes() X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jiewen Yao , Star Zeng MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Support early SetAttributes() before DMAR table is installed. Cc: Jiewen Yao Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng Reviewed-by: Jiewen.yao@intel.com --- .../Feature/VTd/IntelVTdDxe/DmaProtection.c | 147 +++++++++++++++++= ++++ .../Feature/VTd/IntelVTdDxe/DmaProtection.h | 46 ++++++- .../Feature/VTd/IntelVTdDxe/DmarAcpiTable.c | 2 +- .../Feature/VTd/IntelVTdDxe/IntelVTdDxe.c | 10 +- 4 files changed, 202 insertions(+), 3 deletions(-) diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.c b/Inte= lSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.c index 013823cc161f..665afe71703d 100644 --- a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.c +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.c @@ -18,6 +18,151 @@ UINT64 mAbove4GMemoryL= imit; =20 EDKII_PLATFORM_VTD_POLICY_PROTOCOL *mPlatformVTdPolicy; =20 +VTD_ACCESS_REQUEST *mAccessRequest =3D NULL; +UINTN mAccessRequestCount =3D 0; +UINTN mAccessRequestMaxCount =3D 0; + +/** + Append VTd Access Request to global. + + @param[in] Segment The Segment used to identify a VTd engine. + @param[in] SourceId The SourceId used to identify a VTd engine= and table entry. + @param[in] BaseAddress The base of device memory address to be us= ed as the DMA memory. + @param[in] Length The length of device memory address to be = used as the DMA memory. + @param[in] IoMmuAccess The IOMMU access. + + @retval EFI_SUCCESS The IoMmuAccess is set for the memory rang= e specified by BaseAddress and Length. + @retval EFI_INVALID_PARAMETER BaseAddress is not IoMmu Page size aligned. + @retval EFI_INVALID_PARAMETER Length is not IoMmu Page size aligned. + @retval EFI_INVALID_PARAMETER Length is 0. + @retval EFI_INVALID_PARAMETER IoMmuAccess specified an illegal combinati= on of access. + @retval EFI_UNSUPPORTED The bit mask of IoMmuAccess is not support= ed by the IOMMU. + @retval EFI_UNSUPPORTED The IOMMU does not support the memory rang= e specified by BaseAddress and Length. + @retval EFI_OUT_OF_RESOURCES There are not enough resources available t= o modify the IOMMU access. + @retval EFI_DEVICE_ERROR The IOMMU device reported an error while a= ttempting the operation. + +**/ +EFI_STATUS +RequestAccessAttribute ( + IN UINT16 Segment, + IN VTD_SOURCE_ID SourceId, + IN UINT64 BaseAddress, + IN UINT64 Length, + IN UINT64 IoMmuAccess + ) +{ + VTD_ACCESS_REQUEST *NewAccessRequest; + UINTN Index; + + // + // Optimization for memory. + // + // If the last record is to IoMmuAccess=3D0, + // Check previous records and remove the matched entry. + // + if (IoMmuAccess =3D=3D 0) { + for (Index =3D 0; Index < mAccessRequestCount; Index++) { + if ((mAccessRequest[Index].Segment =3D=3D Segment) && + (mAccessRequest[Index].SourceId.Uint16 =3D=3D SourceId.Uint16) && + (mAccessRequest[Index].BaseAddress =3D=3D BaseAddress) && + (mAccessRequest[Index].Length =3D=3D Length) && + (mAccessRequest[Index].IoMmuAccess !=3D 0)) { + // + // Remove this record [Index]. + // No need to add the new record. + // + if (Index !=3D mAccessRequestCount - 1) { + CopyMem ( + &mAccessRequest[Index], + &mAccessRequest[Index + 1], + sizeof (VTD_ACCESS_REQUEST) * (mAccessRequestCount - 1 - Index) + ); + } + ZeroMem (&mAccessRequest[mAccessRequestCount - 1], sizeof(VTD_ACCE= SS_REQUEST)); + mAccessRequestCount--; + return EFI_SUCCESS; + } + } + } + + if (mAccessRequestCount >=3D mAccessRequestMaxCount) { + NewAccessRequest =3D AllocateZeroPool (sizeof(*NewAccessRequest) * (mA= ccessRequestMaxCount + MAX_VTD_ACCESS_REQUEST)); + if (NewAccessRequest =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + mAccessRequestMaxCount +=3D MAX_VTD_ACCESS_REQUEST; + if (mAccessRequest !=3D NULL) { + CopyMem (NewAccessRequest, mAccessRequest, sizeof(*NewAccessRequest)= * mAccessRequestCount); + FreePool (mAccessRequest); + mAccessRequest =3D NewAccessRequest; + } + } + + ASSERT (mAccessRequestCount < mAccessRequestMaxCount); + + mAccessRequest[mAccessRequestCount].Segment =3D Segment; + mAccessRequest[mAccessRequestCount].SourceId =3D SourceId; + mAccessRequest[mAccessRequestCount].BaseAddress =3D BaseAddress; + mAccessRequest[mAccessRequestCount].Length =3D Length; + mAccessRequest[mAccessRequestCount].IoMmuAccess =3D IoMmuAccess; + + mAccessRequestCount++; + + return EFI_SUCCESS; +} + +/** + Process Access Requests from before DMAR table is installed. + +**/ +VOID +ProcessRequestedAccessAttribute ( + VOID + ) +{ + UINTN Index; + EFI_STATUS Status; + + DEBUG ((DEBUG_INFO, "ProcessRequestedAccessAttribute ...\n")); + + for (Index =3D 0; Index < mAccessRequestCount; Index++) { + DEBUG (( + DEBUG_INFO, + "PCI(S%x.B%x.D%x.F%x) ", + mAccessRequest[Index].Segment, + mAccessRequest[Index].SourceId.Bits.Bus, + mAccessRequest[Index].SourceId.Bits.Device, + mAccessRequest[Index].SourceId.Bits.Function + )); + DEBUG (( + DEBUG_INFO, + "(0x%lx~0x%lx) - %lx\n", + mAccessRequest[Index].BaseAddress, + mAccessRequest[Index].Length, + mAccessRequest[Index].IoMmuAccess + )); + Status =3D SetAccessAttribute ( + mAccessRequest[Index].Segment, + mAccessRequest[Index].SourceId, + mAccessRequest[Index].BaseAddress, + mAccessRequest[Index].Length, + mAccessRequest[Index].IoMmuAccess + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "SetAccessAttribute %r: ", Status)); + } + } + + if (mAccessRequest !=3D NULL) { + FreePool (mAccessRequest); + } + mAccessRequest =3D NULL; + mAccessRequestCount =3D 0; + mAccessRequestMaxCount =3D 0; + + DEBUG ((DEBUG_INFO, "ProcessRequestedAccessAttribute Done\n")); +} + /** return the UEFI memory information. =20 @@ -370,6 +515,8 @@ SetupVtd ( =20 ParseDmarAcpiTableRmrr (); =20 + ProcessRequestedAccessAttribute (); + for (Index =3D 0; Index < mVtdUnitNumber; Index++) { DEBUG ((DEBUG_INFO,"VTD Unit %d (Segment: %04x)\n", Index, mVtdUnitInf= ormation[Index].Segment)); if (mVtdUnitInformation[Index].ExtRootEntryTable !=3D NULL) { diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.h b/Inte= lSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.h index bc14ff9a6631..767531e4a93f 100644 --- a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.h +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.h @@ -1,6 +1,6 @@ /** @file =20 - Copyright (c) 2017, Intel Corporation. All rights reserved.
+ Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -84,6 +84,21 @@ typedef struct { PCI_DEVICE_INFORMATION PciDeviceInfo; } VTD_UNIT_INFORMATION; =20 +// +// This is the initial max ACCESS request. +// The number may be enlarged later. +// +#define MAX_VTD_ACCESS_REQUEST 0x100 + +typedef struct { + UINT16 Segment; + VTD_SOURCE_ID SourceId; + UINT64 BaseAddress; + UINT64 Length; + UINT64 IoMmuAccess; +} VTD_ACCESS_REQUEST; + + /** The scan bus callback function. =20 @@ -561,4 +576,33 @@ GetPciBusDeviceFunction ( OUT UINT8 *Function ); =20 +/** + Append VTd Access Request to global. + + @param[in] Segment The Segment used to identify a VTd engine. + @param[in] SourceId The SourceId used to identify a VTd engine= and table entry. + @param[in] BaseAddress The base of device memory address to be us= ed as the DMA memory. + @param[in] Length The length of device memory address to be = used as the DMA memory. + @param[in] IoMmuAccess The IOMMU access. + + @retval EFI_SUCCESS The IoMmuAccess is set for the memory rang= e specified by BaseAddress and Length. + @retval EFI_INVALID_PARAMETER BaseAddress is not IoMmu Page size aligned. + @retval EFI_INVALID_PARAMETER Length is not IoMmu Page size aligned. + @retval EFI_INVALID_PARAMETER Length is 0. + @retval EFI_INVALID_PARAMETER IoMmuAccess specified an illegal combinati= on of access. + @retval EFI_UNSUPPORTED The bit mask of IoMmuAccess is not support= ed by the IOMMU. + @retval EFI_UNSUPPORTED The IOMMU does not support the memory rang= e specified by BaseAddress and Length. + @retval EFI_OUT_OF_RESOURCES There are not enough resources available t= o modify the IOMMU access. + @retval EFI_DEVICE_ERROR The IOMMU device reported an error while a= ttempting the operation. + +**/ +EFI_STATUS +RequestAccessAttribute ( + IN UINT16 Segment, + IN VTD_SOURCE_ID SourceId, + IN UINT64 BaseAddress, + IN UINT64 Length, + IN UINT64 IoMmuAccess + ); + #endif diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.c b/Inte= lSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.c index b16bd93d53f1..b981bcdb3aa0 100644 --- a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.c +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.c @@ -27,7 +27,7 @@ typedef struct { =20 #pragma pack() =20 -EFI_ACPI_DMAR_HEADER *mAcpiDmarTable; +EFI_ACPI_DMAR_HEADER *mAcpiDmarTable =3D NULL; =20 /** Dump DMAR DeviceScopeEntry. diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.c b/IntelS= iliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.c index 570b47cf7364..841a5a9264aa 100644 --- a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.c +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.c @@ -1,7 +1,7 @@ /** @file Intel VTd driver. =20 - Copyright (c) 2017, Intel Corporation. All rights reserved.
+ Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -231,6 +231,14 @@ VTdSetAttribute ( DEBUG ((DEBUG_VERBOSE, "PCI(S%x.B%x.D%x.F%x) ", Segment, SourceId.Bits.B= us, SourceId.Bits.Device, SourceId.Bits.Function)); DEBUG ((DEBUG_VERBOSE, "(0x%lx~0x%lx) - %lx\n", DeviceAddress, Length, I= oMmuAccess)); =20 + if (mAcpiDmarTable =3D=3D NULL) { + // + // Record the entry to driver global variable. + // As such once VTd is activated, the setting can be adopted. + // + return RequestAccessAttribute (Segment, SourceId, DeviceAddress, Lengt= h, IoMmuAccess); + } + PERF_CODE ( AsciiSPrint (PerfToken, sizeof(PerfToken), "S%04xB%02xD%02xF%01x", Seg= ment, SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function); Identifier =3D (Segment << 16) | SourceId.Uint16; --=20 2.7.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel