From nobody Thu May 2 13:28:23 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1511931543317634.7276457463846; Tue, 28 Nov 2017 20:59:03 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 92F39203564CD; Tue, 28 Nov 2017 20:54:38 -0800 (PST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DB4B4203564C9 for ; Tue, 28 Nov 2017 20:54:34 -0800 (PST) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Nov 2017 20:58:58 -0800 Received: from shwdeopenpsi068.ccr.corp.intel.com ([10.239.158.46]) by orsmga005.jf.intel.com with ESMTP; 28 Nov 2017 20:58:57 -0800 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.100; helo=mga07.intel.com; envelope-from=star.zeng@intel.com; receiver=edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,471,1505804400"; d="scan'208";a="178991601" From: Star Zeng To: edk2-devel@lists.01.org Date: Wed, 29 Nov 2017 12:58:52 +0800 Message-Id: <1511931533-16456-2-git-send-email-star.zeng@intel.com> X-Mailer: git-send-email 2.7.0.windows.1 In-Reply-To: <1511931533-16456-1-git-send-email-star.zeng@intel.com> References: <1511931533-16456-1-git-send-email-star.zeng@intel.com> Subject: [edk2] [PATCH 1/2] IntelSiliconPkg: Move MicrocodeUpdate from UefiCpuPkg X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael D Kinney , Laszlo Ersek , Jiewen Yao , Eric Dong , Star Zeng MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D540 To consume FIT table for Microcode update, UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe needs to be updated to consume IntelSiliconPkg/Include/IndustryStandard/FirmwareInterfaceTable.h, but UefiCpuPkg could not depend on IntelSiliconPkg. Since the Microcode update feature is specific to Intel, we can first move the Microcode update feature code from UefiCpuPkg to IntelSiliconPkg [first step], then update the code to consume FIT table [second step]. This patch series is for the first step. Note: No any code change in this patch, just move. Next patch will update MicrocodeUpdate to build with the package. Cc: Jiewen Yao Cc: Michael D Kinney Cc: Eric Dong Cc: Laszlo Ersek Regression-tested-by: Yonghong Zhu Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng Acked-by: Laszlo Ersek Reviewed-by: Eric Dong Reviewed-by: Jiewen.yao@intel.com --- .../MicrocodeFlashAccessLibNull/MicrocodeFlashAccessLibNull.c | 0 .../MicrocodeFlashAccessLibNull.inf | 0 .../MicrocodeFlashAccessLibNull.uni | 0 .../Capsule/MicrocodeCapsulePdb/MicrocodeCapsulePdb.dsc | 0 .../Capsule/MicrocodeCapsulePdb/MicrocodeCapsulePdb.fdf | 0 .../Feature/Capsule/MicrocodeCapsulePdb/Readme.md | 0 .../Capsule/MicrocodeCapsuleTxt/Microcode/Microcode.inf | 0 .../Capsule/MicrocodeCapsuleTxt/MicrocodeCapsuleTxt.dsc | 0 .../Capsule/MicrocodeCapsuleTxt/MicrocodeCapsuleTxt.fdf | 0 .../Feature/Capsule/MicrocodeCapsuleTxt/Readme.md | 0 .../Feature/Capsule/MicrocodeUpdateDxe/MicrocodeFmp.c | 0 .../Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdate.c | 0 .../Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdate.h | 0 .../Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf | 0 .../Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.uni | 0 .../Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxeExtra.uni | 0 {UefiCpuPkg =3D> IntelSiliconPkg}/Include/Guid/MicrocodeFmp.h | 0 .../Include/Library/MicrocodeFlashAccessLib.h | 0 IntelSiliconPkg/IntelSiliconPkg.dec | 10 ++++++= +++- UefiCpuPkg/UefiCpuPkg.dec | 7 ------- UefiCpuPkg/UefiCpuPkg.dsc | 2 -- 21 files changed, 9 insertions(+), 10 deletions(-) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Feature/Capsule/Library/Microcode= FlashAccessLibNull/MicrocodeFlashAccessLibNull.c (100%) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Feature/Capsule/Library/Microcode= FlashAccessLibNull/MicrocodeFlashAccessLibNull.inf (100%) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Feature/Capsule/Library/Microcode= FlashAccessLibNull/MicrocodeFlashAccessLibNull.uni (100%) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Feature/Capsule/MicrocodeCapsuleP= db/MicrocodeCapsulePdb.dsc (100%) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Feature/Capsule/MicrocodeCapsuleP= db/MicrocodeCapsulePdb.fdf (100%) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Feature/Capsule/MicrocodeCapsuleP= db/Readme.md (100%) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Feature/Capsule/MicrocodeCapsuleT= xt/Microcode/Microcode.inf (100%) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Feature/Capsule/MicrocodeCapsuleT= xt/MicrocodeCapsuleTxt.dsc (100%) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Feature/Capsule/MicrocodeCapsuleT= xt/MicrocodeCapsuleTxt.fdf (100%) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Feature/Capsule/MicrocodeCapsuleT= xt/Readme.md (100%) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Feature/Capsule/MicrocodeUpdateDx= e/MicrocodeFmp.c (100%) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Feature/Capsule/MicrocodeUpdateDx= e/MicrocodeUpdate.c (100%) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Feature/Capsule/MicrocodeUpdateDx= e/MicrocodeUpdate.h (100%) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Feature/Capsule/MicrocodeUpdateDx= e/MicrocodeUpdateDxe.inf (100%) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Feature/Capsule/MicrocodeUpdateDx= e/MicrocodeUpdateDxe.uni (100%) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Feature/Capsule/MicrocodeUpdateDx= e/MicrocodeUpdateDxeExtra.uni (100%) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Include/Guid/MicrocodeFmp.h (100%) rename {UefiCpuPkg =3D> IntelSiliconPkg}/Include/Library/MicrocodeFlashAcc= essLib.h (100%) diff --git a/UefiCpuPkg/Feature/Capsule/Library/MicrocodeFlashAccessLibNull= /MicrocodeFlashAccessLibNull.c b/IntelSiliconPkg/Feature/Capsule/Library/Mi= crocodeFlashAccessLibNull/MicrocodeFlashAccessLibNull.c similarity index 100% rename from UefiCpuPkg/Feature/Capsule/Library/MicrocodeFlashAccessLibNull/= MicrocodeFlashAccessLibNull.c rename to IntelSiliconPkg/Feature/Capsule/Library/MicrocodeFlashAccessLibNu= ll/MicrocodeFlashAccessLibNull.c diff --git a/UefiCpuPkg/Feature/Capsule/Library/MicrocodeFlashAccessLibNull= /MicrocodeFlashAccessLibNull.inf b/IntelSiliconPkg/Feature/Capsule/Library/= MicrocodeFlashAccessLibNull/MicrocodeFlashAccessLibNull.inf similarity index 100% rename from UefiCpuPkg/Feature/Capsule/Library/MicrocodeFlashAccessLibNull/= MicrocodeFlashAccessLibNull.inf rename to IntelSiliconPkg/Feature/Capsule/Library/MicrocodeFlashAccessLibNu= ll/MicrocodeFlashAccessLibNull.inf diff --git a/UefiCpuPkg/Feature/Capsule/Library/MicrocodeFlashAccessLibNull= /MicrocodeFlashAccessLibNull.uni b/IntelSiliconPkg/Feature/Capsule/Library/= MicrocodeFlashAccessLibNull/MicrocodeFlashAccessLibNull.uni similarity index 100% rename from UefiCpuPkg/Feature/Capsule/Library/MicrocodeFlashAccessLibNull/= MicrocodeFlashAccessLibNull.uni rename to IntelSiliconPkg/Feature/Capsule/Library/MicrocodeFlashAccessLibNu= ll/MicrocodeFlashAccessLibNull.uni diff --git a/UefiCpuPkg/Feature/Capsule/MicrocodeCapsulePdb/MicrocodeCapsul= ePdb.dsc b/IntelSiliconPkg/Feature/Capsule/MicrocodeCapsulePdb/MicrocodeCap= sulePdb.dsc similarity index 100% rename from UefiCpuPkg/Feature/Capsule/MicrocodeCapsulePdb/MicrocodeCapsule= Pdb.dsc rename to IntelSiliconPkg/Feature/Capsule/MicrocodeCapsulePdb/MicrocodeCaps= ulePdb.dsc diff --git a/UefiCpuPkg/Feature/Capsule/MicrocodeCapsulePdb/MicrocodeCapsul= ePdb.fdf b/IntelSiliconPkg/Feature/Capsule/MicrocodeCapsulePdb/MicrocodeCap= sulePdb.fdf similarity index 100% rename from UefiCpuPkg/Feature/Capsule/MicrocodeCapsulePdb/MicrocodeCapsule= Pdb.fdf rename to IntelSiliconPkg/Feature/Capsule/MicrocodeCapsulePdb/MicrocodeCaps= ulePdb.fdf diff --git a/UefiCpuPkg/Feature/Capsule/MicrocodeCapsulePdb/Readme.md b/Int= elSiliconPkg/Feature/Capsule/MicrocodeCapsulePdb/Readme.md similarity index 100% rename from UefiCpuPkg/Feature/Capsule/MicrocodeCapsulePdb/Readme.md rename to IntelSiliconPkg/Feature/Capsule/MicrocodeCapsulePdb/Readme.md diff --git a/UefiCpuPkg/Feature/Capsule/MicrocodeCapsuleTxt/Microcode/Micro= code.inf b/IntelSiliconPkg/Feature/Capsule/MicrocodeCapsuleTxt/Microcode/Mi= crocode.inf similarity index 100% rename from UefiCpuPkg/Feature/Capsule/MicrocodeCapsuleTxt/Microcode/Microc= ode.inf rename to IntelSiliconPkg/Feature/Capsule/MicrocodeCapsuleTxt/Microcode/Mic= rocode.inf diff --git a/UefiCpuPkg/Feature/Capsule/MicrocodeCapsuleTxt/MicrocodeCapsul= eTxt.dsc b/IntelSiliconPkg/Feature/Capsule/MicrocodeCapsuleTxt/MicrocodeCap= suleTxt.dsc similarity index 100% rename from UefiCpuPkg/Feature/Capsule/MicrocodeCapsuleTxt/MicrocodeCapsule= Txt.dsc rename to IntelSiliconPkg/Feature/Capsule/MicrocodeCapsuleTxt/MicrocodeCaps= uleTxt.dsc diff --git a/UefiCpuPkg/Feature/Capsule/MicrocodeCapsuleTxt/MicrocodeCapsul= eTxt.fdf b/IntelSiliconPkg/Feature/Capsule/MicrocodeCapsuleTxt/MicrocodeCap= suleTxt.fdf similarity index 100% rename from UefiCpuPkg/Feature/Capsule/MicrocodeCapsuleTxt/MicrocodeCapsule= Txt.fdf rename to IntelSiliconPkg/Feature/Capsule/MicrocodeCapsuleTxt/MicrocodeCaps= uleTxt.fdf diff --git a/UefiCpuPkg/Feature/Capsule/MicrocodeCapsuleTxt/Readme.md b/Int= elSiliconPkg/Feature/Capsule/MicrocodeCapsuleTxt/Readme.md similarity index 100% rename from UefiCpuPkg/Feature/Capsule/MicrocodeCapsuleTxt/Readme.md rename to IntelSiliconPkg/Feature/Capsule/MicrocodeCapsuleTxt/Readme.md diff --git a/UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeFmp.c b= /IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeFmp.c similarity index 100% rename from UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeFmp.c rename to IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeFmp.c diff --git a/UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdate.= c b/IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdate.c similarity index 100% rename from UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdate.c rename to IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdat= e.c diff --git a/UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdate.= h b/IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdate.h similarity index 100% rename from UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdate.h rename to IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdat= e.h diff --git a/UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateD= xe.inf b/IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdate= Dxe.inf similarity index 100% rename from UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDx= e.inf rename to IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdat= eDxe.inf diff --git a/UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateD= xe.uni b/IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdate= Dxe.uni similarity index 100% rename from UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDx= e.uni rename to IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdat= eDxe.uni diff --git a/UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateD= xeExtra.uni b/IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeU= pdateDxeExtra.uni similarity index 100% rename from UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDx= eExtra.uni rename to IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdat= eDxeExtra.uni diff --git a/UefiCpuPkg/Include/Guid/MicrocodeFmp.h b/IntelSiliconPkg/Inclu= de/Guid/MicrocodeFmp.h similarity index 100% rename from UefiCpuPkg/Include/Guid/MicrocodeFmp.h rename to IntelSiliconPkg/Include/Guid/MicrocodeFmp.h diff --git a/UefiCpuPkg/Include/Library/MicrocodeFlashAccessLib.h b/IntelSi= liconPkg/Include/Library/MicrocodeFlashAccessLib.h similarity index 100% rename from UefiCpuPkg/Include/Library/MicrocodeFlashAccessLib.h rename to IntelSiliconPkg/Include/Library/MicrocodeFlashAccessLib.h diff --git a/IntelSiliconPkg/IntelSiliconPkg.dec b/IntelSiliconPkg/IntelSil= iconPkg.dec index b88630d13835..a15d3dee392c 100644 --- a/IntelSiliconPkg/IntelSiliconPkg.dec +++ b/IntelSiliconPkg/IntelSiliconPkg.dec @@ -3,7 +3,7 @@ # # This package provides common open source Intel silicon modules. # -# Copyright (c) 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
# This program and the accompanying materials are licensed and made availa= ble under # the terms and conditions of the BSD License that accompanies this distri= bution. # The full text of the license may be found at @@ -23,6 +23,11 @@ [Defines] [Includes] Include =20 +[LibraryClasses.IA32, LibraryClasses.X64] + ## @libraryclass Provides services to access Microcode region on flash = device. + # + MicrocodeFlashAccessLib|Include/Library/MicrocodeFlashAccessLib.h + [Guids] ## GUID for Package token space # {A9F8D54E-1107-4F0A-ADD0-4587E7A4A735} @@ -33,6 +38,9 @@ [Guids] # Generic DXE Library / Driver can locate HOB(s) and add SMBIOS records = into SMBIOS table gIntelSmbiosDataHobGuid =3D { 0x798e722e, 0x15b2, 0x4e13, { 0x8a= , 0xe9, 0x6b, 0xa3, 0x0f, 0xf7, 0xf1, 0x67 }} =20 + ## Include/Guid/MicrocodeFmp.h + gMicrocodeFmpImageTypeIdGuid =3D { 0x96d4fdcd, 0x1502, 0x424d, { 0x= 9d, 0x4c, 0x9b, 0x12, 0xd2, 0xdc, 0xae, 0x5c } } + [Ppis] gEdkiiVTdInfoPpiGuid =3D { 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x6= 7, 0xaf, 0x2b, 0x25, 0x68, 0x4a } } =20 diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index 3bd8740c987f..d2965ba14c2d 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -59,17 +59,10 @@ [LibraryClasses.IA32, LibraryClasses.X64] ## MpInitLib|Include/Library/MpInitLib.h =20 - ## @libraryclass Provides services to access Microcode region on flash = device. - # - MicrocodeFlashAccessLib|Include/Library/MicrocodeFlashAccessLib.h - [Guids] gUefiCpuPkgTokenSpaceGuid =3D { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa,= 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }} gMsegSmramGuid =3D { 0x5802bce4, 0xeeee, 0x4e33, { 0xa1,= 0x30, 0xeb, 0xad, 0x27, 0xf0, 0xe4, 0x39 }} =20 - ## Include/Guid/MicrocodeFmp.h - gMicrocodeFmpImageTypeIdGuid =3D { 0x96d4fdcd, 0x1502, 0x424d, { 0x= 9d, 0x4c, 0x9b, 0x12, 0xd2, 0xdc, 0xae, 0x5c } } - ## Include/Guid/CpuFeaturesSetDone.h gEdkiiCpuFeaturesSetDoneGuid =3D { 0xa82485ce, 0xad6b, 0x4101, { 0x99,= 0xd3, 0xe1, 0x35, 0x8c, 0x9e, 0x7e, 0x37 }} =20 diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc index 41cf809559ca..d9a3d2d65470 100644 --- a/UefiCpuPkg/UefiCpuPkg.dsc +++ b/UefiCpuPkg/UefiCpuPkg.dsc @@ -61,7 +61,6 @@ [LibraryClasses] SmmCpuFeaturesLib|UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib= .inf PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeC= offGetEntryPointLib.inf PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeC= offExtraActionLibNull.inf - MicrocodeFlashAccessLib|UefiCpuPkg/Feature/Capsule/Library/MicrocodeFlas= hAccessLibNull/MicrocodeFlashAccessLibNull.inf TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurem= entLibNull.inf =20 [LibraryClasses.common.SEC] @@ -152,7 +151,6 @@ [Components.IA32, Components.X64] SmmCpuFeaturesLib|UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeature= sLibStm.inf } UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf - UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf =20 [BuildOptions] *_*_*_CC_FLAGS =3D -D DISABLE_NEW_DEPRECATED_INTERFACES --=20 2.7.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Thu May 2 13:28:23 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1511931545220360.33898023752636; Tue, 28 Nov 2017 20:59:05 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id CC530203564D1; Tue, 28 Nov 2017 20:54:38 -0800 (PST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1EE0E203564C4 for ; Tue, 28 Nov 2017 20:54:36 -0800 (PST) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Nov 2017 20:58:59 -0800 Received: from shwdeopenpsi068.ccr.corp.intel.com ([10.239.158.46]) by orsmga005.jf.intel.com with ESMTP; 28 Nov 2017 20:58:58 -0800 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.100; helo=mga07.intel.com; envelope-from=star.zeng@intel.com; receiver=edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,471,1505804400"; d="scan'208";a="178991609" From: Star Zeng To: edk2-devel@lists.01.org Date: Wed, 29 Nov 2017 12:58:53 +0800 Message-Id: <1511931533-16456-3-git-send-email-star.zeng@intel.com> X-Mailer: git-send-email 2.7.0.windows.1 In-Reply-To: <1511931533-16456-1-git-send-email-star.zeng@intel.com> References: <1511931533-16456-1-git-send-email-star.zeng@intel.com> Subject: [edk2] [PATCH 2/2] IntelSiliconPkg: Update MicrocodeUpdate to build with the package X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael D Kinney , Jiewen Yao , Star Zeng MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D540 This is after patch "IntelSiliconPkg: Move MicrocodeUpdate from UefiCpuPkg". Cc: Jiewen Yao Cc: Michael D Kinney Regression-tested-by: Yonghong Zhu Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng Acked-by: Laszlo Ersek Reviewed-by: Eric Dong Reviewed-by: Jiewen.yao@intel.com --- .../MicrocodeFlashAccessLibNull/MicrocodeFlashAccessLibNull.inf | 6 ++= +--- .../Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf | 3 ++- IntelSiliconPkg/IntelSiliconPkg.dsc | 2 ++ 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/IntelSiliconPkg/Feature/Capsule/Library/MicrocodeFlashAccessLi= bNull/MicrocodeFlashAccessLibNull.inf b/IntelSiliconPkg/Feature/Capsule/Lib= rary/MicrocodeFlashAccessLibNull/MicrocodeFlashAccessLibNull.inf index a4a47e073720..3b2532f7a09d 100644 --- a/IntelSiliconPkg/Feature/Capsule/Library/MicrocodeFlashAccessLibNull/M= icrocodeFlashAccessLibNull.inf +++ b/IntelSiliconPkg/Feature/Capsule/Library/MicrocodeFlashAccessLibNull/M= icrocodeFlashAccessLibNull.inf @@ -3,7 +3,7 @@ # # Microcode flash device access library NULL instance. # -# Copyright (c) 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
# This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License # which accompanies this distribution. The full text of the license may = be found at @@ -26,7 +26,7 @@ [Defines] # # The following information is for reference only and not required by the = build tools. # -# VALID_ARCHITECTURES =3D IA32 X64 IPF EBC +# VALID_ARCHITECTURES =3D IA32 X64 # =20 [Sources] @@ -34,7 +34,7 @@ [Sources] =20 [Packages] MdePkg/MdePkg.dec - UefiCpuPkg/UefiCpuPkg.dec + IntelSiliconPkg/IntelSiliconPkg.dec =20 [LibraryClasses] BaseMemoryLib diff --git a/IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUp= dateDxe.inf b/IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeU= pdateDxe.inf index 55797cf132b1..dbc90857a0a5 100644 --- a/IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe= .inf +++ b/IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe= .inf @@ -3,7 +3,7 @@ # # Produce FMP instance to update Microcode. # -# Copyright (c) 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
# This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License # which accompanies this distribution. The full text of the license may = be found at @@ -36,6 +36,7 @@ [Sources] =20 [Packages] MdePkg/MdePkg.dec + IntelSiliconPkg/IntelSiliconPkg.dec UefiCpuPkg/UefiCpuPkg.dec =20 [LibraryClasses] diff --git a/IntelSiliconPkg/IntelSiliconPkg.dsc b/IntelSiliconPkg/IntelSil= iconPkg.dsc index 57173411b373..e3043f82228e 100644 --- a/IntelSiliconPkg/IntelSiliconPkg.dsc +++ b/IntelSiliconPkg/IntelSiliconPkg.dsc @@ -39,6 +39,7 @@ [LibraryClasses] PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibN= ull.inf SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull= .inf CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMain= tenanceLib.inf + MicrocodeFlashAccessLib|UefiCpuPkg/Feature/Capsule/Library/MicrocodeFlas= hAccessLibNull/MicrocodeFlashAccessLibNull.inf =20 [LibraryClasses.common.PEIM] PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf @@ -83,6 +84,7 @@ [Components] IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf IntelSiliconPkg/Feature/VTd/PlatformVTdSampleDxe/PlatformVTdSampleDxe.inf IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSamp= lePei.inf + UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf =20 [BuildOptions] *_*_*_CC_FLAGS =3D -D DISABLE_NEW_DEPRECATED_INTERFACES --=20 2.7.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel